Abstract: Aspects of the present disclosure relate to one or more implementations of a substrate support for a processing chamber. In one implementation, a substrate support includes a body having a center, and a support surface on the body configured to at least partially support a substrate. The substrate support includes a first angled wall that extends upward and radially outward from the support surface, and a first upper surface disposed above the support surface. The substrate support also includes a second angled wall that extends upward and radially outward from the first upper surface, the first upper surface extending between the first angled wall and the second angled wall. The substrate support also includes a second upper surface extending from the second angled wall. The second upper surface is disposed above the first upper surface.

Abstract: Methods and apparatus for a lift pin mechanism for substrate processing chambers are provided herein. In some embodiments, the lift pin mechanism includes a lift pin comprising a shaft with a top end, a bottom end, and a coupling end at the bottom end; a bellows assembly disposed about the shaft. The bellows assembly includes an upper bellows flange having an opening for axial movement of the shaft; a bellows having a first end coupled to a lower surface of the upper bellows flange such that the shaft extends into a central volume surrounded by the bellows; and a bellows guide assembly coupled to a second end of the bellows to seal the central volume. The shaft is coupled to the bellows guide assembly at the coupling end. The bellows guide assembly is axially movable to move the lift pin with respect to the upper bellows flange.

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about ?100 MPa to about 100 MPa.

Abstract: A system and method including a processing device. The processing device receives data including one or more plasma exposure durations of a plasma process. The plasma exposure duration are associated with a set of controlled elements. The processing device causes a each set of controlled elements to switch between a first mode of operation and a second mode of operation. Each set of controlled elements expose appropriate portion of a substrate to the plasma related fluxes. The first set of controlled elements process the substrate at an increased rate while operating in the first mode of operation relative to the second mode of operation. The processing device causes each set of controlled elements to operate in the first mode of operation for the appropriate time duration based on the received plasma exposure duration data.

Abstract: A method includes identifying first structure data of a first region of a substrate and receiving optical metrology data of the substrate associated with one or more substrate deposition processes in a processing chamber. The method further includes determining, based on the optical metrology data and the first structure data, a first growth rate of the first region of the substrate associated with the one or more substrate deposition processes. The method further includes predicting, based on the optical metrology data and the first growth rate, thickness data of a second region of the substrate without second structure data of the second region.

Abstract: Provided are methods of forming vias with decreased resistance by selectively depositing a barrier layer on an insulating layer and not on a metallic surface. Some embodiments of the disclosure utilize a planar hydrocarbon to form a blocking layer on metallic surfaces. Deposition is performed to selectively deposit on the unblocked insulating surfaces.

Abstract: Exemplary semiconductor processing methods may include performing a treatment operation on a substrate housed within a first processing region of a first semiconductor processing chamber. The methods may include providing a nitrogen-containing precursor to the first processing region. The methods may include forming plasma effluents of the nitrogen-containing precursor. The methods may include contacting the substrate with the plasma effluents of the nitrogen-containing precursor. The contacting may nitride a surface of the substrate. The methods may include transferring the substrate from the first processing region of the first semiconductor processing chamber to a second processing region of a second semiconductor processing chamber. The methods may include providing one or more deposition precursors to the second processing region. The methods may include contacting the substrate with the one or more deposition precursors. The contacting may deposit a layer of dielectric material on the substrate.

Abstract: Exemplary semiconductor processing chambers may include a chamber body. The chambers may include a substrate support within the chamber body. The substrate support may define a substrate support surface. The chambers may include a faceplate supported atop the chamber body. The substrate support and a bottom surface of the faceplate may at least partially define a processing region. The bottom surface of the faceplate may define an annular protrusion that is directly above at least a portion of a radially outer 10% of the substrate support surface and an annular groove that is positioned radially outward of the annular protrusion. At least a portion of the annular groove may extend radially outward beyond the substrate support surface. The faceplate may define apertures through the faceplate. A first subset of the apertures may extend through the annular protrusion and a second subset of the apertures may extend through the annular groove.

Abstract: Ampoules including a solid volume of the semiconductor chemical precursor and methods of use and manufacturing are described. The solid volume of the semiconductor chemical precursor includes an ingress opening, at least one flow channel, and an outlet passage that are in fluid communication with each other. The solid volume of the semiconductor manufacturing precursor is made of a porous or alternatively a non-porous material. A flow path is defined by at least one flow channel through which a carrier gas flows in contact with the solid volume of the semiconductor chemical precursor.

Abstract: Exemplary semiconductor processing methods may include providing a pre-treatment precursor to a processing region of a semiconductor processing chamber. A first layer of silicon-and-germanium-containing material and a second layer of silicon-and-germanium-containing material may be disposed on a substrate housed within the processing region. A native oxide may be present on the first layer and the second layer. The methods may include contacting the substrate with the pre-treatment precursor to remove the native oxide. The methods may include providing an oxygen-containing precursor to the processing region. The methods may include contacting the substrate with the oxygen-containing precursor to oxidize at least a portion of the second layer. The methods may include providing an etchant precursor to the processing region. The methods may include contacting the substrate with the etchant precursor to selectively etch the first layer of silicon-and-germanium-containing material.

Abstract: Gas distribution assemblies for a semiconductor manufacturing processing chamber comprising a first showerhead with a first flange and a second showerhead with a second flange. A first two-piece RF isolator comprises a first inner RF isolator spaced from a first outer RF isolator. The first inner RF isolator spaced from the first flange of the first showerhead to create a first flow path. A second two-piece RF isolator comprises a second inner RF isolator spaced from a second outer RF isolator. The second RF isolator spaced from the second flange of the second showerhead to create a second flow path. Processing chambers incorporating the gas distribution assemblies, and processing methods using the gas distribution assemblies are also described.

Abstract: Methods for forming 3D DRAM leverage L-pad formations to increase memory density. Methods may include etching a substrate to form two Si walls oriented parallel to each other and forming a space therebetween, depositing a plurality of alternating Si layers and SiGe layers using epitaxial growth processes to form horizontal deposition layers on the space between the two Si walls and vertical deposition layers on sidewalls of the two Si walls, depositing a CMP stop layer on the substrate, planarizing the substrate to the CMP stop layer, removing a portion of a top of the two Si walls and forming an L-pad formation, deep etching a pattern of holes into the space between the two Si walls in horizontal portions of the plurality of alternating Si layers and SiGe layers, and forming vertical wordline structures from the pattern of holes in the horizontal portions.

Abstract: Embodiments of the present disclosure generally relate to a batch processing chamber that is adapted to simultaneously cure multiple substrates at one time. The batch processing chamber includes multiple processing sub-regions that are each independently temperature controlled. The batch processing chamber may include a first and a second sub-processing region that are each serviced by a substrate transport device external to the batch processing chamber. In addition, a slotted cover mounted on the loading opening of the batch curing chamber reduces the effect of ambient air entering the chamber during loading and unloading.

Abstract: Embodiments described herein provide for devices and methods of measuring a pitch P of optical device structures and an orientation angle ? of the optical device structures. One embodiment of the system includes an optical arm coupled to an arm actuator. The optical arm includes a light source. The light source emits a light path operable to be diffracted to the stage. The optical arm further includes a first beam splitter and a second beam splitter positioned in the light path. The first beam splitter directs the light path through a first lens and the second beam splitter directs the light path through a first dove prism and a second lens. The optical arm further includes a first detector operable to detect the light path from the first lens and second detector operable to detect the light path from the second lens.

Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.

Abstract: Methods and systems for rating a current substrate support assembly based on impedance circuit electron flow are provided. Data associated with an amount of radio frequency (RF) power flowed through an electrical component of a current substrate support assembly during a current testing process performed for the current substrate support assembly is provided as input to a trained machine learning model. One or more outputs of the trained machine learning model are obtained. A measurement value for an electron flow across an impedance circuit of the current substrate support assembly is extracted from the one or more outputs. In response to a determination that the extracted measurement value for the electron flow satisfies an electron flow criterion, a first quality rating is assigned to the current substrate support assembly.

Abstract: A method for processing a substrate is described. The method includes forming a metal containing resist layer onto a substrate, patterning the metal containing resist layer, and performing a post exposure bake on the metal containing resist layer. The post exposure bake on the metal containing resist layer is a field guided post exposure bake operation and includes the use of an electric field to guide the ions or charged species within the metal containing resist layer. The field guided post exposure bake operation may be paired with a post development field guided bake operation.

Abstract: The present disclosure relates to systems and methods for detecting anomalies in a semiconductor processing system. According to certain embodiments, one or more external sensors are mounted to a sub-fab component, communicating with the processing system via a communication channel different than a communication channel utilized by the sub-fab component and providing extrinsic sensor data that the sub-fab component is not configured to provide. The extrinsic sensor data may be combined with sensor data from a processing tool of the system and/or intrinsic sensor data of the sub-fab component to form virtual sensor data. In the event the virtual data exceeds or falls below a threshold, an intervention or a maintenance signal is dispatched, and in certain embodiments, an intervention or maintenance action is taken by the system.

Abstract: Exemplary processing systems may include a chamber body. The systems may include a pedestal configured to support a semiconductor substrate. The systems may include a faceplate. The chamber body, the pedestal, and the faceplate may define a processing region. The faceplate may be coupled with an RF power source. The systems may include a remote plasma unit. The remote plasma unit may be coupled at electrical ground. The systems may include a discharge tube extending from the remote plasma unit towards the faceplate. The discharge tube may define a central aperture. The discharge tube may be electrically coupled with each of the faceplate and the remote plasma unit. The discharge tube may include ferrite extending about the central aperture of the discharge tube.

Abstract: Embodiments provided herein generally include apparatus, plasma processing systems, and methods for generation of a waveform for plasma processing of a substrate in a processing chamber. One embodiment includes a waveform generator having three MOSFETs and three series-connected capacitors. The capacitors are connected across a DC power supply and, depending on the value of the capacitors, voltage across each of them may be varied. Each of the top two capacitors is followed by a diode. The bottom capacitor is connected to the ground. The drain terminal of each MOSFET is connected to higher potential end of the series connected capacitors. Each MOSFET is followed by a diode and the cathode ends of the diodes are connected together. An electrode is connected between the common cathode and ground.