Abstract: Disclosed herein is a substrate support assembly having a ground electrode mesh disposed therein along a side surface of the substrate support assembly. The substrate support assembly has a body. The body has an outer top surface, an outer side surface and an outer bottom surface enclosing an interior of the body. The body has a ground electrode mesh disposed in the interior of the body and adjacent the outer side surface, wherein the ground electrode does not extend through to the outer top surface or the outer side surface.

Abstract: Methods of processing a substrate in a PVD chamber are provided herein. In some embodiments, a method of processing a substrate in a PVD chamber, includes: sputtering material from a target disposed in the PVD chamber and onto a substrate, wherein at least some of the material sputtered from the target is guided to the substrate through a magnetic field provided by one or more upper magnets disposed about a processing volume of the PVD chamber above a support pedestal for the substrate in the PVD chamber, one or more first magnets disposed about the support pedestal and providing an increased magnetic field strength at an edge region of the substrate, and one or more second magnets disposed below the support pedestal that increase a magnetic field strength at a central region of the substrate.

Abstract: A material deposition apparatus for depositing an evaporated material onto a substrate is provided. The material deposition apparatus includes a processing drum having a cooler configured to control a substrate temperature during processing of a substrate on the processing drum; a roller guiding the substrate towards the processing drum; a first heater assembly positioned to heat the substrate in a free-span area between the roller and the processing drum; a second heater assembly positioned to heat the substrate while being supported on the processing drum; at least one deposition source provided along a substrate transport path downstream of the second heater assembly; a substrate speed sensor providing a speed signal correlating with a substrate transportation speed; and a controller having an input for the speed signal configured to control at least the first heater assembly.

Abstract: Exemplary processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature. The methods may include forming plasma effluents of the silicon-containing precursor. The methods may include depositing a silicon-containing material on the substrate. The methods may include providing an oxygen-containing precursor to the processing region, forming plasma effluents of the oxygen-containing precursor, and contacting the silicon-containing material with the plasma effluents of the oxygen-containing precursor to form a silicon-and-oxygen-containing material.

Abstract: Exemplary substrate processing chambers may include a chamber body defining a processing region. The chambers may include a backing plate disposed atop the chamber body, a diffuser above the processing region and supported by the backing plate, and a cooling frame disposed between the backing plate and the diffuser. The cooling frame may be coupled with the diffuser. The cooling frame may include a body having one or more fluid inlets and one or more fluid outlets. The body may define an opening. The fluid inlets may be in fluid communication with the one or more fluid outlets via one or more fluid lumens that each extend at least partially about a periphery of the opening. The fluid inlets may be in fluid communication with one or more fluid supply lumens. The fluid outlets may be in fluid communication with one or more fluid return lumens.

Abstract: Exemplary methods of OLED device processing are described. The methods may include forming an anode on a substrate. Forming the anode may include forming a first metal oxide material on the substrate, forming a metal layer over the first metal oxide material, forming a protective barrier over the metal layer, and forming a second metal oxide material over the amorphous protection material. The protective barrier may be an amorphous protection material overlying the metal layer.

Abstract: Exemplary semiconductor processing methods may include flowing a fluorine-containing precursor and a hydrogen-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include forming plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor and contacting the substrate with the plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor to form a fluorinated portion of the stacked layers. The methods may include flowing an inert precursor into the processing region, forming plasma effluents of the inert precursor, and contacting the substrate with the plasma effluents of the inert precursor to remove the fluorinated portion of the stacked layers.

Abstract: Methods of manufacturing memory devices are provided. The method comprises forming a first epitaxial layer on a substrate; and forming a memory array on the first epitaxial layer, the memory array comprising a memory stack of alternating layers of an oxide material and a metal material on the first epitaxial layer, at least one memory cell extending from the first epitaxial layer through the memory stack, and a slit filled with a fill material adjacent to the at least one memory cell.

Abstract: Embodiments of the disclosure provide methods of forming interconnect structures in the manufacture of microelectronic devices. In one or more embodiments, microelectronic devices described herein comprise at least one top interconnect structure that is interconnected to at least one bottom interconnect structure. Embodiments of the disclosure relate to methods of improving barrier layer and metal liner properties in the interconnect structures without increasing capacitance and/or damaging other layers. In some embodiments, the barrier layer is treated with microwave radiation. The treatment process can be implemented in a processing tool including a modular high-frequency emission source.

Abstract: A plasma processing apparatus. The plasma processing apparatus may include a plasma chamber, to define a plasma therein, and an extraction aperture, arranged along a first side of the plasma chamber, the extraction aperture to define an ion beam extracted therethrough. The plasma processing apparatus may further include a residence time tuning assembly, coupled to a portion of the plasma chamber, different from the first side, wherein the residence time tuning assembly comprises a pumping duct, connected to the plasma chamber on a first end, and defining a pumping path for extracting a gaseous species directly from the plasma chamber, separately from the extraction aperture.

Abstract: A method includes depositing a first layer of a first material onto a surface of a chamber component of a processing chamber. The first material comprises a polymer, the polymer having a dielectric strength of at least 40 MV/m. The method further includes depositing a second layer of a second material onto the first layer. The second material comprises a first ceramic material impregnated into the first polymer or a second polymer. The method further includes depositing a third layer. The third layer is of a third material. The third material includes the first ceramic material or a second ceramic material. The third material does not adhere to the first polymer or the second polymer. The third material does adhere to the first ceramic material or the second ceramic material of the second layer.

Abstract: Apparatus and methods for multi-cathode barrier seed deposition for high aspect ratio features in a physical vapor deposition (PVD) process are provided herein. In some embodiments, a PVD chamber includes a pedestal disposed within a processing region of the PVD chamber. The pedestal rotates with a workpiece on it. The PVD chamber includes a lid assembly includes a first target and a second target of a same target material, where a first surface of the first target defines a first zone of the processing region a first distance from the upper surface of the pedestal, and a second surface of the second target defines a second zone of the processing region a second distance from the plane of the upper surface of the pedestal. A system controller is configured to simultaneously control a first voltage bias for the first target and a second voltage bias for the second target.

Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.

Abstract: A physical vapor deposition system includes a deposition chamber, a support to hold a substrate in the deposition chamber, a target in the chamber, a power supply configured to apply power to the target to generate a plasma in the chamber to sputter material from the target onto the substrate to form a piezoelectric layer on the substrate, and a controller configured to cause the power supply to alternate between deposition phases in which the power supply applies power to the target and cooling phases in which power supply does not apply power to the target. Each deposition phase lasts at least 30 seconds and each cooling phase lasts at least 30 seconds.

Abstract: An apparatus for controlling temperature profile of a substrate within an epitaxial chamber includes a bottom center pyrometer and a bottom outer pyrometer to respectively measure temperatures at a center location and an outer location of a first surface of a susceptor of an epitaxy chamber, a top center pyrometer and a top outer pyrometer to respectively measure temperatures at a center location and an outer location of a substrate disposed on a second surface of the susceptor opposite the first surface, a first controller to receive signals, from the bottom center pyrometer and the bottom outer pyrometer, and output a feedback signal to a first heating lamp module that heats the first surface based on the measured temperatures of the first surface, and a second controller to receive signals, from the top center pyrometer, the top outer pyrometer, the bottom center pyrometer, and the bottom outer pyrometer, and output a feedback signal to a second heating lamp module that heats the substrate based on the mea

Abstract: A method includes performing ion beam sputtering with ion assisted deposition to deposit a protective layer on a surface of a body. The protective layer is a plasma resistant rare earth-containing film of a thickness less than 1000 ?m. The porosity of the protective layer is below 1%. The plasma resistant rare earth-containing film consists of 40 mol % to less than 100 mol % of Y2O3, over 0 mol % to 60 mol % of ZrO2, and 0 mol % to 9 mol % of Al2O3.

Abstract: Deposition methods and apparatus for conditioning a process kit to increase process kit lifetime are described. A nitride film formed on a process kit is exposed to conditioning process comprising nitrogen and hydrogen radicals to condition the nitride film to decrease particulate contamination from the process kit.

Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency above 15 MHz. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.0.

Abstract: A method and apparatus for biasing regions of a substrate in a plasma assisted processing chamber are provided. Biasing of the substrate, or regions thereof, increases the potential difference between the substrate and a plasma formed in the processing chamber thereby accelerating ions from the plasma towards the active surfaces of the substrate regions. A plurality of bias electrodes herein are spatially arranged across the substrate support in a pattern that is advantageous for managing uniformity of processing results across the substrate.

Abstract: Methods of depositing thin films for an electronic device, for example a semiconductor device include applying a first pulsed plasma with or without a reactant and a second continuous plasma with a reactant.