Abstract: Generally, examples described herein relate to deposition masks and methods of manufacturing and using such deposition masks. An example includes a method for forming a deposition mask. A mask layer is deposited on a substrate. Mask openings are patterned through the mask layer. A central portion of the substrate is removed to define a substrate opening through a periphery portion of the substrate. The mask layer with the mask openings through the mask layer extending across the substrate opening.

Abstract: A method of forming patterned features on a substrate is provided. The method includes positioning a plurality of masks arranged in a mask layout over a substrate. The substrate is positioned in a first plane and the plurality of masks are positioned in a second plane, the plurality of masks in the mask layout have edges that each extend parallel to the first plane and parallel or perpendicular to an alignment feature on the substrate, the substrate includes a plurality of areas configured to be patterned by energy directed through the masks arranged in the mask layout. The method further includes directing energy towards the plurality of areas through the plurality of masks arranged in the mask layout over the substrate to form a plurality of patterned features in each of the plurality of areas.

Abstract: Implementations of the present disclosure generally relate to separators, high performance electrochemical devices, such as, batteries and capacitors, including the aforementioned separators, and methods for fabricating the same. In one implementation, a method of forming a separator for a battery is provided. The method comprises exposing a metallic material to be deposited on a surface of an electrode structure positioned in a processing region to an evaporation process. The method further comprises flowing a reactive gas into the processing region. The method further comprises reacting the reactive gas and the evaporated metallic material to deposit a ceramic separator layer on the surface of the electrode structure.

Abstract: Ampoules for a semiconductor manufacturing precursors and methods of use are described. The ampoules include a container with an inlet port and an outlet port. The inlet port has a showerhead that the end within the container. The showerhead has at least two angled nozzles to direct the flow of gas within the cavity so that the gas flow is not perpendicular to the surface of a liquid within the ampoule.

Abstract: A semiconductor processing system includes a first component and a second component. The first component forms a first chamber with a first sealed environment at a first state within the first chamber. The second component is coupled to the first component. The second component forms a second chamber with a second sealed environment at a second state within the second chamber. A third component is to change the first state of the first sealed environment within the first chamber to cause the first state to be substantially similar to the second state of the second sealed environment within the second chamber. The second sealed environment is at the second state prior to changing of the first state of the first sealed environment to be substantially similar to the second state.

Abstract: An ion source including a chamber housing defining an ion source chamber and including an extraction plate on a front side thereof, the extraction plate having an extraction aperture formed therein, and a tubular cathode disposed within the ion source chamber and having an opening formed in a front half thereof nearest the extraction aperture, wherein a rear half of the tubular cathode furthest from the extraction aperture is closed.

Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a substrate; a multilayer stack of reflective layers on the substrate; a capping layer on the multilayer stack of reflecting layers; and an absorber layer on the capping layer, the absorber layer made from tantalum and ruthenium.

Abstract: Methods of depositing a film using a plasma enhanced process are described. The method comprises providing continuous power from a power source connected to a microwave plasma source in a process chamber and a dummy load, the continuous power split into pulses having a first time and a second time defining a duty cycle of a pulse. The continuous power is directed to the microwave plasma source during the first time, and the continuous power is directed to the dummy load during the second time.

Abstract: Exemplary methods of etching may include flowing a fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The secondary gas may be or include oxygen or nitrogen. A flow rate ratio of the fluorine-containing precursor to the secondary gas may be greater than or about 1:1. The methods may include contacting a substrate with the fluorine-containing precursor and the secondary gas. The substrate may include an exposed metal. The substrate may define a high aspect-ratio structure. The methods may include etching the exposed metal within the high aspect-ratio structure.

Abstract: In a fluorescent in-situ hybridization imaging system performs, as nested loops, the following: (1) a valve sequentially couples a flow cell to a plurality of different reagent sources to expose the sample to a plurality of different reagents, (2) for each reagent of the plurality of different reagents, a motor sequentially positions the fluorescence microscope relative to sample at a plurality of different fields of view, (3) for each field of view of the plurality of different fields of view, a variable frequency excitation light source sequentially emits a plurality of different wavelengths, (4) for each wavelength of the plurality of different wavelengths, an actuator sequentially positions the fluorescence microscope relative to sample at a plurality of different vertical heights, and (5) for each vertical height of the plurality of different vertical heights, an image is obtained.

Abstract: Exemplary sample processing methods are described that include providing an initial sample to a sample processing system. The sample processing system includes a light-emitting-diode, a temperature control unit, and a fluid supply unit. The methods also include irradiating the initial sample with light emitted from the light-emitting-diode to produce an irradiated sample. The methods may still further include adjusting a temperature of the irradiated sample with the temperature control unit to between 0° C. and 60° C., and contacting the irradiated sample with a fluid from the fluid supply unit. The irradiated sample has a reduction in auto-fluorescence of greater than or about 50% compared to the initial sample. Exemplary sample processing systems are also described that include a light-emitting-diode, a temperature control unit, and a fluid supply unit.

Abstract: Methods for selectively depositing on metallic surfaces are disclosed. Some embodiments of the disclosure utilize a hydrocarbon having at least two functional groups selected from alkene, alkyne, ketone, alcohol, ester, or combinations thereof to form a self-assembled monolayer (SAM) on metallic surfaces.

Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The substrate may include one or more patterned features separated by exposed regions of the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor and the hydrogen-containing precursor. Forming the plasma of the silicon-containing precursor and the hydrogen-containing precursor may be performed at a plasma power of less than or about 1,000 W. The methods may include depositing a silicon-containing material on the one or more patterned features along the substrate. The silicon-containing material may be deposited on the patterned features at a rate of at least 2:1 relative to deposition on the exposed regions of the substrate.

Abstract: Exemplary methods of semiconductor processing may include delivering a deposition precursor into a processing region of a semiconductor processing chamber. The methods may include depositing a layer of material on a substrate housed in the processing region of the semiconductor processing chamber. The processing region may be maintained at a first pressure during the deposition. The methods may include extending a baffle within the processing region. The baffle may modify a flow path within the processing region. The methods may include forming a plasma of a treatment or etch precursor within the processing region of the semiconductor processing chamber. The processing region may be maintained at a second pressure during the forming. The methods may include treating the layer of material deposited on the substrate with plasma effluents of the treatment precursor. The processes may be cycled any number of times.

Abstract: Exemplary methods of semiconductor processing may include delivering a deposition precursor into a processing region of a semiconductor processing chamber. The methods may include depositing a layer of material on a substrate housed in the processing region of the semiconductor processing chamber. The processing region may be maintained at a first pressure during the deposition. The methods may include extending a baffle within the processing region. The baffle may modify a flow path within the processing region. The methods may include forming a plasma of a treatment or etch precursor within the processing region of the semiconductor processing chamber. The processing region may be maintained at a second pressure during the forming. The methods may include treating the layer of material deposited on the substrate with plasma effluents of the treatment precursor. The processes may be cycled any number of times.

Abstract: Susceptor assemblies comprising a susceptor base and a plurality of pie-shaped skins thereon are described. A pie anchor can be positioned in the center of the susceptor base to hold the pie-shaped skins in place during processing.

Abstract: Substrate supports comprising a plurality of bonded plates forming a single component support body and methods of forming the substrate supports are described. The single component support body has an outer peripheral edge, a top surface and a bottom surface. A pocket is formed in the top surface and has a bottom surface, a depth and an outer peripheral edge. A purge ring is spaced a distance from the outer peripheral edge and comprises at least one opening in the top surface in fluid communication with a purge gas line within the body thickness.

Abstract: Processing methods described herein comprise forming a metal gate film on a narrow feature and a wide feature and depositing a hard mask on the metal gate film. The hard mask forms on the metal gate film at a top, bottom and sidewalls of the wide feature and on a top of the narrow feature to cover the metal gate film. Some processing methods comprise oxidizing the metal gate film on the narrow feature to convert a portion of the metal gate film to a metal oxide film. Some processing methods comprise etching the metal oxide film from the narrow feature to leave a gradient etch profile. Some processing methods comprise filling the narrow feature and the wide feature with a gap fill material comprising one or more of a metal nitride, titanium nitride (TiN) or titanium oxynitride (TiON), the gap fill material substantially free of seams and voids.

Abstract: Systems and methods may be used to produce coated components. Exemplary semiconductor chamber components may include an aluminum alloy comprising nickel and may be characterized by a surface. The surface may include a corrosion resistant coating. The corrosion resistant coating may include a conformal layer and a non-metal layer. The conformal layer may extend about the semiconductor chamber component. The non-metal oxide layer may extend over a surface of the conformal layer. The non-metal oxide layer may be characterized by an amorphous microstructure having a hardness of from about 300 HV to about 10,000 HV. The non-metal oxide layer may also be characterized by an sp2 to sp3 hybridization ratio of from about 0.01 to about 0.5 and a hydrogen content of from about 1 wt. % to about 35 wt. %.

Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The substrate may include a nitrogen-containing nucleation layer deposited on the substrate. The methods may include forming a silicon-containing material on at least a first portion of the nitrogen-containing nucleation layer. The methods may include forming a second layer of material on at least a second portion of the nitrogen-containing nucleation layer. The methods may include forming a masking layer on a portion of the second layer of material. The masking layer may cover less than or about 90% of the second layer of material. The methods may include growing the second layer of material through the masking layer. The methods may include coalescing the second layer of material above the masking layer.