Abstract: An apparatus for processing substrates includes a continuum radiation source, a source manifold optically coupled to the continuum radiation source and comprising: a plurality of beam guides, each having a first end that optically couples the beam guide to the continuum radiation source; and a second end. The apparatus also includes a detector manifold to detect radiation originating from the source manifold and transmitted through a processing area, and one or more transmission pyrometers configured to analyze the source radiation and the transmitted radiation to determine an inferred temperature proximate the processing area.
Abstract: Embodiments disclosed herein include a sensor wafer. In an embodiment, the sensor wafer comprises a substrate, wherein the substrate comprises a first surface, a second surface opposite the first surface, and an edge surface between the first surface and the second surface. In an embodiment, the sensor wafer further comprises a plurality of sensor regions formed along the edge surface, wherein each sensor region comprises a self-referencing capacitive sensor.
Abstract: Methods and systems relating to processes for treating a silicon nitride film on a workpiece including supporting the workpiece in a chamber, introducing an amine gas into the chamber and establishing a pressure of at least 5 atmospheres, and exposing the silicon nitride film on the workpiece to the amine gas while the pressure in the chamber is at least 5 atmospheres.
Type:
Grant
Filed:
May 25, 2017
Date of Patent:
November 24, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Keith Tatseun Wong, Sean Kang, Srinivas D. Nemani, Ellie Y. Yieh
Abstract: A coating layer is deposited on a patterned feature on a first portion of a substrate. A second portion of the substrate outside the patterned feature is etched. The etching and the depositing are performed in a single pulsed plasma process using at least one of a pulsed source power signal and a pulsed bias power signal.
Type:
Grant
Filed:
April 7, 2017
Date of Patent:
November 24, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Byungkook Kong, Sangwook Kim, SeungHyun Park, Abhjeet Bagal, Kyoungjin Lee, Daksh Agarwal
Abstract: Disclosed herein is a ceramic article or coating useful in semiconductor processing, which is resistant to erosion by halogen-containing plasmas. The ceramic article or coating is formed from a combination of yttrium oxide and zirconium oxide.
Type:
Grant
Filed:
January 18, 2019
Date of Patent:
November 24, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Jennifer Y. Sun, Ren-Guan Duan, Jie Yuan, Li Xu, Kenneth S. Collins
Abstract: A method and structure for a bonding layer are disclosed. The bonding structure includes a first portion surrounding an opening in a body defining a dam thereabout. A second portion surrounds the first portion. The first portion is formed from a material resistant to degradation from exposure to a process gas. The second portion is formed from a different material than the material of the first portion. The first portion further includes one or more additives to change properties thereof.
Abstract: Methods for depositing rhenium-containing thin films on a substrate are described. The substrate is exposed to a rhenium precursor and a reducing agent to form the rhenium-containing film (e.g., metallic rhenium, rhenium nitride). The exposures can be sequential or simultaneous.
Type:
Application
Filed:
May 14, 2020
Publication date:
November 19, 2020
Applicants:
Applied Materials, Inc., Wayne State University
Inventors:
Thomas Knisley, Keenan N. Woods, Mark Saly, Stefan Cwik, Charles H. Winter
Abstract: Disclosed is a semiconductor processing approach wherein a wafer twist is employed to increase etch rate, at select locations, along a hole or space end arc. By doing so, a finished hole may more closely resemble the shape of the incoming hole end. In some embodiments, a method may include providing an elongated contact hole formed in a semiconductor device, and etching the elongated contact hole while rotating the semiconductor device, wherein the etching is performed by an ion beam delivered at a non-zero angle relative to a plane defined by the semiconductor device. The elongated contact hole may be defined by a set of sidewalls opposite one another, and a first end and a second end connected to the set of sidewalls, wherein etching the elongated contact hole causes the elongated contact hole to change from an oval shape to a rectangular shape.
Abstract: Disclosed herein is a ceramic article or coating useful in semiconductor processing, which is resistant to erosion by halogen-containing plasmas. The ceramic article or coating is formed from a combination of yttrium oxide and zirconium oxide.
Type:
Grant
Filed:
January 18, 2019
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Jennifer Y. Sun, Ren-Guan Duan, Jie Yuan, Li Xu, Kenneth S. Collins
Abstract: Embodiments include a method of processing a substrate. In an embodiment, the method comprises flowing one or more source gasses into a processing chamber, and inducing a plasma from the source gases with a plasma source that is operated in a first mode. In an embodiment, the method may further comprise biasing the substrate with a DC power source that is operated in a second mode. In an embodiment, the method may further comprise depositing a film on the substrate.
Type:
Grant
Filed:
April 27, 2018
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Kelvin Chan, Travis Koh, Simon Huang, Philip Allan Kraus
Abstract: A radio frequency (RF) filter system for a substrate processing chamber comprises a first RF filter coupled to a first element of the processing chamber and a second RF filter coupled to the first element of the processing chamber. Each of the RF filters comprises a first filter stage configured to reject a first frequency, a second filter stage coupled to the first filter stage and configured to reject a second frequency, and a third filter stage coupled to the second filter stage and configured to reject the first frequency. Further, the first filter stage comprises a first inductor and a first capacitance, the second filter stage comprises a second inductor and a second capacitance, the third filter stage comprises a third inductor and a third capacitance.
Type:
Grant
Filed:
October 14, 2019
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Andrew Nguyen, Michael G. Chafin, Lu Liu, Anilkumar Rayaroth
Abstract: A holding arrangement for supporting a substrate carrier and a mask carrier during layer deposition in a processing chamber is provided. The holding arrangement includes two or more alignment actuators connectable to at least one of the substrate carrier and the mask carrier, wherein the holding arrangement is configured to support the substrate carrier in, or parallel to, a first plane, wherein a first alignment actuator of the two or more alignment actuators is configured to move the substrate carrier and the mask carrier relative to each other at least in a first direction, wherein a second alignment actuator of the two or more alignment actuators is configured to move the substrate carrier and the mask carrier relative to each other at least in the first direction and a second direction different from the first direction, and wherein the first direction and the second direction are in the first plane.
Type:
Grant
Filed:
January 12, 2015
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Tommaso Vercesi, Dieter Haas, Stefan Bangert, Oliver Heimel, Daniele Gislon
Abstract: Methods of etching a semiconductor substrate may include applying an etchant to the semiconductor substrate. The semiconductor substrate may include an exposed region of an oxygen-containing material and an exposed region of a nitrogen-containing material. The methods may include heating the semiconductor substrate from a first temperature to a second temperature. The methods may include maintaining the semiconductor substrate at the second temperature for a period of time sufficient to perform an etch of the nitrogen-containing material relative to the oxygen-containing material. The methods may also include quenching the etch subsequent the period of time.
Type:
Grant
Filed:
July 16, 2018
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Eric J. Bergman, John L. Klocke, Charles Sharbono, Kyle Moran Hanson, Paul McHugh
Abstract: Disclosed herein is a ceramic article or coating useful in semiconductor processing, which is resistant to erosion by halogen-containing plasmas. The ceramic article or coating is formed from a combination of yttrium oxide and zirconium oxide.
Type:
Grant
Filed:
January 18, 2019
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Jennifer Y. Sun, Ren-Guan Duan, Jie Yuan, Li Xu, Kenneth S. Collins
Abstract: A first metallization layer comprises a set of first conductive lines that extend along a first direction on a first dielectric layer on a substrate. Pillars are formed on recessed first dielectric layers and a second dielectric layer covers the pillars. A dual damascene etch provides a contact hole through the second dielectric layer and an etch removes the pillars to form air gaps.
Abstract: The present invention generally describes one ore more methods that are used to perform an annealing process on desired regions of a substrate. In one embodiment, an amount of energy is delivered to the surface of the substrate to preferentially melt certain desired regions of the substrate to remove unwanted damage created from prior processing steps (e.g., crystal damage from implant processes), more evenly distribute dopants in various regions of the substrate, and/or activate various regions of the substrate. The preferential melting processes will allow more uniform distribution of the dopants in the melted region, due to the increased diffusion rate and solubility of the dopant atoms in the molten region of the substrate. The creation of a melted region thus allows: 1) the dopant atoms to redistribute more uniformly, 2) defects created in prior processing steps to be removed, and 3) regions that have hyper-abrupt dopant concentrations to be formed.
Type:
Grant
Filed:
November 26, 2018
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Paul Carey, Aaron Muir Hunter, Dean Jennings, Abhilash J. Mayur, Stephen Moffatt, William Schaffer, Timothy N. Thomas, Mark Yam
Abstract: Processing methods may be performed to expose a contact region on a semiconductor substrate. The methods may include selectively recessing a first metal on a semiconductor substrate with respect to an exposed first dielectric material. The methods may include forming a liner over the recessed first metal and the exposed first dielectric material. The methods may include forming a second dielectric material over the liner. The methods may include forming a hard mask over selected regions of the second dielectric material. The methods may also include selectively removing the second dielectric material to expose a portion of the liner overlying the recessed first metal.
Abstract: Techniques for deposition of high-density dielectric films for patterning applications are described. More particularly, a method of processing a substrate is provided. The method includes flowing a precursor-containing gas mixture into a processing volume of a processing chamber having a substrate positioned on an electrostatic chuck. The substrate is maintained at a pressure between about 0.1 mTorr and about 10 Torr. A plasma is generated at the substrate level by applying a first RF bias to the electrostatic chuck to deposit a dielectric film on the substrate. The dielectric film has a refractive index in a range of about 1.5 to about 3.
Type:
Grant
Filed:
July 15, 2019
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Eswaranand Venkatasubramanian, Samuel E. Gottheim, Pramit Manna, Abhijit Basu Mallick
Abstract: Embodiments described herein generally relate to a susceptor support for supporting a susceptor in a deposition process. The susceptor support includes a shaft, a plate with a first major surface coupled to the shaft, and a support element extending from a second major surface of the plate. The plate may be made of a material that is optically transparent to the radiation energy from a plurality of energy sources disposed below the plate. The plate may have a thickness that is small enough to minimize radiation transmission loss and large enough to be thermally and mechanically stable to support the susceptor during processing. The thickness of the plate may range from about 2 mm to about 20 mm.
Type:
Grant
Filed:
March 27, 2017
Date of Patent:
November 17, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Richard O. Collins, Errol Antonio C. Sanchez, David K. Carlson, Mehmet Tugrul Samir
Abstract: A method of forming an electronic device is disclosed. The method comprises forming a barrier layer on a silicon layer, and depositing a silicon oxide layer on the barrier layer. The formation of the barrier layer on the silicon layer minimizes parasitic oxidation of the underlying silicon layer and minimizes defects in the silicon layer.
Type:
Application
Filed:
May 4, 2020
Publication date:
November 12, 2020
Applicant:
Applied Materials, Inc.
Inventors:
Benjamin Colombeau, Johanes F. Swenberg, Steven C.H. Hung