Abstract: A method of controlling polishing includes polishing a substrate at a first polishing station, monitoring the substrate with a first eddy current monitoring system to generate a first signal, determining an ending value of the first signal for an end of polishing of the substrate at the first polishing station, determining a first temperature at the first polishing station, polishing the substrate at a second polishing station, monitoring the substrate with a second eddy current monitoring system to generate a second signal, determining a starting value of the second signal for a start of polishing of the substrate at the second polishing station, determining a gain for the second polishing station based on the ending value, the starting value and the first temperature, and calculating a third signal based on the second signal and the gain.

Abstract: A method and apparatus for processing a semiconductor substrate are described herein. A process system described herein includes a plasma source and a flow distribution plate. A method described herein includes generating fluorine radicals or ions, delivering the fluorine radicals or ions through one or more plasma blocking screens to a volume defined by the flow distribution plate and one of one or more plasma blocking screens, delivering oxygen and hydrogen to the volume, mixing the oxygen and hydrogen with fluorine radicals or ions to form hydrogen fluoride, flowing hydrogen fluoride through the flow distribution plate, and etching a substrate using bifluoride. The concentration of fluorine radicals or ions on the surface of the substrate is reduced to less than about two percent.

Abstract: The present disclosure provides methods for etching a silicon material in a device structure in semiconductor applications. In one example, a method for etching features in a silicon material includes performing a remote plasma process formed from an etching gas mixture including HF gas without nitrogen etchants to remove a silicon material disposed on a substrate.

Abstract: Embodiments described herein relate to methods and apparatus for performing immersion field guided post exposure bake processes. Embodiments of apparatus described herein include a chamber body defining a processing volume. A pedestal may be disposed within the processing volume and a first electrode may be coupled to the pedestal. A moveable stem may extend through the chamber body opposite the pedestal and a second electrode may be coupled to the moveable stem. In certain embodiments, a fluid containment ring may be coupled to the pedestal and a dielectric containment ring may be coupled to the second electrode.

Abstract: The present disclosure relates to an apparatus for heating and supporting a substrate in a processing chamber. A substrate support assembly includes a heated plate having a substrate supporting surface on a front side and a cantilever arm extending from a backside of the heated plate. The heated plate is configured to support and heat a substrate on the substrate supporting surface. The cantilever arm has a first end attached to the heated plate near a central axis of the heated plate, and a second end extending radially outwards from the central axis.

Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.

Abstract: Exemplary methods for etching a germanium-containing material may include forming a plasma of a fluorine-containing precursor in a remote plasma region of a semiconductor processing chamber. The methods may include flowing effluents of the fluorine-containing precursor through apertures defined in a chamber component. The apertures may be coated with a catalytic material. The methods may include reducing a concentration of fluorine radicals in the plasma effluents with the catalytic material. The methods may also include delivering the plasma effluents to a processing region of the semiconductor processing chamber. A substrate having an exposed region of a germanium-containing material may be housed within the processing region. The methods may further include etching the germanium-containing material.

Abstract: Embodiments of the present technology may include a method of etching. The method may include mixing plasma effluents with a gas in a first section of a chamber to form a first mixture. The method may also include flowing the first mixture to a substrate in a second section of the chamber. The first section and the second section may include nickel plated material. The method may further include reacting the first mixture with the substrate to etch a first layer selectively over a second layer. In addition, the method may include forming a second mixture including products from reacting the first mixture with the substrate.

Abstract: A method and a light detector that includes (i) a photon to electron converter a photon to one or more photoelectrons; (ii) a photoelectron detection circuit that includes a photoelectron sensing region; (iii) a chamber; (iv) a bias circuit that is configured to supply to the light detector one or more biasing signals for accelerating a propagation of the one or more photoelectrons within the chamber and towards the photoelectron sensing region; (iv) a photoelectron manipulator that is configured to operate in a selected operational mode out of multiple operational modes that differ by their level of blocking, (v) a controller that is configured to control the photoelectron manipulator based on a feedback about the at least one of (a) the photon, (b) the one or more photoelectrons, (c) a previous photon and, (d) previous one or more photoelectrons.

Abstract: Apparatus and methods for measuring the proximity between two components using a hardstop, an actuator and an emitter/detector passing light through a passage in the actuator are disclosed. The passage provides attenuation to the light which changes as the gap between the components changes allowing the measurement and control of the gap. Methods of determining the topology of the components using the apparatus are also described.

Abstract: A substrate carrier door assembly including relatively high sealing force that can be modulated. Substrate carrier door assembly includes a carrier door configured to seal to a carrier body, a first attraction member on the carrier body, and a second attraction member on the carrier door. Attraction members are selected from a group of a magnetic material and a permanent magnet. Substrate carrier door assembly includes a magnetic field generator energizable to reduce attraction force between the attraction members making the carrier door relatively easier to remove, yet providing enhanced sealing when not energized. Substrate carriers including the substrate carrier door assembly and methods of processing substrates are provided. A substrate carrier including a port configured to allow gas to be injected into, or removed from, a carrier chamber, and a magnetic port seal is also disclosed, as are numerous other aspects.

Abstract: To manufacture a coating for an article for a semiconductor processing chamber, the article including a body of at least one of Al, Al2O3, or SiC is provided and a ceramic coating is coated on the body, wherein the ceramic coating includes a compound of Y2O3, Al2O3, and ZrO2. The ceramic coating is applied to the body by a method including providing a plasma spraying system having a plasma current in the range of between about 100 A to about 1000 A, positioning a torch standoff of the plasma spraying system a distance from the body between about 60 mm and about 250 mm, flowing a first gas through the plasma spraying system at a rate of between about 30 L/min and about 400 L/min, and plasma spray coating the body to form a ceramic coating, wherein splats of the coating are amorphous and have a pancake shape.

Abstract: Embodiments of the present invention provides methods to etching a mask layer, e.g., an absorber layer, disposed in a film stack for manufacturing a photomask in EUV applications and phase shift and binary photomask applications. In one embodiment, a method of etching an absorber layer disposed on a photomask includes transferring a film stack into an etching chamber, the film stack having a chromium containing layer partially exposed through a patterned photoresist layer, providing an etching gas mixture including Cl2, O2 and at least one hydrocarbon gas in to a processing chamber, wherein the Cl2 and O2 is supplied at a Cl2:O2 ratio greater than about 9, supplying a RF source power to form a plasma from the etching gas mixture, and etching the chromium containing layer through the patterned photoresist layer in the presence of the plasma.

Abstract: A magnetic handling assembly for thin-film processing of a substrate, a system and method for assembling and disassembling a shadow mask to cover a top of a workpiece for exposure to a processing condition. The assembly may include a magnetic handling carrier and a shadow mask disposed over, and magnetically coupled to, the magnetic handling carrier to cover a top of a workpiece that is to be disposed between the shadow mask and the magnetic handling carrier when exposed to a processing condition. A system includes a first chamber with a first support to hold the shadow mask, a second support to hold a handling carrier, and an alignment system to align the shadow mask a workpiece to be disposed between the carrier and shadow mask. The first and second supports are moveable relative to each other.

Abstract: Apparatus and methods of dimension control and monitoring between a processes fixture and a susceptor, and position determination of wafers are described.

Abstract: In some embodiments, methods and systems are provided for improved handling of lithography masks including loading a mask via a first load port from a first carrier; inverting the mask using a first contact pad; cleaning the mask; inverting the mask using a second contact pad; and unloading the mask via a second load port into a second carrier. Numerous other aspects are provided.

Abstract: A substrate for use in fabrication of an integrated circuit has a layer with a plurality of conductive interconnects. The substrate includes a semiconductor body, a dielectric layer disposed over the semiconductor body, a plurality of conductive lines of a conductive material disposed in first trenches in the dielectric layer to provide the conductive interconnects, and a closed conductive loop structure of the conductive material disposed in second trenches in the dielectric layer. The closed conductive loop is not electrically connected to any of the conductive lines.

Abstract: A processing apparatus for processing devices, particularly devices including organic materials therein, is described. The processing apparatus includes a processing vacuum chamber; at least one evaporation source for organic material, wherein the at least one evaporation source includes at least one evaporation crucible, wherein the at least one evaporation crucible is configured to evaporate the organic material, and at least one distribution pipe with one or more outlets, wherein the at least one distribution pipe is in fluid communication with the at least one evaporation crucible; and a maintenance vacuum chamber connected with the processing vacuum chamber, wherein the at least one evaporation source can be transferred from the processing vacuum chamber to the maintenance vacuum chamber and from the maintenance vacuum chamber to the processing vacuum chamber.

Abstract: Implementations described herein generally relate to processes for the fabrication of semiconductor devices in which a self-assembled monolayer (SAM) is used to achieve selective area deposition. Methods described herein relate to alternating SAM molecule and hydroxyl moiety exposure operations which may be utilized to form SAM layers suitable for blocking deposition of subsequently deposited materials.

Abstract: Apparatus and methods for processing a semiconductor wafer including a susceptor assembly with recesses comprising at least three lift pins. The lift pins include a sleeve with a spring and pin positioned therein. The spring and pin elevate the wafer to a position where the wafer can be pre-heated and, upon compression, lowers the wafer to a processing position.