Patents Assigned to Applied Materials
  • SYSTEMS AND METHODS FOR WETTING SUBSTRATES
    Publication number: 20180182664
    Abstract: Methods of wetting a semiconductor substrate may include forming a controlled atmosphere in a processing chamber housing the semiconductor substrate. The semiconductor substrate may define a plurality of features, which may include vias. The methods may include flowing a wetting agent into the processing chamber. A chamber pressure may be maintained below about 100 kPa. The methods may also include wetting the plurality of features defined in the substrate.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 28, 2018
    Applicant: Applied Materials, Inc.
    Inventors: Paul McHugh, Bridger Hoerner, Marvin Bernt, Thomas H. Oberlitner, Brian Aegerter, Richard W. Plavidal, Andrew Anten, Adam McClure, Randy Harris
  • High performance flow battery
    Patent number: 10008729
    Abstract: High performance flow batteries, based on alkaline zinc/ferro-ferricyanide rechargeable (“ZnFe”) and similar flow batteries, may include one or more of the following improvements. First, the battery design has a cell stack comprising a low resistance positive electrode in at least one positive half cell and a low resistance negative electrode in at least one negative half cell, where the positive electrode and negative electrode resistances are selected for uniform high current density across a region of the cell stack. Second, a flow of electrolyte, such as zinc species in the ZnFe battery, with a high level of mixing through at least one negative half cell in a Zn deposition region proximate a deposition surface where the electrolyte close to the deposition surface has sufficiently high zinc concentration for deposition rates on the deposition surface that sustain the uniform high current density.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Joseph Grover Gordon, II, Alan J. Gotcher, Godfrey Sikha, Gregory J. Wilson
  • Corrosion resistant abatement system
    Patent number: 10005025
    Abstract: Embodiments disclosed herein include a plasma source, and an abatement system for abating compounds produced in semiconductor processes. In one embodiment, a plasma source is disclosed. The plasma source includes a body having an inlet and an outlet, and the inlet and the outlet are fluidly coupled within the body. The body further includes inside surfaces, and the inside surfaces are coated with yttrium oxide or diamond-like carbon. The plasma source further includes a flow splitter disposed in the body in a position that formed two flow paths between the inlet and the outlet, and a plasma generator disposed in a position operable to form a plasma within the body between the flow splitter and inside surfaces of the body.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc
    Inventors: Govinda Raj, Monika Agarwal, Hamid Mohiuddin, Kadthala R. Narendrnath
  • Multi-zone gas injection assembly with azimuthal and radial distribution control
    Patent number: 10008368
    Abstract: A gas injection system includes (a) a side gas plenum, (b) a plurality of N gas inlets coupled to said side gas plenum, (c) plural side gas outlets extending radially inwardly from said plenum, (d) an N-way gas flow ratio controller having N outputs coupled to said N gas inlets respectively, and (e) an M-way gas flow ratio controller having M outputs, respective ones of said M outputs coupled to said tunable gas nozzle and a gas input of said N-way gas flow ratio controller.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Yan Rozenzon, Kyle Tantiwong, Imad Yousif, Vladimir Knyazik, Bojenna Keating, Samer Banna
  • Electrostatic chuck assembly for high temperature processes
    Patent number: 10008404
    Abstract: An electrostatic chuck assembly includes a puck and a cooling plate. The puck includes an electrically insulative upper puck plate comprising one or more heating elements and one or more electrodes to electrostatically secure a substrate and further includes a lower puck plate bonded to the upper puck plate by a metal bond, the lower puck plate comprising a plurality of features distributed over a bottom side of the lower puck plate at a plurality of different distances from a center of the lower puck plate, wherein each of the plurality of features accommodates one of a plurality of fasteners. The cooling plate is coupled to the puck by the plurality of fasteners, wherein the plurality of fasteners each apply an approximately equal fastening force to couple the cooling plate to the puck.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventor: Vijay D. Parkhe
  • Seasoning process for establishing a stable process and extending chamber uptime for semiconductor chip processing
    Patent number: 10008366
    Abstract: Embodiments of the present disclosure generally provide improved methods for processing substrates with improved process stability, increased mean wafers between clean, and/or improved within wafer uniformity. One embodiment provides a method for seasoning one or more chamber components in a process chamber. The method includes placing a dummy substrate in the process chamber, flowing a processing gas mixture to the process chamber to react with the dummy substrate and generate a byproduct on the dummy substrate, and annealing the dummy substrate to sublimate the byproduct while at least one purge conduit of the process chamber is closed.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Sang Won Kang, Nicholas Celeste, Dmitry Lubomirsky, Peter Hillman, Douglas Brenton Hayden, Dongqing Yang
  • Electrostatic puck assembly with metal bonded backing plate for high temperature processes
    Patent number: 10008399
    Abstract: An electrostatic puck assembly includes an upper puck plate, a lower puck plate and a backing plate. The upper puck plate comprises AlN or Al2O3 and has a first coefficient of thermal expansion. The lower puck plate comprises a material having a second coefficient of thermal expansion that approximately matches the first coefficient of thermal expansion and is bonded to the upper puck plate by a first metal bond. The backing plate comprises AlN or Al2O3 and is bonded to the lower puck plate by a second metal bond.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventor: Vijay D. Parkhe
  • Dielectric/metal barrier integration to prevent copper diffusion
    Patent number: 10008448
    Abstract: An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber, wherein the substrate comprises a copper layer having an exposed surface and a low-k dielectric layer having an exposed surface, forming a metal layer over the exposed surface of the copper layer, wherein the exposed surface of the low-k dielectric layer is free from the metal layer, and forming a metal-based dielectric layer over the metal layer and over at least part of the exposed low-k dielectric surface, wherein the metal-based dielectric layer comprises an aluminum compound.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Mei-yee Shek
  • SEMICONDUCTOR PROCESSING APPARATUS WITH A CERAMIC-COMPRISING SURFACE WHICH EXHIBITS FRACTURE TOUGHNESS AND HALOGEN PLASMA RESISTANCE
    Publication number: 20180174866
    Abstract: A solid solution-comprising ceramic article useful in semiconductor processing, which article may be in the form of a solid, bulk ceramic, or may be in the form of a substrate having a ceramic coating of the same composition as the bulk ceramic material on at least one outer surface. The ceramic article is resistant to erosion by halogen-containing plasmas and provides advantageous mechanical properties. The solid solution-comprising ceramic article is formed from a combination of yttrium oxide and zirconium oxide. The ceramic-comprising article includes ceramic which is formed from zirconium oxide at a molar concentration ranging from about 96 mole % to about 91 mole %, and yttrium oxide at a molar concentration ranging from about 4 mole % to about 9 mole %.
    Type: Application
    Filed: November 26, 2013
    Publication date: June 21, 2018
    Applicant: Applied Materials, Inc.
    Inventors: Jennifer Y. Sun, Ren-Guan Duan, Jie Yuan, Li Xu, Kenneth S. Collins
  • CARRIER FOR SUPPORTING AT LEAST ONE SUBSTRATE DURING A SPUTTER DEPOSITION PROCESS, APPARATUS FOR SPUTTER DEPOSITION ON AT LEAST ONE SUBSTRATE, AND METHOD FOR SPUTTER DEPOSITION ON AT LEAST ONE SUBSTRATE
    Publication number: 20180171466
    Abstract: A carrier for supporting at least one substrate during a sputter deposition process is provided. The carrier includes a carrier body and an insulating portion provided at the carrier body. The insulating portion provides a surface of an electrically insulating material, wherein the surface is configured to face one or more sputter deposition sources during the sputter deposition process.
    Type: Application
    Filed: July 6, 2015
    Publication date: June 21, 2018
    Applicant: Applied Materials, Inc.
    Inventors: Stefan KELLER, Andre BRÜNING, Uwe SCHÜßLER, Thomas Werner ZILBAUER, Stefan BANGERT
  • Method and apparatus for protecting metal interconnect from halogen based precursors
    Patent number: 10002834
    Abstract: A method and apparatus for forming an interconnect on a substrate is provided. A protective layer is formed on the substrate and in a via formed on the substrate wherein the protective layer is resistant to a halogen containing material. A barrier layer is formed on top of the protective layer. The barrier layer comprises a halogen containing material. A metal layer is deposited over the barrier layer. In another embodiment, the protective layer is selectively deposited in the via.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: June 19, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Mehul B. Naik, Paul F. Ma, Tae Hong Ha, Srinivas Guggilla
  • Detection of grounding strap breakage
    Patent number: 10002748
    Abstract: The present invention generally relates to a method for detecting the breakage of one or more grounding straps without stopping processing or opening the processing chamber for inspection. In one embodiment, a method for detecting grounding strap breakage in a processing chamber includes monitoring real-time RF related data from plasma generated in the processing chamber. The method also includes comparing the real-time RF related data with a pre-determined threshold RF related data. The method includes generating an alert if the real-time RF related data meets or exceeds the pre-determined threshold RF related data. In one embodiment, the RF related data includes RF frequency, direct current voltage, voltage peak-to-peak, and/or RF reflected power.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: June 19, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Ilias Iliopoulos, Shuo Na, Kelby Yancy, Chunsheng Chen
  • Cleaning process that precipitates yttrium oxy-flouride
    Patent number: 9999907
    Abstract: A method includes immersing an article comprising a yttrium based oxide in an acidic cleaning solution comprising water and 1-10 mol % HF acid. A portion of the yttrium based oxide is dissolved by the HF acid. A yttrium based oxy-fluoride is formed based on a reaction between the HF acid and the dissolved portion of the yttrium based. The yttrium based oxy-fluoride is precipitated onto the article over the yttrium based oxide to form a yttrium based oxy-fluoride coating. The acidic cleaning solution may include a yttrium based salt, which may additionally react with the HF acid to form more of the yttrium based oxy-fluoride.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: June 19, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Chengtsin Lee, Jennifer Y. Sun, Yikai Chen
  • Plasma treatment process for in-situ chamber cleaning efficiency enhancement in plasma processing chamber
    Patent number: 10002745
    Abstract: Embodiments of the disclosure include methods for in-situ chamber cleaning efficiency enhancement process for a plasma processing chamber utilized for a semiconductor substrate fabrication process. In one embodiment, a method for performing a plasma treatment process after cleaning a plasma process includes performing a cleaning process in a plasma processing chamber in absent of a substrate disposed thereon, subsequently supplying a plasma treatment gas mixture including at least a hydrogen containing gas and/or an oxygen containing gas into the plasma processing chamber, applying a RF source power to the processing chamber to form a plasma from the plasma treatment gas mixture, and plasma treating an interior surface of the processing chamber.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: June 19, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Lin Zhang, Xuesong Lu, Andrew V. Le, Jang Seok Oh, Xinhai Han
  • Printed chemical mechanical polishing pad having printed window
    Patent number: 9993907
    Abstract: A method of fabricating a polishing pad includes determining a desired distribution of voids to be introduced within a polymer matrix of a polishing layer of the polishing pad. Electronic control signals configured to be read by a 3D printer are generated which specify the locations where a polymer matrix precursor is to be deposited, and specify the locations of the desired distribution of voids where no material is to be deposited. A plurality of layers of the polymer matrix corresponding to the plurality of the first locations is successfully deposited with the 3D printer. Each layer of the plurality of layers of polymer matrix is deposited by ejecting a polymer matrix precursor from a nozzle. The polymer matrix precursor is solidified to form a solidified polymer matrix having the desired distribution of voids.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: June 12, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Laxman Murugesh, Kadthala Ramaya Narendrnath
  • Electrostatic chuck having thermally isolated zones with minimal crosstalk
    Patent number: 9991148
    Abstract: A substrate support assembly includes a ceramic puck and a thermally conductive base having an upper surface that is bonded to a lower surface of the ceramic puck. The thermally conductive base includes a plurality of thermal zones and a plurality of thermal isolators that extend from the upper surface of the thermally conductive base towards a lower surface of the thermally conductive base, wherein each of the plurality of thermal isolators provides approximate thermal isolation between two of the plurality of thermal zones at the upper surface of the thermally conductive base.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: June 5, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Vijay D. Parkhe, Konstantin Makhratchev, Jason Della Rosa, Hamid Noorbakhsh, Brad L. Mays, Douglas A. Buchberger, Jr.
  • Apparatus for etching high aspect ratio features
    Patent number: 9991109
    Abstract: Embodiments of the invention provide a method and apparatus, such as a processing chamber, suitable for etching high aspect ratio features. Other embodiments include a showerhead assembly for use in the processing chamber. In one embodiment, a processing chamber includes a chamber body having a showerhead assembly and substrate support disposed therein. The showerhead assembly includes at least two fluidly isolated plenums, a region transmissive to an optical metrology signal, and a plurality of gas passages formed through the showerhead assembly fluidly coupling the plenums to the interior volume of the chamber body.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: June 5, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Xiaoping Zhou, Jeffrey William Dietz
  • Substrate support bushing
    Patent number: 9991153
    Abstract: In one embodiment, a substrate support bushing for a lift pin used in a semiconductor processing chamber is provided. The bushing includes an elongated housing sized to guide the lift pin in a substrate support pedestal. The housing has a longitudinal bore formed through the housing. The housing includes at least one passageway slot extending and open to substantially the entire length of the bore. In another embodiment, a method for transferring a substrate from a substrate support pedestal is provided. The method includes displacing a lift pin through a central bore toward a substrate disposed on a substrate support pedestal. The bore has at least one slot extending substantially along and open to the central bore. The method further includes spacing the substrate from the substrate support pedestal on the lift pin.
    Type: Grant
    Filed: February 22, 2014
    Date of Patent: June 5, 2018
    Assignee: Applied Materials, Inc.
    Inventor: Tao Hou
  • Hybrid carbon hardmask for lateral hardmask recess reduction
    Patent number: 9991118
    Abstract: Implementations of the present disclosure relate to improved hardmask materials and methods for patterning and etching of substrates. A plurality of hardmasks may be utilized in combination with patterning and etching processes to enable advanced device architectures. In one implementation, a first hardmask and a second hardmask disposed on a substrate having various material layers disposed thereon. The second hardmask may be utilized to pattern the first hardmask during a first etching process. A third hardmask may be deposited over the first and second hardmasks and a second etching process may be utilized to form channels in the material layers.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: June 5, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Thomas Jongwan Kwon, Rui Cheng, Abhijit Basu Mallick, Er-Xuan Ping, Jaesoo Ahn
  • Selective etching of amorphous silicon over epitaxial silicon
    Patent number: 9991129
    Abstract: Systems and methods of etching a semiconductor substrate may include concurrent exposure of the semiconductor substrate to a chlorine-containing precursor and ultraviolet (UV) light. The semiconductor substrate may include exposed amorphous silicon. The semiconductor substrate may further include exposed crystalline silicon or underlying crystalline silicon. The methods may further include removing amorphous silicon faster than crystalline silicon.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: June 5, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Geetika Bajaj, Prerna Sonthalia Goradia, Robert Jan Visser