Patents Assigned to Applied Science & Technology
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Publication number: 20120188435Abstract: A compact camera modules has first, second, and third lens groups that move along an optical axis. A stepping motor is centered on the optical axis rather than offset from the optical axis. The motor has two coils that are fixed in place and a shared rotating magnet. The magnet is attached to a rotating guide that has slots to move the first and second lens groups as it rotates. The two coils are alternately energized rotate the magnet, the rotating guide, and to move the first and second lens groups for zoom. The magnet has alternating thicker and thinner segments of opposite polarity. The thicker segments exert a greater force on an autofocus coil that is energized to move the third lens for the autofocus function. The same shared rotating magnet is used for both zoom and autofocus functions. A more compact design is possible using a shared magnet.Type: ApplicationFiled: January 25, 2011Publication date: July 26, 2012Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Kin Ming FAN, Kwok Sing CHENG
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Publication number: 20120126736Abstract: A motor driver circuit for driving the gate node of a high-side driver transistor to a boosted voltage from a charge pump draws little or no static current from the charge pump. The gate node is pulled to the boosted voltage by a p-channel pullup-control transistor that is driven by p-channel transistors that are pumped by capacitors that cut off current flow to ground from the charge pump. An n-channel output-shorting transistor shorts the gate node to the output when the high-side driver is turned off. A coupling capacitor initializes the shorting transistor for each output transition. A p-channel output-sensing transistor generates a feedback to a second stage that drives the coupling capacitor. P-channel diode transistors and an n-channel equalizing transistor control the voltage on the coupling capacitor.Type: ApplicationFiled: November 18, 2010Publication date: May 24, 2012Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Lap Chi (David) LEUNG, Yat Tung LAI, Chun Fai WONG, Kam Hung CHAN, Kwok Kuen KWONG
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Publication number: 20120126901Abstract: A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.Type: ApplicationFiled: November 18, 2010Publication date: May 24, 2012Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Chi Tak (Gerry) LEUNG, Chik Wai (David) NG, Hing Kit KWAN, Wai Kit (Victor) SO, Po Wah CHANG, Wing Cheong MAK, Kwok Kuen KWONG
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Publication number: 20120032718Abstract: A Digital Phase-Locked Loop (DPLL) has a digitally-controlled oscillator (DCO) that generates an output clock frequency determined by a digital input with most-significant-bits (MSB's) and a least-significant-bit (LSB). The LSB is generated by a Pulse-Width-Modulation (PWM) controller clocked by a control clock that is the output clock divided by C. A reference clock is compared to a feedback clock that is the output clock divided by M. The PWM controller generates M/C LSB's for each reference clock period and loads them in parallel to a parallel-to-serial shift register that serially delivers the LSBs. The pulse width is determined by a fine digital loop filter that filters phase comparison results using a fine time resolution. A coarse digital loop filter generates the MSB's from phase comparison results using a coarse time resolution. LSB waveforms are dithered by randomly selecting high-going or low-going pulses and randomly adjusting pulse widths.Type: ApplicationFiled: August 5, 2010Publication date: February 9, 2012Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Chi Fat CHAN, Chien-Wei LIN, Gordon CHUNG
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Publication number: 20110299202Abstract: A power-to-ground clamp transistor provides electrostatic discharge (ESD) protection. A filter capacitor and resistor generate a filter voltage that is buffered by three stages to drive the gate of the clamp transistor. The filter capacitor is about twenty times smaller than in a conventional clamp circuit. Feedback in the circuit keeps the clamp transistor turned on after the R-C time constant of the capacitor and resistor in the filer has elapsed, allowing for a smaller capacitor to turn on the clamp transistor longer. A sub-threshold-conducting transistor in the first stage conducts only a small sub-threshold current, which extends the discharge time of the first stage. The gate of the sub-threshold-conducting transistor is driven by feedback from the second stage. A feed-forward resistor has a high resistance value to slowly raise the voltage of the second stage from the filter voltage, and thus slowly raise the gate of the sub-threshold-conducting transistor.Type: ApplicationFiled: June 8, 2010Publication date: December 8, 2011Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Xaiowu CAI, Beiping YAN, Xiaoyang DU, Xiao HUO, Xiaoyong HAN, Bingyong YAN
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Patent number: 8072664Abstract: A biaxial micro-electromechanical (MEMS) device is disclosed. The device includes a gimbal rotatable about a gimbal axis of rotation. A pair of gimbal torsion bars connects the gimbal to a support along the gimbal rotation axis. A mirror plate is rotatable about a mirror axis of rotation, the mirror plate rotation axis being substantially perpendicular to the gimbal rotation axis. A pair of mirror plate torsion bars connects the mirror plate to the gimbal along the mirror plate axis of rotation. One or more gimbal moment-of-inertia-altering blocks are positioned on a surface of the mirror plate away from the gimbal axis of rotation. Additionally, one or more mirror plate moment-of-inertia-altering blocks are positioned on a surface of the mirror plate away from the mirror plate rotation axis such that the distance from the mirror plate axis determines a resonant frequency of the biaxial MEMS device.Type: GrantFiled: May 26, 2010Date of Patent: December 6, 2011Assignee: Hong Kong Applied Science & Technology Research Institute, Ltd.Inventors: Wei Ma, Francis Chee-Shuen Lee, Ho Yin Chan
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Patent number: 8062648Abstract: The present invention relates to a composition which comprises as active ingredients a combination of melatonin, ginkgo biloba and biotin. The composition is particularly suitable for producing formulations for topical application in the hair.Type: GrantFiled: October 30, 2003Date of Patent: November 22, 2011Assignee: ASAT AG Applied Science & TechnologyInventor: Hans W. Schmid
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Publication number: 20110267008Abstract: A charge/discharge protection circuit protects a battery from inadvertent shorting on a charger node that can connect to a charger or to a power supply of a portable electronic device. A single n-channel power transistor has a gate that controls a channel between the battery and the charger node. The gate is connected to the charger node by a gate-coupling transistor to turn off the power transistor, providing battery isolation. The gate is driven by a voltage-boosted clock through a switch activated by an enable signal. The enable signal also activates a grounding transistor to ground a gate of the gate-coupling transistor. A comparator compares voltages of the charger and battery nodes, and the compare output is latched to generate the enable signal. An inverse enable signal activates a second switch that drives the voltage-boosted clock to the gate of the gate-coupling transistor to turn off the power transistor.Type: ApplicationFiled: July 8, 2011Publication date: November 3, 2011Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Kwok Kuen Kwong, Yat To Wong, Ho Ming (Karen) Wan, Chik Wai Ng
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Publication number: 20110221938Abstract: A Optical Black Pixel (OBP) cancellation circuit corrects offsets in sensors in a CCD/CMOS image sensor when reading dark pixels such at the periphery. A pixel voltage is switched to a sampling capacitor during two phases of the same pixel pulse. Sampling capacitors and feedback capacitors connect to differential inputs of an amplifier. An accumulating capacitor accumulates voltage differences and generates a common-mode voltage that is fed back to another sampling capacitor that stores an amplifier offset. The sampling capacitor and accumulating capacitor and their associated switches form a discrete-time first-order low-pass filter that filters the pixel voltage during the first phase. In the second phase the amplifier acts as a unity-gain amplifier to output an average of the pixel voltage differences generated during an OBP time when blackened or covered pixels are read from the image sensor.Type: ApplicationFiled: March 11, 2010Publication date: September 15, 2011Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Lap Chi (David) LEUNG, Yat Tung LAI, Chun Fai WONG, Kam Hung CHAN, Kwok Kuen (David) KWONG
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Patent number: 8017645Abstract: The present invention relates to a disposable container for a medicament or cosmetic agent for topical application, containing a single dose of melatonin or of a melatonin derivative which corresponds to a locally effective dose but which does not cause any systemic effect.Type: GrantFiled: May 7, 2008Date of Patent: September 13, 2011Assignee: ASAT AG Applied Science & TechnologyInventor: Hans W. Schmid
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Publication number: 20110216559Abstract: A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator. A primary-side control circuit can use either a Quasi-Resonant (QR) or a Pulse-Width-Modulation (PWM) control loop to switch primary current through the transformer on and off. A feedback voltage is compared to a primary-side voltage sensed from the primary current loop to turn the switch on and off. A multiplier loop generates the feedback voltage using a multiplier. A level-shift inverter and a low-pass filter act as the multiplier by multiplying an off duty cycle of the switch by the feedback voltage to generate a filtered voltage. A high-gain error amp compares the filtered voltage to a reference voltage to generate the feedback voltage. The multiplier produces a simple relationship between the secondary current and the reference voltage, yielding simplified current control.Type: ApplicationFiled: March 5, 2010Publication date: September 8, 2011Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Chik Wai (David) Ng, Hing Kit Kwan, Po Wah Chang, Wai Kit (Victor) So, Kwok Kuen Kwong
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Patent number: 7999512Abstract: A charge/discharge protection circuit protects a battery from inadvertent shorting on a charger node that can connect to a charger or to a power supply of a portable electronic device. A single n-channel power transistor has a gate that controls a channel between the battery and the charger node. The gate is connected to the charger node by a gate-coupling transistor to turn off the power transistor, providing battery isolation. The gate is driven by a voltage-boosted clock through a switch activated by an enable signal. The enable signal also activates a grounding transistor to ground a gate of the gate-coupling transistor. A comparator compares voltages of the charger and battery nodes, and the compare output is latched to generate the enable signal. An inverse enable signal activates a second switch that drives the voltage-boosted clock to the gate of the gate-coupling transistor to turn off the power transistor.Type: GrantFiled: December 16, 2008Date of Patent: August 16, 2011Assignee: Hong Kong Applied Science & Technology Research Institute Company, Ltd.Inventors: Kwok Kuen David Kwong, Yat To William Wong, Ho Ming Karen Wan, Chik Wai David Ng
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Publication number: 20110163799Abstract: A bandgap reference circuit has trimming-up resistors and trimming-down resistors for bi-directional trimming. PNP transistors have base and collectors grounded and emitters connected to parallel resistors. A difference resistor drives an inverting input of an op amp that drives a transistor that generates the bandgap reference voltage Vbg. A sensing resistor connects Vbg to a splitting node that connects to the non-inverting input through a first parallel resistor. The splitting node also connects through a second parallel resistor to the inverting input. Fuses or switches enable the trimming-up and trimming-down resistors. The trimming-up resistors are in series with the sensing resistor and the trimming-down resistors are in series with an output resistor that connects Vbg to reference voltage Vref. The circuit can be designed for a more typical process since bi-directional trimming allows Vref to be raised or lowered. Many circuits need no trimming when targeted for the typical process.Type: ApplicationFiled: January 4, 2010Publication date: July 7, 2011Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Xiao Fei KUANG, Kam Chuen WAN, Kwai Chi CHAN, Yat To (William) WONG, Kwok Kuen (David) KWONG
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Publication number: 20100315748Abstract: An electro-static-discharge (ESD) protection circuit protects core transistors. An internal node to the gate of an n-channel output transistor connects to the drain of an n-channel gate-grounding transistor to ground. The gate of the gate-grounding transistor is a coupled-gate node that is coupled by an ESD coupling capacitor to the output and to ground by an n-channel disabling transistor and a leaker resistor. The gate of the n-channel disabling transistor is connected to power and disables the ESD protection circuit when powered. An ESD pulse applied to the output is coupled through the ESD coupling capacitor to pulse high the coupled-gate node and turn on the gate-grounding transistor to ground the gate of the n-channel output transistor, which breaks down to shunt ESD current. The ESD pulse is prevented from coupling through a parasitic Miller capacitor of the n-channel output transistor by the gate-grounding transistor.Type: ApplicationFiled: June 10, 2009Publication date: December 16, 2010Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Kwok Kuen Kwong, Chik Wai Ng, Wai Kit (Victor) SO, Hing Kit KWAN
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Publication number: 20100212729Abstract: A multi-junction device can be used as a high efficiency solar cell, laser, or light-emitting diode. Multiple epitaxial films grown over a substrate have very low defect densities because an initial epitaxial layer is a coincidence-site lattice (CSL) layer that has III-V atoms that fit into lattice sites of Silicon atoms in the substrate. The substrate is a Si (111) substrate which has a step height between adjacent terraces on its surface that closely matches the step height of GaAs (111). Any anti-phase boundaries (APBs) formed at terrace steps cancel out within a few atomic layers of GaAs in the (111) orientation since the polarity of the GaAs molecule is aligned with the (111) direction. A low CSL growth temperature grows GaAs horizontally along Si terraces before vertical growth. Tunnel diode and active solar-cell junction layers can be grown over the CSL at higher temperatures.Type: ApplicationFiled: February 24, 2009Publication date: August 26, 2010Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventor: Chung Chi Hsu
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Publication number: 20100164625Abstract: An error amplifier can be used to control a power regulator transistor. The error amplifier has a main amplifier, a pull-up auxiliary amplifier, and a pull-down auxiliary amplifier that all drive an output. A compensating capacitor on the output sets a single dominant pole for all amplifiers, increasing stability. High slew rates are provided by increased slew current from the auxiliary amplifiers that turn on when the differential input has an absolute voltage difference larger than an intentional offset. The intentional offset is introduced into the auxiliary amplifiers by adjusting a p-channel to n-channel transistor ratio in a leg of the auxiliary amplifiers. A source degenerated resistor in the main amplifier reduces supply headroom and increases linearity by connecting sources of two differential transistors that receive the differential input. Cascode transistors increase gain and output impedance. Reliability is increased as no positive feedback is used in the amplifiers.Type: ApplicationFiled: December 30, 2008Publication date: July 1, 2010Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Yat To (William) Wong, Chik Wai (David) Ng, Ho Ming (Karen) Wan, Kam Chuen Wan, Kwok Kuen (David) Kwong
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Publication number: 20100164761Abstract: A re-configurable circuit acts as an Analog-to-Digital Converter (ADC) and as a digital-to-analog converter (DAC). An array of binary-weighted capacitors stores an analog input. Switches connect different capacitors in the array to fixed voltages that cause charge-sharing with a terminal capacitor. The voltage of the terminal capacitor is compared by a re-configurable comparator stage for each different combination of the capacitors. The comparison results are analyzed to determine the closest digital value for the analog input. In DAC mode, the array capacitors are switched based on an input digital value. The switched capacitors connect to a charge-sharing line to generate an analog voltage that is applied to the re-configurable comparator stage. A differential amplifier generates a buffered analog voltage that is fed back to the other input of the re-configurable comparator stage for unity gain. The gain of the re-configurable comparator stage adjusts for ADC and DAC modes.Type: ApplicationFiled: December 30, 2008Publication date: July 1, 2010Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Ho Ming Karen Wan, Yat To William Wong, Kwai Chi Chan, Hok Mo Yau, Tin Ho Andy Wu, Kwok Kuen David Kwong
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Publication number: 20100164770Abstract: An Analog-to-Digital Converter (ADC) has a Successive-Approximation-Register (SAR) driving a digital-to-analog converter (DAC) that generates an analog voltage compared to an input voltage by a series of stages. The last stage feeds a compare signal to the SAR. Each stage has a dual-input differential amplifier that operates as a unity gain op amp during an auto-zeroing phase and as a high-speed low-gain amplifier during an amplifying phase. The dual-input differential amplifier has two pairs of differential inputs. A secondary pair has an offset-storing capacitor across it, and connects to the output pair through feedback switches during auto-zeroing. A primary pair connects to stage inputs through input switches during the amplifying phase. Since two pairs of differential inputs are provided to the dual-input differential amplifier, the offset capacitor is completely isolated from the input pair. The current sink in the dual-input differential amplifier is adjusted higher during the amplifying period.Type: ApplicationFiled: December 31, 2008Publication date: July 1, 2010Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Ho Ming (Karen) Wan, Yat To (William) Wong, Kwai Chi Chan, Kwok Kuen Kwong
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Publication number: 20100148727Abstract: A charge/discharge protection circuit protects a battery from inadvertent shorting on a charger node that can connect to a charger or to a power supply of a portable electronic device. A single n-channel power transistor has a gate that controls a channel between the battery and the charger node. The gate is connected to the charger node by a gate-coupling transistor to turn off the power transistor, providing battery isolation. The gate is driven by a voltage-boosted clock through a switch activated by an enable signal. The enable signal also activates a grounding transistor to ground a gate of the gate-coupling transistor. A comparator compares voltages of the charger and battery nodes, and the compare output is latched to generate the enable signal. An inverse enable signal activates a second switch that drives the voltage-boosted clock to the gate of the gate-coupling transistor to turn off the power transistor.Type: ApplicationFiled: December 16, 2008Publication date: June 17, 2010Applicant: Hong Kong Applied Science & Technology Research Institute Company LimitedInventors: Kwok Kuen Kwong, Yat To Wong, Ho Ming (Karen) Wan, Chik Wai Ng
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Patent number: 7701567Abstract: An optoelectronic distance sensor with slant component 200 having a spacer 202 bonded on a mother substrate 201 is disclosed. The spacer 202 has slant surface for receiving one or more optoelectronic components 204, such as an optical sensor, that are mounted at an angle to the mother substrate 201. Such electronic components 204 are bonded on a daughter substrate 203 which attaches to the spacer 202 at the slant surface. The optoelectronic assembly 200 can be manufactured at chip-level, including by one ore more of exemplary methods disclosed herein.Type: GrantFiled: March 6, 2008Date of Patent: April 20, 2010Assignee: Hong Kong Applied Science & Technology Research Institute Co., Ltd.Inventor: Yeung Ming Chow