Abstract: Provided is a method and an apparatus for signaling allocation of resources in a joint transmission communication system. The method includes determining one of a plurality of resource allocation schemes to be implemented by two or more of a plurality of transmission points (TPs) comprising a set of coordinated TPs for enabling said two or more of said TPs to transmit data to a scheduled user equipment (UE). The method may comprise determining a bit length of a resource allocation field for a resource allocation signal message based on a number N of resource blocks groups (RBGs) related to a bandwidth of the joint transmission communication system and a number M of TPs comprising said set of coordinated TPs and further include formatting the resource allocation signal message to provide the resource allocation field based on said determined bit length. The resource allocation signal message is transmitted from only one of said set of coordinated TPs to said scheduled UE.

Abstract: A method that prevents overload to input source and reduces parasitic inductance in an inverter circuit with dead-time control. A sensing capacitor senses temperatures of transistors in the inverter circuit. A delay generator changes delay times in response to receiving the temperatures of the transistors from the sensing capacitor. A dead time generation unit changes the dead times for the transistors in response to changes in the delay times.

Abstract: A programmable-threshold power supply selector has two power-supply inputs VDD1 and VDD2. The higher of these two voltages is pre-selected as a common supply that powers all transistors and circuitry in the programmable-threshold power supply selector, including substrates under transistors. An open-loop decision circuit is very stable since it uses no feedback. A tunable voltage divider divides VDD1 by a programmable divisor. The divided VDD1 is compared to a reference voltage to generate switch-control signals. The switch-control signals drive the gates of p-channel switch transistors that connect either VDD1 or VDD2 to an output supply voltage. The different programmable divisor values effectively cause VDD1 to be compared to a programmable threshold voltage VTH. The switch transistors switch the output supply voltage to VDD2 only when VDD1 falls below VTH. The output supply voltage remains at VDD1 even when VDD1 falls below VDD2, eliminating unnecessary power switching.

Abstract: A Quadrature-In, Quadrature-Out (QIQO) clock divider divides by an odd divisor, such as three. An IQ input clock has in-phase and quadrature differential signals. Four stages of dynamic logic are arranged into a loop, with each stage output being one of four IQ output signals that have 90-degree phase separations. Each stage output drives the gates of a p-channel charging transistor and an n-channel discharging transistor of a next stage. Two p-channel charging logic transistors are in series between the next stage output and the p-channel charging transistor, and two n-channel evaluation transistors are in series between the next stage output and the n-channel discharging transistor. Different pairs of the four IQ input clock signals are applied to their gates. When the prior stage output is low, the stage output is charged. When the prior stage output is high, the stage output discharge timing is determined by the IQ signals.

Abstract: Systems and methods which provide for detection of a signal using resource elements in the frequency domain where the signal for which detection is provided is multiplexed with other signals having subcarrier spacing that is different than the signal for which detection is provided are disclosed. Embodiments may provide for detection of a physical random access channel (PRACH) signal in a cellular radio communication system using resource elements in the frequency domain, wherein the PRACH signal is multiplexed with signals of other channels (e.g., data and/or control channel signals) of the cellular radio communication system. A frequency domain filter, such as implementing inverse discrete Fourier transform (IDFT) with down-sampling using indices for PRACH recovery, may be utilized to extract PRACH samples from frequency domain resource elements provided in a resource grid corresponding to a different subcarrier spacing than that of the PRACH.

Abstract: A method and a device for image inpainting on arbitrary surfaces in three-dimensional space are described for inpainting a region of a three-dimensional image utilizing a partial differential equation. The method includes obtaining a three-dimensional image on a surface S in three-dimensional space, and each point of the image includes an image point value and a position vector. The method includes locating an inpainting region D and generating an inpainting mask. The method further includes calculating image point values for points inside the inpainting region D and creating a second three-dimensional image to obtain an inpainted image. The present disclosure solves technical problems that previous methods do not work well on three-dimensional images on arbitrary surfaces and improves image inpainting technology.

Abstract: A silicon carbide chip array containing a silicon carbide substrate; a silicon carbide layer on top of the silicon carbide substrate; a first metal contact connected to the silicon carbide substrate; and two second metal contacts connected to the first portion and the second portion respectively. The silicon carbide layer is thinner and having lower doping than the silicon carbide layer. The silicon carbide layer includes a first portion and a second portion which are separate from each other. Each one of the second metal contacts forms a semiconductor device with the first metal contact. At least one of the first and second portions contains a side face which is inclined with respect to the silicon carbide substrate. Such a configuration enhances the breakdown voltage and reduces leakage current of the resultant silicon carbide diode array.

Abstract: Systems and methods which provide low latency optimization configured to perform from the hardware layer across the operating system to an application. Low latency operation implemented in accordance with embodiments is optimized for a specific application, which interfaces with specific hardware, executing on a host processor-based system configured for low latency optimization according to the concepts herein. For example, a low latency optimization implementation may comprise various modules implemented in both the user space and Kernel space, wherein the modules cooperate to obtain information regarding the services and hardware utilized by an application and to provide such information for facilitating low latency operation with respect to the application.

Abstract: A spatial light modulator (SLM) configured to reduce a fringe field effect (FFE) is provided. The SLM comprises pixels each having a liquid crystal (LC) on a pixel region. At least one pixel is an optimized pixel. The LC of the optimized pixel has an inhomogeneous distribution of pretilt angle or anchoring energy over the pixel region. The inhomogeneous distribution is selected to oppose the FFE. In one embodiment, the optimized pixel is partitioned into an outer region and an interior region. The outer region is an area between the optimized-pixel boundary and a pre-determined distance inwardly therefrom. The inhomogeneous distribution has one value of the pretilt angle or anchoring energy over the outer region and another value over the interior region. In another embodiment, a polymer stabilized network with an inhomogeneous polymerization degree over the pixel region is used to configure the LC layer to oppose the FFE.

Abstract: An integrator in a duty-cycle adjustment circuit has an adjustable charging current provided by a switched current-source array in response to configuration signals from the calibration logic. The integrator's ramp voltage is compared to a threshold voltage by a comparator to generate an output clock. A tunable voltage reference generates a reference voltage that can be tuned by configuration signals from the calibration logic. The reference voltage is divided by a tunable voltage divider, which selects different fractions of the reference voltage for use as the threshold voltage. During calibration, calibration logic repeatedly raises the reference voltage or reduces the charging current from the switched current-source array until a peak voltage of the ramp voltage equals the reference voltage, when a zero duty onset detector detects that the output clock has stopped pulsing. The configuration signals at the zero duty onset condition are stored and used for normal operation.

Abstract: An apparatus and method for performing real object detection and control using a Virtual Reality Head Mounted Display System, and more particularly, when the real object detection and control are detecting hand presence and control in free space, in a virtual reality environment, the control being, for example, gestures or movement, in the free space.

Abstract: Provided is a method of determining timing of arrival of a signal on a path to a receiver in a mobile wireless communications system. The method comprises obtaining a channel impulse response (CIR) of a signal received at the receiver and deriving a power characteristic of the CIR. The method includes producing a first derivative of the power characteristic with respect to time, selecting some or all extrema from the first derivative of the power characteristic as indicative of candidate signal paths, and selecting one or more of said candidate signal paths. The method preferably includes determining timing of arrival of a signal on a first path of arrival at the receiver by assessing an energy value of each of said candidate signal paths against a threshold value.

Abstract: In cancer-cell screening, a patient's cells are classified by a convolutional neural network (CNN) to identify abnormal cells. In one approach, a mask having a center more transparent than the mask's periphery is used to mask an input image containing a cell of interest to yield a masked image. Since the cell is usually located around an image center, and since the image often contains irrelevant objects, such as normal cells and micro-organisms, around an image periphery, interference due to the irrelevant objects in training the CNN and in classification is diminished by using the masked image rather than the original one. In another approach, masking is applied to feature maps before classification. In the CNN, this masking is accomplished by convolving each feature map with a convolutional kernel to produce an intermediate feature map followed by chopping off a peripheral region thereof to yield a downsized feature map.

Abstract: Provided is a method of determining Channel State Information (CSI) in a multiple input/multiple output (MIMO) wireless communication system. The CSI may comprise a Precoding Matrix Indicator (PMI) and/or a Rank Indicator (RI). The method comprises, for a matrix of channels comprising a link between a gNodeB (gNB) and a user equipment (UE), determining correlation values between all Discrete Fourier Transform (DFT) vectors and the observations from the channel matrix. The DFT vectors may include the horizontal vector direction and the vertical vector direction. The method includes selecting those DFT vectors in one or more selected vector directions having a correlation value greater than a predefined threshold to thereby identify a subset of all DFT vectors and determining said CSI from the selected subset of DFT vectors.

Abstract: The present disclosure relates to methods, devices, and systems for cell identification. For example, the systems, devices, and methods described herein may be used to detecting a secondary synchronization signal (SSS) index. In an aspect of the present disclosure, a method includes detecting, at an electronic device, a first SSS index based on a comparison between a first power value and a first threshold. The first power value is associated with a correlation power result between a received signal from a base station and a local SSS. The method also include determining, at the electronic device, a second threshold based on the first power value, and performing a comparison between a second power value and the second threshold. The second power value is determined based on the received signal.

Abstract: A device for controllably deflecting a first circularly-polarized (CP) light beam from an incident direction with fast response comprises a polarization selector (PS) to adjust the incident light beam's sense of rotation to a desired one to form a second CP light beam, and a polarization grating (PG) to deflect the second CP light beam according to the desired sense of rotation. The PS comprises an optical modulator sandwiched between two quarter-wave plates. The optical modulator has at least one ferroelectric liquid crystal (FLC) half-wave plate (HWP) being reconfigurable in fast axis orientation. The device has a fast response in beam steering due to a short time of reconfiguring the FLC HWP. Based on serially cascading multiple units each being this device, a beam-steering apparatus having fast response and enhanced steering resolution is obtained. The apparatus is usable for enhancing a field of view in projecting an image.

Abstract: An RC oscillator has a variable capacitor that sets the output frequency. The variable capacitor has m binary-weighted switched capacitor arrays, and each binary-weighted switched capacitor array has binary-weighted capacitors. p binary bits are decoded into an m-bit thermometer code that selects one of the m binary-weighted switched capacitor arrays to use n binary bits to switch its binary-weighted capacitors. Other binary-weighted switched capacitor arrays have all their capacitors switched on, or all their capacitors switched off by the thermometer code. The smallest or unit capacitance of each binary-weighted switched capacitor array is adjusted to compensate for the non-linear reciprocal relationship of frequency being proportional to 1/RC. The unit capacitance is increased for each successive binary-weighted switched capacitor array to reset to the ideal linear relationship of the (p,n)-bit code to frequency.

Abstract: Provided is a method of base station (BS) for channel state information (CSI) acquisition in a massive multiple input/multiple output (MIMO) communication system. The method comprises the steps at the BS of sending a set of beamformed reference signals (RSs) to a user equipment (UE) and receiving from said UE an indication of a subset of said set of beamformed RSs and CSI acquired by said UE for only said subset of said set of beamformed RSs. Also provided is a further method and a user equipment (UE) for CSI acquisition. The further method comprises the steps at the UE of receiving from the BS the set of beamformed RSs; estimating a channel of each RS comprising said set of beamformed RSs; selecting a subset of said set of beamformed RSs; acquiring CSI for only said selected subset of said set of beamformed RSs; and communicating to said BS an indication of said selected subset of said set of beamformed RSs and reporting the CSI acquired for said selected subset of said set of beamformed RSs.

Abstract: A wireless power transmitter that supplies power to a load. The wireless power transmitter includes an inverter, a voltage phase detector, a current phase detector, a phase difference counter, a controller and an impedance tuning circuit. The phase difference counter counts a phase difference between the voltage phase and the current phase at the output port of the inverter. The controller receives the phase difference from the phase difference counter and generates a control signal that changes an output impedance of the inverter in response to changes of a varying impedance of the load that is coupled with the output port of the inverter wirelessly. The impedance tuning circuit receives the control signal from the controller and tunes an imaginary part of the output impedance of the inverter to zero in order to maximize a power transfer efficiency from the wireless power transmitter to the load.

Abstract: Methods and systems which provide for synchronization target selection by configuring a network device to reselect a synchronization signal transmission timeslot for synchronization target searching by the network device are described. Synchronization signal timeslot reselection may provide for downgrading a current stratum index to an artificial stratum index that does not accurately indicate a number of hops between the network device and a global synchronization source to allow for selection of available synchronization targets with stratum indices that are higher than or equal to the network device's stratum index without causing a synchronization loop. A synchronization signal pattern cycle structure having synchronization signal timeslots organized into multiple subcycles for accommodating synchronization signal timeslot reselection is utilized according to embodiments.