Patents Assigned to ASM Japan K.K.
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Patent number: 6454516Abstract: There is provided an aligner apparatus and method which can align a semiconductor substrate without contaminating a rear surface. The aligner apparatus for arbitrarily aligning the circular semiconductor substrate having a notch or “orifla” at an edge portion includes at least three spindle units rotatably axially supported by a plate, holding units for holding the semiconductor substrate, attached to respective tip ends of the spindle units, a rotation mechanism for rotating the spindle units, and a sensor for detecting the notch or “orifla”. An edge portion of the semiconductor substrate is brought into contact with the respective holding units, so that the semiconductor substrate is held. When the spindle units rotate, the semiconductor substrate held by the holding units rotates around its axial line.Type: GrantFiled: July 10, 2000Date of Patent: September 24, 2002Assignee: ASM Japan K.K.Inventor: Takayuki Yamagishi
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Patent number: 6455445Abstract: A siloxan polymer insulation film has a dielectric constant of 3.3 or lower and has —SiR2O— repeating structural units. The siloxan polymer has dielectric constant, high thermal stability and high humidity-resistance on a semiconductor substrate. The siloxan polymer is formed by directly vaporizing a silicon-containing hydrocarbon compound expressed by the general formula Si&agr;O&bgr;CxHy (&agr;, &bgr;, x, and y are integers) and then introducing the vaporized compound to the reaction chamber of the plasma CVD apparatus. The residence time of the source gas is lengthened by reducing the total flow of the reaction gas, in such a way as to form a siloxan polymer film having a micropore porous structure with low dielectric constant.Type: GrantFiled: March 28, 2001Date of Patent: September 24, 2002Assignee: ASM Japan K.K.Inventor: Nobuo Matsuki
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Patent number: 6435798Abstract: A semiconductor processing apparatus for processing a semiconductor substrate includes: (i) a vacuum-exhausted chamber; (ii) a susceptor which is provided within the chamber and which holds the substrate and has at least three through-holes; (iii) substrate-supporting members which are supported within the through-holes and which support the substrate; (iv) a pin, one end of which is inserted into the inner part of a the substrate-supporting member; and (v) a pin-fixing structure provided at the base of the chamber for fixing the other end of the pin. When the susceptor moves downward, the pin pushes up the substrate-supporting member, and the substrate is supported in midair by the substrate-supporting members apart from the susceptor.Type: GrantFiled: April 7, 2000Date of Patent: August 20, 2002Assignee: ASM Japan K.K.Inventor: Kiyoshi Satoh
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Patent number: 6432846Abstract: A method for forming a silicone polymer insulation film having low relative dielectric constant, high thermal stability and high humidity-resistance on a semiconductor substrate is applied to a plasma CVD apparatus. The first step is vaporizing a silicon-containing hydrocarbon compound expressed by the general formula Si&agr;O&bgr;CxHy (&agr;=3, &bgr;=3 or 4, x, and y are integers) and then introducing the vaporized compound to the reaction chamber of the plasma CVD apparatus. The next step is introducing additive gas into the reaction chamber. The residence time of the material gas is lengthened by reducing the total flow of the reaction gas, in such a way as to formed a silicone polymer film having a micropore porous structure with low relative dielectric constant.Type: GrantFiled: October 18, 2000Date of Patent: August 13, 2002Assignee: ASM Japan K.K.Inventor: Nobuo Matsuki
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Patent number: 6413887Abstract: A method for producing a plasma silicon nitride series film with a small heat load having a low hydrogen concentration is provided. The method is for producing a silicon nitride series film on a material to be treated using a plasma CVD apparatus having a reaction chamber evacuated to vacuum. The method comprises the steps of introducing a monosilane gas (SiH4) and a nitrogen gas (N2) as raw material gases into the reaction chamber at prescribed flow rates, and heating the material to be treated to a prescribed temperature. At this time, it is characterized in that the flow rate of the nitrogen gas is at least 100 times the flow rate of the monosilane gas.Type: GrantFiled: August 29, 2000Date of Patent: July 2, 2002Assignee: ASM Japan K.K.Inventors: Hideaki Fukuda, Hiroki Arai
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Patent number: 6410463Abstract: In a method for forming in a reactor a film having a low relative dielectric constant on a semiconductor substrate by plasma reaction, the improvement can be achieved by lengthening a residence time, Rt, of a reaction gas in the reactor, wherein 100 msec≦Rt. The film includes insulation films and mask films.Type: GrantFiled: October 18, 2000Date of Patent: June 25, 2002Assignee: ASM Japan K.K.Inventor: Nobuo Matsuki
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Patent number: 6383900Abstract: HSG with an uneven surface is formed by (i) removing a spontaneous oxidation layer formed on an amorphous silicon surface of a semiconductor substrate by preprocessing, (ii) dissociating hydrogen in dangling bonds by heating it to a processing temperature, (iii) forming an amorphous silicon/polysilicon mixed-phase thin film selectively on solely an activated surface of the amorphous silicon surface in a silicon compound atmosphere, and (iv) annealing the film continuously. This method is characterized in including (a) a process which supplies a phosphorus compound and a dilution gas into a reactor while the semiconductor substrate is heated to a processing temperature, and (b) a process of annealing the semiconductor substrate in an atmosphere which contains the phosphorus compound and the dilution gas.Type: GrantFiled: June 9, 2000Date of Patent: May 7, 2002Assignee: ASM Japan K.K.Inventors: Akira Shimizu, Kunitoshi Nanba, Atsuki Fukazawa
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Patent number: 6383955Abstract: A method for forming a silicone polymer insulation film having a low dielectric constant, high thermal stability, high humidity-resistance, and high O2 plasma resistance on a semiconductor substrate is applied to a plasma CVD apparatus. The first step is introducing a silicon-containing hydrocarbon compound expressed by the general formula Si&agr;O&agr;−1(R)2&agr;−&bgr;+2(OCnH2n+1)&bgr; (&agr;, &bgr;, x, and y are integers) and then introducing the vaporized compound to the reaction chamber of the plasma CVD apparatus. The residence time of the material gas is lengthened by, for example, reducing the total flow of the reaction gas, in such a way as to form a silicone polymer film having a micropore porous structure with a low dielectric constant.Type: GrantFiled: June 7, 1999Date of Patent: May 7, 2002Assignee: ASM Japan K.K.Inventors: Nobuo Matsuki, Yuichi Naito, Yoshinori Morisada, Aya Matsunoshita
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Patent number: 6362044Abstract: An improved capacitor electrode made of polysilicon having a rough surface on a semiconductor substrate is formed by (a) removing a spontaneous oxidation film adhering to an amorphous silicon surface; (b) heating the amorphous silicon to a designated temperature; (c) spraying SiH4 at a designated temperature on the amorphous silicon to form an amorphous silicon/polysilicon mixed-phase active layer on the surface; (d) annealing at a designated temperature to form an HSG so as to roughen the amorphous silicon surface; (e) PH3-annealing the HSG-forming polysilicon, wherein PH3 is introduced at a designated concentration at the start of heating to a designated temperature; and (f) nitriding the amorphous silicon surface at the stated temperature by continuously introducing NH3 gas instead of PH3.Type: GrantFiled: September 19, 2000Date of Patent: March 26, 2002Assignee: ASM Japan K. K.Inventors: Akira Shimizu, Yukihiro Mori, Satoshi Takahashi
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Patent number: 6352945Abstract: A method for forming a silicone polymer insulation film having a low relative dielectric constant, high thermal stability and high humidity-resistance on a semiconductor substrate is applied to a plasma CVD apparatus. The first step is introducing a silicon-containing hydrocarbon compound expressed by the general formula Si&agr;O&bgr;CxHy (&agr;, &bgr;, x, and y are integers) to the reaction chamber of the plasma CVD apparatus. The silicon-containing hydrocarbon compound has at most two O—CnH2n+1 bonds and at least two hydrocarbon radicals bonded to the silicon. The residence time of the material gas is lengthened by, for example, reducing the total flow of the reaction gas, in such a way as to form a silicone polymer film having a micropore porous structure with a low relative dielectric constant.Type: GrantFiled: June 7, 1999Date of Patent: March 5, 2002Assignee: ASM Japan K.K.Inventors: Nobuo Matsuki, Yuichi Naito, Yoshinori Morisada, Aya Matsunoshita
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Patent number: 6305898Abstract: A transfer mechanism is provided for placing a wafer at a prescribed position on an arm without any additional step. The transfer mechanism for transferring a workpiece into and from a storage section comprises an arm member for holding a workpiece having a projection which can be contacted with an edge of the workpiece at the tip end portion thereof, a movement mechanism for reciprocating the arm member between a retracted and an extended positions while holding the workpiece thereon to transfer the workpiece to and from the storage section, and a positioning member which is positioned in the vicinity of the arm member and can be contacted with the edge of the workpiece for positioning the held workpiece in a prescribed position on the arm member.Type: GrantFiled: July 16, 1999Date of Patent: October 23, 2001Assignee: ASM Japan K.K.Inventors: Takayuki Yamagishi, Masaei Suwada, Kazunori Furukawara
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Patent number: 6277201Abstract: A CVD apparatus includes: (a) a reaction chamber; (b) a vacuum device connected to the reaction chamber for vacuuming and exhausting the reaction chamber; (c) a susceptor that maintains the semiconductor substrate inside the reaction chamber; (d) a reaction gas supplier that supplies a reaction gas to the surface of the semiconductor substrate set on the susceptor; and (e) a liquid-source vaporization system connected to the reaction gas supplier, which is disposed upstream of the showerhead and is used for atomizing and vaporizing the liquid reaction material at a given flow rate prior to its entry into the reaction chamber. The liquid-source vaporization system includes: (i) an atomizer connected to a liquid reaction material supply source; and (ii) a vaporizer connected to the atomizer downstream thereof.Type: GrantFiled: April 28, 1999Date of Patent: August 21, 2001Assignee: ASM Japan K.K.Inventor: Tomohisa Nishikawa
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Patent number: 6242278Abstract: A rough surface made of polysilicon grains is formed on an amorphous silicon film disposed on a semiconductor substrate by the steps of: (i) forming an amorphous silicon-polysilicon mixed-phase layer having a first density on an activated surface of the amorphous silicon film by contacting the surface with a gas containing monosilane at a first flow rate of monosilane and at a first temperature; and (ii) annealing the amorphous silicon-polysilicon mixed-phase layer to form polysilicon grains therefrom, thereby forming a rough surface made of polysilicon grains. In the above, the improvement includes using disilane in place of monosilane at a second flow rate lower than the first flow rate and at a second temperature lower than the first temperature to form an amorphous silicon-polysilicon mixed-phase layer having a second density higher than the first density. Another improvement includes saturating the reactor with hydrogen gas during the heating step.Type: GrantFiled: June 22, 1999Date of Patent: June 5, 2001Assignee: ASM Japan K.K.Inventors: Akira Shimizu, Satoshi Takahashi, Atsuki Fukazawa
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Patent number: 6235112Abstract: An apparatus for forming a thin film such as a silicon oxide film on a surface of a substrate such as a semiconductor substrate includes: a reaction chamber having an interior where the substrate is placed when in use; a liquid reaction material supplier for supplying a given amount of liquid reaction material such as TEOS for forming a thin film on the substrate; and a mist-forming device for forming mist of the liquid reaction material and spraying the liquid reaction material onto a surface of the substrate for forming a thin film thereon. The mist-forming device is disposed upstream of the reaction chamber and downstream of the liquid reaction material supplier. Neither of the mist-forming device nor the liquid reaction material supplier includes a heating device for heating the liquid reaction material.Type: GrantFiled: January 26, 1999Date of Patent: May 22, 2001Assignee: ASM Japan K.K.Inventor: Kiyoshi Satoh
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Patent number: 6211077Abstract: A rough surface made of a doped polycrystal silicon film is formed on an amorphous silicon film disposed on a semiconductor substrate, by a method including the steps of: (a) activating dangling bonds present on a surface of an amorphous silicon film; (b) forming an amorphous silicon-polysilicon mixed-phase layer on the surface of the amorphous silicon film by contacting the dangling bonds with a gas containing silane gas and dopant gas while controlling the ratio of dopant gas to silane gas to bind silicon atoms and dopant atoms to the dangling bonds; and (c) annealing the amorphous silicon-polysilicon mixed-phase layer to form polysilicon grains therefrom, thereby forming a rough surface made of doped polysilicon film. Doping can be conducted after formation of the polysilicon grains.Type: GrantFiled: June 22, 1999Date of Patent: April 3, 2001Assignee: ASM Japan K.K.Inventors: Akira Shimizu, Yukihiro Mori, Atsuki Fukazawa
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Patent number: 6193803Abstract: A substrate-holding apparatus for holding a semiconductor substrate in a semiconductor processor is characterized in that the apparatus includes a mount block made of an aluminum alloy wrought product and having a mount surface for mounting a semiconductor thereon, a heating block with a heater body embedded therein for heating the semiconductor substrate, and a shield member made of an aluminum alloy wrought product for housing the heating block. The mount plate is securely attached to the heating block by brazing or with bolts.Type: GrantFiled: December 17, 1998Date of Patent: February 27, 2001Assignee: ASM Japan K.K.Inventors: Kiyoshi Sato, Mikio Shimizu, Yukihiro Mori
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Patent number: 6187691Abstract: A thin film is formed on a substrate in a film-forming apparatus which has upper and lower electrodes between which radio-frequency power is applied in a processing chamber, and a heater is used to heat the lower electrode on which the substrate is loaded. In one lot, at least one substrate is processed. The electrode is heated at the end of a stand-by period between lots and before starting the film-forming process.Type: GrantFiled: May 15, 2000Date of Patent: February 13, 2001Assignee: ASM Japan K.K.Inventors: Hideaki Fukuda, Hiroki Arai, Yu Yoshizaki
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Patent number: 6159301Abstract: A substrate-holding apparatus for holding a semiconductor substrate in a semiconductor processor is characterized in that the apparatus includes a mount block made of, e.g., aluminum nitrate with a high-frequency electrode embedded therein and a heating block made of, e.g., an aluminum alloy with a heating body embedded therein. The mount block is tightly attached to the heating block by engaging the bottom surface of the mount block with the top surface of the heating block, for example, by using a latching mechanism.Type: GrantFiled: December 17, 1998Date of Patent: December 12, 2000Assignees: ASM Japan K.K., NHK Spring Co., Ltd.Inventors: Kiyoshi Sato, Mikio Shimizu, Toshihiko Hanamachi, Shinya Miyaji
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Patent number: 6149976Abstract: The fluorine type silicon oxide film is formed using plasma CVD apparatus on a semiconductor wafer using a gas which is a mixture of a silicon source gas, a silicon type fluorine source gas, an oxidizing agent and an inert gas. The oxide film is formed using the inert gas at a flow which is at least five times the total flow rate of the silicon source gas and the silicon type fluorine source gas. Tetraethylorthosilicate (TEOS) is used as the silicon source gas; fluorotriethoxysilane (TEFS) is used as the silicon type fluorine source gas; oxygen (O.sub.2) is used as the oxidizing agent; and a helium (He) or argon (Ar) gas is used as the inert gas.Type: GrantFiled: February 23, 1998Date of Patent: November 21, 2000Assignee: ASM Japan K.K.Inventors: Nobuo Matsuki, Johannes Bart Cornelis Van Der Hilst
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Patent number: 6120605Abstract: A single wafer processing type of a semiconductor processing system is provided so as to achieve that residual particles inside a reactor thereof are efficiently removed and a gas injected into the reactor is uniformly flowed over a wafer in a wide range of the gas flow rate. The semiconductor processing system includes gas flow adjusting means (28, 29, 30) having a slit (30) communicated with an exhaust port (35) for pumping out a gas injected into a reactor (10) from the reactor (10). The slit (30) is provided annularly around a circumference of a wafer (34) and positioned below a position of the wafer (34), and a width of the slit (30) is narrowed about the exhaust port (35).Type: GrantFiled: February 5, 1998Date of Patent: September 19, 2000Assignee: ASM Japan K.K.Inventor: Kiyoshi Sato