Patents Assigned to ASM Japan K.K.
  • Apparatus for single-wafer-processing type CVD
    Publication number: 20050098111
    Abstract: A single-wafer-processing type CVD apparatus includes: (a) a reaction chamber including: (i) a susceptor having at least one gas discharge hole to flow a gas into the reaction chamber via a back side and a periphery of the wafer into the reaction chamber; (ii) a showerhead; (iii) an exhaust duct positioned in the vicinity of the showerhead and provided circularly along an inner wall of the reaction chamber; and (iv) a circular separation plate provided coaxially with the exhaust duct to form a clearance with the bottom of the exhaust duct; and (b) a temperature-controlling apparatus for regulating the temperature of the showerhead. The separation plate has a sealing portion to seal a periphery of the susceptor and to separate the reaction chamber from a wafer-handling chamber when the susceptor rises.
    Type: Application
    Filed: December 16, 2004
    Publication date: May 12, 2005
    Applicant: ASM JAPAN K.K.
    Inventors: Akira Shimizu, Hideaki Fukuda, Baiei Kawano, Kazuo Sato
  • Insulation film on semiconductor substrate and method for forming same
    Patent number: 6881683
    Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus. The silicon-containing hydrocarbon compound includes a cyclosiloxan compound or a linear siloxan compound, as a basal structure, with reactive groups for form oligomers using the basal structure. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: April 19, 2005
    Assignee: ASM Japan K.K.
    Inventors: Nobuo Matsuki, Yasuyoshi Hyodo, Masashi Yamaguchi, Yoshinori Morisada, Atsuki Fukazawa, Manabu Kato, Shinya Kaneko, Devendra Kumar, Seijiro Umemoto
  • Method of forming thin film
    Publication number: 20050048797
    Abstract: A method for forming a thin film includes: supplying an additive gas, a dilution gas, and a silicon-containing source gas into a reaction chamber wherein a substrate is placed; forming a thin film on the substrate by plasma CVD under a given pressure with a given intensity of radio-frequency (RF) power from a first point in time to a second point in time; at the second point in time, stopping the supply of the silicon-containing source gas; and at the second point in time, beginning reducing but not stopping the RF power, and beginning reducing the pressure, wherein the reduction of the RF power and the reduction of the pressure are synchronized up to a third point in time.
    Type: Application
    Filed: September 2, 2004
    Publication date: March 3, 2005
    Applicant: ASM JAPAN K.K/
    Inventors: Atsuki Fukazawa, Kenichi Kagami, Manabu Kato
  • Semiconductor-manufacturing device having buffer mechanism and method for buffering semiconductor wafers
    Patent number: 6860711
    Abstract: A semiconductor-manufacturing device is equipped with a load-lock chamber and a reactor, which are directly connected, wherein a semiconductor wafer is transferred by a transferring arm provided inside the load-lock chamber from the load-lock chamber onto a susceptor provided inside the reactor. The device includes a buffer mechanism for keeping a semiconductor wafer standing by inside the reactor. The buffer mechanism includes at least two supporting means, which are provided around the susceptor to support the semiconductor wafer and which rotate in a horizontal direction, a shaft means for supporting the supporting means in a vertical direction, a rotating mechanism for rotating the supporting means coupled to the shaft means, and an elevating means for moving the shaft means up and down.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: March 1, 2005
    Assignee: ASM Japan K.K.
    Inventor: Takayuki Yamagishi
  • Method of forming silicon-containing insulation film having low dielectric constant and low film stress
    Publication number: 20050042884
    Abstract: A silicon-containing insulation film is formed on a substrate by plasma polymerization by introducing a reaction gas comprising (i) a source gas comprising a silicon-containing hydrocarbon compound containing at least one vinyl group (Si-vinyl compound), and (ii) an additive gas, into a reaction chamber where a substrate is placed; and applying radio-frequency power to the gas to cause plasma polymerization, thereby depositing an insulation film on the substrate.
    Type: Application
    Filed: August 20, 2003
    Publication date: February 24, 2005
    Applicant: ASM JAPAN K.K.
    Inventors: Yasuyoshi Hyodo, Nobuo Matsuki, Masashi Yamaguchi, Atsuki Fukazawa, Naoki Ohara, Yijun Liu
  • Method and apparatus for forming silicon-containing insulation film having low dielectric constant
    Publication number: 20050034667
    Abstract: A silicon-containing insulation film is formed on a substrate by plasma reaction using a reaction gas including (i) a source gas comprising a silicon-containing hydrocarbon compound containing multiple cross-linkable groups, (ii) a cross-linking gas, and (iii) an inert gas, into a reaction chamber where a substrate is placed. The insulation film is then exposed to electron beam radiation, thereby increasing mechanical strength of the film without substantial alternation of its dielectric constant.
    Type: Application
    Filed: August 14, 2003
    Publication date: February 17, 2005
    Applicant: ASM JAPAN K.K.
    Inventors: Naoto Tsuji, Atsuki Fukazawa, Nobuo Matsuki, Shingo Ikeda
  • Semiconductor substrate supporting apparatus
    Publication number: 20050037626
    Abstract: A semiconductor substrate supporting apparatus for supporting a single semiconductor substrate in a plasma CVD apparatus comprises a placing block having a substrate placing area on which the substrate is placed. The substrate placing area is anodized and has as an outermost film an anodic oxide film having a thickness of about 30 ?m to about 60 ?m and/or a dielectric breakdown voltage of about 300 V or higher.
    Type: Application
    Filed: August 5, 2004
    Publication date: February 17, 2005
    Applicant: ASM JAPAN K.K./
    Inventors: Mitsutoshi Shuto, Yasuaki Suzuki
  • Insulation film on semiconductor substrate and method for forming same
    Patent number: 6852650
    Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: February 8, 2005
    Assignee: ASM Japan K.K.
    Inventors: Nobuo Matsuki, Yasuyoshi Hyodo, Masashi Yamaguchi, Yoshinori Morisada, Atsuki Fukazawa, Manabu Kato
  • Semiconductor-processing apparatus provided with susceptor and placing block
    Publication number: 20050022737
    Abstract: A semiconductor-processing apparatus comprises a susceptor and removable placing blocks detachably placed at a periphery of the susceptor for transferring a substrate. Retractable supporting members are provided for detaching/attaching the placing blocks from/to the susceptor.
    Type: Application
    Filed: July 22, 2004
    Publication date: February 3, 2005
    Applicant: ASM JAPAN K.K.
    Inventors: Akira Shimizu, Hideaki Fukuda, Hiroki Arai, Baiei Kawano, Takayuki Yamagishi
  • Method of forming low-k films
    Patent number: 6849561
    Abstract: To deposit silicon carbide into a substrate, there is introduced into a reaction zone a gas including source gas of silicon, carbon, oxygen and an inert gas. An electric field is generated using low and high frequency RF power to produce a plasma discharge in the reaction zone to cause the deposition.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: February 1, 2005
    Assignee: ASM Japan K.K.
    Inventor: Kamal Kishore Goundar
  • Apparatus and method for forming low dielectric constant film
    Patent number: 6830007
    Abstract: A CVD apparatus includes (i) a reaction chamber; (ii) a reaction gas inlet; (iii) a lower stage on which a semiconductor substrate is placed; (iv) an upper electrode for plasma excitation; (v) an intermediate electrode with plural pores through which the reaction gas passes, wherein a reaction space is formed between the upper electrode and the intermediate electrode; and (vi) a cooling plate disposed between the intermediate electrode and the lower stage, wherein a transition space is formed between the intermediate electrode and the cooling plate, and a plasma-free space is formed between the cooling plate and the lower stage.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: December 14, 2004
    Assignee: ASM Japan K.K.
    Inventors: Nobuo Matsuki, Seijiro Umemoto, Yasuyoshi Hyodo
  • CVD of porous dielectric materials
    Patent number: 6825130
    Abstract: Porous dielectric films useful in the semiconductor industry are prepared by depositing a Si—O—C film using precursors that contain carbon and oxygen, then heating the Si—O—C to decompose organic fragments trapped within.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: November 30, 2004
    Assignee: ASM Japan K.K.
    Inventor: Michael A. Todd
  • Gas-shield electron-beam gun for thin-film curing application
    Publication number: 20040232355
    Abstract: An electron-beam irradiation apparatus includes an evacuatable filament-electron gun chamber housing a filament and an anode and having an inactive-gas inlet through which an inactive gas flows in; an evacuatable treatment chamber connected to an exhaust system; and a separation wall for separating the filament-electrode gun chamber and the treatment chamber. The separation wall has an aperture configured to pass electrons and gas therethrough from the filament-electron gun chamber.
    Type: Application
    Filed: May 17, 2004
    Publication date: November 25, 2004
    Applicant: ASM JAPAN K.K.
    Inventors: Nobuo Matsuki, Atsuki Fukazawa, Naoto Tsuji
  • Method of forming silicon-containing insulation film having low dielectric constant and high mechanical strength
    Patent number: 6818570
    Abstract: A silicon-containing insulation film having high mechanical strength is formed on a semiconductor substrate by (a) introducing a reaction gas comprising (i) a source gas comprising a silicon-containing hydrocarbon compound containing cross-linkable groups, (ii) a cross-linking gas, and (iii) an inert gas, into a reaction chamber where a substrate is placed; (b) applying radio-frequency power to create a plasma reaction space inside the reaction chamber; and (c) controlling a flow of the reaction gas and an intensity of the radio-frequency power.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: November 16, 2004
    Assignee: ASM Japan K.K.
    Inventors: Naoto Tsuji, Yukihiro Mori, Satoshi Takahashi, Kiyohiro Matsushita, Atsuki Fukazawa, Michael Todd
  • Thin-film deposition apparatus
    Publication number: 20040221808
    Abstract: A thin-film deposition apparatus includes a reaction chamber, a substrate transfer chamber, a susceptor having a radially-extending step portion, a ring-shaped separation wall for separating the reaction chamber and the substrate transfer chamber at a processing position where the susceptor is positioned inside the ring-shaped separation wall, and a conductive sealing member which is interposed between the radially-extending step portion and the separation wall to seal the reaction chamber from the substrate transfer chamber when the susceptor is at a processing position.
    Type: Application
    Filed: May 7, 2004
    Publication date: November 11, 2004
    Applicant: ASM JAPAN K.K.
    Inventor: Baiei Kawano
  • Method for forming integrated dielectric layers
    Patent number: 6815332
    Abstract: A method for forming integrated dielectric layers using plasma energy includes (i) depositing a first dielectric layer on a substrate using a first reaction gas comprised of a source gas at a first source gas flow rate and an inert gas at a first inert gas flow rate, wherein the first inert gas flow rate is no more than 40% of the first source gas flow rate, and (ii) continuously depositing a second dielectric layer on top of the first dielectric layer using a second reaction gas comprised of a source gas at a second source gas flow rate and an inert gas at a second inert gas flow rate, wherein the second inert gas flow rate is 40% or higher of the second source gas flow rate.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: November 9, 2004
    Assignee: ASM Japan K.K.
    Inventors: Nelson Loke Chou San, Kiyoshi Satoh
  • Plasma treatment apparatus
    Publication number: 20040194709
    Abstract: A plasma treatment apparatus for thin-film deposition includes a reactor chamber; a pair of parallel-plate electrodes disposed inside the chamber; and a radio-frequency power supply system used for transmitting radio-frequency power to one of the parallel-plate electrodes via multiple supply points provided on the one of the parallel-electrodes. The radio-frequency power supply system includes a radio-frequency transmission unit which includes an inlet transmission path and multiple branches branched off from the inlet transmission path multiple times. Each branch is connected to the supply point and has a substantially equal characteristic impedance value.
    Type: Application
    Filed: March 23, 2004
    Publication date: October 7, 2004
    Applicant: ASM JAPAN K.K.
    Inventors: Takayuki Yamagishi, Hiroki Arai, Kiyoshi Satoh
  • Insulation film on semiconductor substrate and method for forming same
    Patent number: 6784123
    Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus, and depositing a siloxan polymer film by plasma polymerization at a temperature of −50° C.-100° C. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant such as 2.5.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: August 31, 2004
    Assignee: ASM Japan K.K.
    Inventors: Nobuo Matsuki, Yoshinori Morisada, Yasuyoshi Hyodo, Seijiro Umemoto
  • Method of cleaning a CVD reaction chamber using an active oxygen species
    Patent number: 6767836
    Abstract: Provided herein is a method for cleaning CVD reaction chambers with active oxygen species. The active oxygen species may also be mixed with active fluorine species. The active oxygen species are products of a plasma, which may be either generated within the CVD reaction chamber or generated remotely and introduced into the CVD reaction chamber.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: July 27, 2004
    Assignee: ASM Japan K.K.
    Inventors: Nelson Loke Chou San, Kenichi Kagami, Kiyoshi Satoh
  • Apparatus and method for semiconductor wafer etching
    Patent number: 6764572
    Abstract: A batch-type etching device and a method, which enable a stable process with high reproducibility by preventing contamination of CVD equipment by effectively removing H2O, CH3OH or CH3COOH and by-products adsorbing and remaining on the surface of a semiconductor wafer after etching is completed, are provided. The device comprises a reaction chamber, an exhaust port for evacuating the air inside the reaction chamber, a wafer-supporting boat for supporting at least one batch of semiconductor wafers inside the reaction chamber, a gas inlet port for introducing a reaction gas into the reaction chamber, and a microwave generator. The microwave generator is adapted to introduce microwaves into reaction chamber so that substances which adsorb and remain on the semiconductor wafers are desorbed and removed after etching is completed.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: July 20, 2004
    Assignee: ASM Japan K.K.
    Inventors: Akira Shimizu, Kunitoshi Nanba