Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.

Abstract: A processor device includes a cache and a memory storing a set of counters. Each counter of the set is associated with a corresponding block of a plurality of blocks of the cache. The processor device further includes a cache access monitor to, for each time quantum for a series of one or more time quanta, increment counter values of the set of counters based on accesses to the corresponding blocks of the cache. The processor device further includes a transfer engine to, after completion of each time quantum, transfer the counter values of the set of counters for the time quantum to a corresponding location in a system memory.

Abstract: Briefly, methods and apparatus to provide image content to, and display image content on, variable refresh rate displays with reduced input lag. The methods and apparatus allow for image tearing, or the displaying of image content from more than one video frame, when the render rate of a provided video frame falls outside the display refresh rate range of a variable refresh rate display when the display is refreshing with a previous frame (e.g. the display is in active refresh), thus reducing the input lag of the content of the provided video frame. The methods and apparatus may also prevent image tearing when the render rate of provided video frames is within the display refresh rate range of a display.

Abstract: Described is a system and method for dynamically changing a resolution level at a frame level based on runtime pre-encoding analysis of content in a video stream. A video encoder continuously analyzes the content during runtime, and collects statistics and/or characteristics of the content before encoding it. This classifies the frame among pre-defined categories of content, where every category has its own bitrate/resolution relation. The runtime encoding resolution is dynamically dependent on the target bitrate and the collected statistics and/or characteristics of the content. This achieves a high quality encode for sequences that are composed of scenes with various content complexity levels for different frames in the video streams.

Abstract: Systems, apparatuses, and methods for implementing a parallel Huffman decoding scheme are disclosed herein. A system with a plurality of execution units receives a Huffman encoded bitstream. The system partitions the encoded bitstream into a plurality of chunks. Each execution unit is assigned to decode a separate chunk of the encoded bitstream as well as an extra portion of an adjacent chunk. With this approach, the decoding of the bitstream overlaps for a programmable amount of data at each chunk boundary since each execution unit, excluding the first execution unit decoding the first chunk of the bitstream, will likely decode a certain number of symbols incorrectly at the beginning of the chunk since the chunk boundaries will not be aligned with symbol boundaries. The system determines, from the decoded extra portion at each chunk boundary, where incorrectly decoded ends and where correctly decoded data begins for each decoded chunk.

Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.

Abstract: Methods and apparatus that allow encoding of video data in pipelined encoder architectures with reduced encoding performance penalty. The methods and apparatus encode video data without the need to flush the data pipeline and re-encode macroblocks, thus saving time and resulting in an increase in the encoder's throughput. In one embodiment, macroblocks are encoded in a data pipeline to form a first video slice of a plurality of video slices. Once a macroblock overshoot condition occurs, the overshooting macroblock is determined and a second video slice is formed that includes at least one of the overshooting macroblock and the encoded macroblocks without re-encoding the included overshooting macroblock and encoded macroblocks. For example, a second video slice may be formed from the overshooting macroblock, and any remaining encoded macroblocks, that do not form the first video slice.

Abstract: An austenitic stainless steel composition including relatively low nickel and molybdenum levels, and exhibiting corrosion resistance, resistance to elevated temperature deformation, and formability properties comparable to certain alloys including higher nickel and molybdenum levels. Embodiments of the austenitic stainless steel include, in weight %, up to 0.20 C, 2.0 to 9.0 Mn, up to 2.0 Si, 16.0 to 23.0 Cr, 1.0 to 7.0 Ni, up to 3.0 Mo, up to 3.0 Cu, 0.05 to 0.35 N, up to 4.0 W, (7.5(C))?(Nb+Ti+V+Ta+Zr)?1.5, up to 0.01 B, up to 1.0 Co, iron and impurities. Additionally, embodiments of the steel may include 0.5?(Mo+W/2)?5.0 and/or 1.0?(Ni+Co)?8.0.

Abstract: A method of processing a workpiece to inhibit precipitation of intermetallic compounds includes at least one of thermomechanically processing and cooling a workpiece including an austenitic alloy. During the at least one of thermomechanically working and cooling the workpiece, the austenitic alloy is at temperatures in a temperature range spanning a temperature just less than a calculated sigma solvus temperature of the austenitic alloy down to a cooling temperature for a time no greater than a critical cooling time.

Abstract: A method and system for allocating memory to a memory operation executed by a processor in a computer arrangement having a first processor configured for unified operation with a second processor. The method includes receiving a memory operation from a processor and mapping the memory operation to one of a plurality of memory heaps. The mapping produces a mapping result. The method also includes providing the mapping result to the processor.

Abstract: Methods and apparatus for providing multiple graphics processing capacity, while utilizing unused integrated graphics processing circuitry on a bridge circuit along with an external or discrete graphics processing unit is disclosed. In particular, a bridge circuit includes an integrated graphics processing circuit configured to process graphics jobs. The bridge circuit also includes an interface operable according to interface with a discrete graphics processing circuit. A controller is included with the bridge circuit and responsive whenever the discrete graphics processing circuit is coupled to the interface to cause the integrated graphics processing circuit to process a task of the graphics job in conjunction with operation of the discrete graphics processing circuit that is operable to process another task of the graphics job. Corresponding methods are also disclosed.

Abstract: One or more components of a video display device such as a television set can be powered down in response to a determination that a video input source has been paused. The video signal provided by the video input source can be analyzed to determine whether the video source is paused. When the video input source is no longer paused, the powered down components can be restored to fill power operation.

Abstract: A method of manufacturing is provided that includes singulating a circuit board from a substrate of plural of the circuit boards, wherein the circuit board is shaped to have four corner hollows. The corner hollows may be various shapes.

Abstract: Described is a system and method for using virtual vector register files. In particular, a graphics processor includes a logic unit, a virtual vector register file coupled to the logic unit, a vector register backing store coupled to the virtual vector register file, and a virtual vector register file controller coupled to the virtual vector register file. The virtual vector register file includes a N deep vector register file and a M deep vector register file, where N is less than M. The virtual vector register file controller performing eviction and allocation between the N deep vector register file, the M deep vector register file and the vector register backing store dependent on at least access requests for certain vector registers.

Abstract: A method, processor, and non-transitory computer-readable medium are disclosed for real-time video stabilization and encoding in a single motion estimation pass for each frame. The method includes performing motion estimation on a stabilized current frame and determining a global motion vector using motion estimation information obtained in the performing of motion estimation on the stabilized current frame. A subsequent frame in a video stream is stabilized using this global motion vector. Motion estimation is performed on the stabilized subsequent frame.

Abstract: Described is a method and processing apparatus to improve power efficiency by gating redundant threads processing. In particular, the method for gating redundant threads in a graphics processor includes determining if data for a thread and data for at least another thread are within a predetermined similarity threshold, gating execution of the at least another thread if the data for the thread and the data for the at least another thread are within the predetermined similarity threshold, and using an output data from the thread as an output data for the at least another thread.

Abstract: Integrated circuit layouts are disclosed that include metal layers with metal tracks having separate metal sections along the metal tracks. The separate metal sections along a single track may be electrically isolated from each other. The separate metal sections may then be electrically connected to different voltage tracks in metal layers above and/or below the metal layer with the separate metal sections. One or more of the metal layers in the integrated circuit layouts may also include metal tracks at different voltages (e.g., power and ground) that are adjacent to each other within a power grid layout. The metal tracks may be separated by electrically insulating material. The metal tracks and the electrically insulating material between the tracks may create capacitance in the power grid layout.

Abstract: A motion estimation apparatus and method (carried out electronically) provides for encoding of multiview video, such as stereoscopic video, by providing motion estimation for pixels in a dependent eye view, using motion vector information from a colocated group of pixels in a base eye view and neighboring pixels to the colocated group of pixels in the base eye view. The method and apparatus encodes a group of pixels in a dependent eye view based on the estimated motion vector information. The method and apparatus may also include obtaining a frame of pixels that includes both base eye view pixels and dependent eye pixels so that, for example, frame compatible format packing can be employed. In one example, estimating the motion vector information for a block of pixels, for example, in a dependent eye view is based on a median value calculation of motion vectors for a block of pixels in a base eye view and motion vectors for neighboring blocks of pixels to the colocated group of pixels in the base eye view.

Abstract: A process for reducing flatness deviations in an alloy article is disclosed. An alloy article may be heated to a first temperature at least as great as a martensitic transformation start temperature of the alloy. A mechanical force may be applied to the alloy article at the first temperature. The mechanical force may tend to inhibit flatness deviations of a surface of the alloy article. The alloy article may be cooled to a second temperature no greater than a martensitic transformation finish temperature of the alloy. The mechanical force may be maintained on the alloy article during at least a portion of the cooling of the alloy article from the first temperature to the second temperature.

Abstract: An austenitic stainless steel composition including relatively low Ni and Mo levels, and exhibiting corrosion resistance, resistance to elevated temperature deformation, and formability properties comparable to certain alloys including higher Ni and Mo levels. Embodiments of the austenitic stainless steel include, in weight percentages, up to 0.20 C, 2.0-9.0 Mn, up to 2.0 Si, 15.0-23.0 Cr, 1.0-9.5 Ni, up to 3.0 Mo, up to 3.0 Cu, 0.05-0.35 N, (7.5(C))?(Nb+Ti+V+Ta+Zr)?1.5, Fe, and incidental impurities.