Abstract: A method for reducing impurities in magnesium comprises: combining a zirconium-containing material with a molten low-impurity magnesium including no more than 1.0 weight percent of total impurities in a vessel to provide a mixture; holding the mixture in a molten state for a period of time sufficient to allow at least a portion of the zirconium-containing material to react with at least a portion of the impurities and form intermetallic compounds; and separating at least a portion of the molten magnesium in the mixture from at least a portion of the intermetallic compounds to provide a purified magnesium including greater than 1000 ppm zirconium. A purified magnesium including at least 1000 ppm zirconium and methods for producing zirconium metal using magnesium reductant also are disclosed.

Abstract: A hold down mechanism for releasably securing a refractory lining to a furnace. The hold down mechanism can comprise plate segments that form a composite plate. The plate segments can comprise a first plate segment structured to articulate relative to a second plate segment. Furthermore, a gap in the hold down mechanism can be structured to adjust in response to a thermal condition of the composite plate, such as thermal expansion or thermal contraction of at least one plate segment. The composite plate can also comprise an articulation plate pivotally coupled to at least one of the first plate segment and the second plate segment via a pivot and/or a slot and pin engagement. The composite plate can further comprise a third plate segment and a second articulation plate pivotally coupled to at least one of the second plate segment and the third plate segment.

Abstract: A pre-emphasis circuit is disclosed. In one embodiment, a pre-emphasis circuit includes a first signal path configured to receive a first signal and a second signal path configured to receive the first signal. The second signal path includes a re-timing circuit configured to delay the first signal by a pre-determined amount to produce a second signal. The pre-emphasis circuit also includes a summing circuit coupled to receive the first signal from the first signal path and the second signal from the second signal path. The summing circuit is configured to add the second signal to the first signal to produce a third signal, wherein the third signal is logically equivalent to the first signal. The third signal has a first magnitude for a first portion of a bit-time of the first signal, and a second magnitude for a second portion of the bit-time of the first signal.

Abstract: Described herein are methods and related apparatus for the allocation of computing resources to perform computing tasks. The methods described herein may be used to allocate computing tasks to many different types of computing resources, such as processor cores, individual computers, and virtual machines. Characteristics of the available computing resources, as well as other aspects of the computing environment, are modeled in a multidimensional coordinate system. Each coordinate point in the coordinate system corresponds to a unique combination of attributes of the computing resources/computing environment, and each coordinate point is associated with a weight that indicates the relative desirability of the coordinate point. To allocate a computing resource to execute a task, the weights of the coordinate points, as well as other related factors, are analyzed.

Abstract: An integrated circuit including an electrostatic discharge (ESD) equalizer is described. The integrated circuit may include a first ESD protection circuit coupled between a first node and a ground node of the integrated circuit and a second ESD protection circuit coupled between a second node and the ground node. The integrated circuit may also include an ESD equalizer that changes from an impedance of a path between the first node and the second node from a high impedance to a low impedance in response to electrostatic discharge (ESD) through the first node or the second node.

Abstract: A method and device for providing synchronized data output is provided. The method includes generating two data streams sending data to be presented in synchronization. Both streams are generated by the same processor-based device. The first data stream follows a first protocol and the second data stream follows a second (different) protocol. The processor of the processor-based device adjusts a data rate of the second data stream to cause a reduction in any timing offset between the streams.

Abstract: Embodiments of a system and method including graphics processing of a pixel sample are described. According to an embodiment, a first depth test processes a value, such as a z/stencil value, of a pixel sample and determines whether the value of the pixel sample satisfies the first depth test. If the value of the pixel sample satisfies the first depth test, the value of the pixel sample is not immediately written to storage, such as a Z-buffer. That is, if the value of the pixel sample satisfies the first depth test, the depth processing logic prevents or delays a write operation for the value of the pixel sample to storage at that time. A second depth test is performed on the value of the pixel sample if the value of the pixel sample satisfied the first depth test. If the value of the pixel sample satisfies the second depth test, the value of the pixel sample is then written to storage.

Abstract: In general, in an aspect, the invention provides a multimedia entertainment system including a communication link, a video source coupled to the communication link and configured to produce a video signal and provide the video signal to the communication link, a video display coupled to the communication link and configured to receive the video signal from the video source via the communication link, and to provide dynamic display characteristic information indicative of a display capability of the video display to the video source via the communication link, wherein the video source is configured to receive the dynamic display characteristic information and to produce the video signal as a function of the dynamic display characteristic information, and wherein the video display is configured to display a video image in accordance with the video signal provided by the video source.

Abstract: Methods, systems, and computer readable media embodiments for reducing or eliminating display artifacts caused by on-the-fly changing of the display clock are disclosed. According to an embodiment of the present invention, a method includes, changing a rate of a display clock, and adapting a display data processing pipeline clocked by the display clock to prevent a substantial change in a pixel output rate from the display data processing pipeline based upon the changing.

Abstract: A method for the display of compressed supertile images is disclosed. In one embodiment, a method for displaying an image frame from a plurality of compressed supertile frames includes: reading the compressed supertile frames; expanding the compressed supertile frames; and combining the expanded supertile frames to generate the image frame. The expanding can include generating an expanded supertile frame corresponding to each of the compressed supertile frames by inserting blank pixels for tiles in the expanded supertile frame that are not in the corresponding compressed supertile frame. Corresponding system and computer program products are also disclosed.

Abstract: A routing layer for a semiconductor die is disclosed. The routing layer includes pads for attaching solder bumps; bond-pads bonded to bump-pads of a die having an integrated circuit, and traces interconnecting bond-pads to pads. The routing layer is formed on a layer of dielectric material. The routing layer includes conductive traces at least partially surrounding some pads so as to absorb stress from solder bumps attached to the pads. Parts of the traces that surround pads protect parts of the underlying dielectric material proximate the solder bumps, from the stress.

Abstract: A system and method for providing viewer preferences on a display device are presented. An embodiment includes a storage medium for storing preset viewer preferences, each preference being categorized based on one of a plurality of viewers, a processor that accesses the storage medium and acquires the stored preset viewer preference for a given one of the plurality of viewers, and a display device that provides content to the viewer in accordance with the viewer's preferences using at least one optical element.

Abstract: A casting system and method. The casting system can include an energy source and a hearth, which can have a tapered cavity. The tapered cavity can have a first end portion and a second end portion, and the tapered cavity can narrow between the first and second end portions. Further, the tapered cavity can have an inlet at the first end portion that defines an inlet capacity, and one or more outlets at the second end portion that define an outlet capacity. Where the cavity has a single outlet, the outlet capacity can be less than the inlet capacity. Where the cavity has multiple outlets, the combined outlet capacity can match the inlet capacity. Further, the cross-sectional area of the tapered cavity near the inlet can be similar to the cross-sectional area of the inlet.

Abstract: Split pass forging a workpiece to initiate microstructure refinement comprises press forging a metallic material workpiece in a first forging direction one or more times up to a reduction ductility limit of the metallic material to impart a total strain in the first forging direction sufficient to initiate microstructure refinement; rotating the workpiece; open die press forging the workpiece in a second forging direction one or more times up to the reduction ductility limit to impart a total strain in the second forging direction to initiate microstructure refinement; and repeating rotating and open die press forging in a third and, optionally, one or more additional directions until a total amount of strain to initiate microstructure refinement is imparted in an entire volume of the workpiece.

Abstract: Embodiments of a method and system for decoding video data are described herein. In various embodiments, a high-compression-ratio codec (such as H.264) is part of the encoding scheme for the video data. Embodiments pre-process control maps that were generated from encoded video data, and generating intermediate control maps comprising information regarding decoding the video data. The control maps include information regarding rearranging the video data to be processed in parallel on multiple pipelines of a graphics processing unit (GPU) so as to optimize the use of the multiple pipelines. In an embodiment, decoding is performed on a frame basis such that each of multiple, distinct decoding operations is performed on an entire frame at one time. In other embodiments, processing of different frames is interleaved.

Abstract: A method of decarburizing a molten alloy may generally comprise injecting a first gas comprising at least one of argon, carbon dioxide, and oxygen through a first fluid-conducting portion of a tuyere into the molten alloy below the surface of the molten alloy, and injecting a second gas comprising at least one of argon and carbon dioxide through a second fluid-conducting portion of the tuyere into the molten alloy below the surface of the molten alloy. The tuyere may comprise an inner portion concentrically aligned within an outer portion to define an annulus therebetween. The first gas may be injected through the inner portion, and the second gas may be injected through the annulus.

Abstract: Embodiments of a method and system for inter-prediction in decoding video data are described herein. In various embodiments, a high-compression-ratio codec (such as H.264) is part of the encoding scheme for the video data. Embodiments pre-process control maps that were generated from encoded video data, and generating intermediate control maps comprising information regarding decoding the video data. The control maps indicate which units of video data in a frame are to be processed using an inter-prediction operation. In an embodiment, inter-prediction is performed on a frame basis such that inter-prediction is performed on an entire frame at one time. In other embodiments, processing of different frames is interleaved. Embodiments increase the efficiency of the inter-prediction such as to allow decoding of high-compression-ratio encoded video data on personal computers or comparable equipment without special, additional decoding hardware.

Abstract: A phase locked loop (PLL) includes a first loop, a second loop, and a lock detector. The first loop locks a feedback signal having a frequency equal to a fraction of a frequency of an output signal to a reference signal in phase. The first loop has a first bandwidth. The second loop locks the feedback signal to the reference signal in frequency and has a second bandwidth. The first bandwidth is higher than the second bandwidth. The lock detector is coupled to the second loop and increases the second bandwidth in response to detecting that the feedback signal is not locked to the reference signal.