Abstract: A system and method for efficient management of operating modes within an integrated circuit (IC) for optimal power and performance targets. A semiconductor chip includes processing units each of which operates with respective operating parameters. Temperature sensors are included to measure a temperature of the one or more processing units during operation. A power manager determines a calculated power value independent of thermal conditions and current draw. The power manager reads each of a first thermal design power (TDP) value for the processing units and a second TDP value for a platform housing the semiconductor chip. The power manager determines a ratio of the first TDP value to the second TDP value. Additionally, the power manager determines another ratio of the first TDP value to the calculated power value. Using the measured temperature, the ratios and the calculated power value, the power manager determines a manner to adjust the operating parameters.

Abstract: Methods and apparatus for restricting access by one or more processors to an area of a secondary storage unit are presented herein. The methods and apparatus may comprise an independent programmable storage controller logic that divides a storage area of the secondary storage unit into at least a first area and a second area and controls usage of the areas as at least two virtual secondary storage units such that the processor(s) access the at least two virtual secondary storage units as if accessing at least two physical secondary storage units by selecting one of the at least two virtual secondary storage units as an active virtual secondary storage unit to provide the processor(s) access to the active virtual secondary storage unit based on a secondary storage unit configuration. Each virtual secondary storage unit may contain at least one region of which an access permission setting is modifiable.

Abstract: In a hardware-based virtualization system, a hypervisor switches out of a first function into a second function. The first function is one of a physical function and a virtual function and the second function is one of a physical function and a virtual function. During the switching a malfunction of the first function is detected. The first function is reset without resetting the second function. The switching, detecting, and resetting operations are performed by a hypervisor of the hardware-based virtualization system. Embodiments further include a communication mechanism for the hypervisor to notify a driver of the function that was reset to enable the driver to restore the function without delay.

Abstract: A method for rendering a scene across N number of processors is provided. The method includes evaluating performance statistics for each of the processors and establishing load rendering boundaries for each of the processors, the boundaries defining a respective portion of the scene. The method also includes dynamically adjusting the boundaries based upon the establishing and the evaluating.

Abstract: A method of processing a non-magnetic alloy workpiece comprises heating the workpiece to a warm working temperature, open die press forging the workpiece to impart a desired strain in a central region of the workpiece, and radial forging the workpiece to impart a desired strain in a surface region of the workpiece. In a non-limiting embodiment, after the steps of open die press forging and radial forging, the strain imparted in the surface region is substantially equivalent to the strain imparted in the central region. In another non-limiting embodiment, the strain imparted in the central and surface regions are in a range from 0.3 inch/inch to 1 inch/inch, and there exists no more than a 0.5 inch/inch difference in strain of the central region compared with the strain of the surface region of the workpiece. An alloy forging processed according to methods described herein also is disclosed.

Abstract: Methods and apparatus for improving the effects of display underflow using a variable horizontal blanking interval are disclosed. One embodiment of the present invention is a method of display that includes detecting a data ready signal that indicates availability of display data for transmission from a display pipeline, and generating a line-transmit signal based upon a clock signal and the data ready signal. The line-transmit signal is provided to the display pipeline. The line-transmit signal is substantially coincident with the clock signal if the data ready signal is set, and may be delayed if the data ready signal is not asserted. The display pipeline transmits the display data upon receiving the line-transmit signal.

Abstract: A bus protocol compatible device includes an encoder having an input for receiving a local clock signal, and an output, a multiplexer having a first input for receiving a reference clock signal, a second input coupled to said output of said encoder, a control input for receiving a select signal, and an output, and a driver having an input coupled to said output of said multiplexer, and an output for coupling to a bus protocol link.

Abstract: A dual hardness steel article comprises a first air hardenable steel alloy having a first hardness metallurgically bonded to a second air hardenable steel alloy having a second hardness. A method of manufacturing a dual hard steel article comprises providing a first air hardenable steel alloy part comprising a first mating surface and having a first part hardness, and providing a second air hardenable steel alloy part comprising a second mating surface and having a second part hardness. The first air hardenable steel alloy part is metallurgically secured to the second air hardenable steel alloy part to form a metallurgically secured assembly, and the metallurgically secured assembly is hot rolled to provide a metallurgical bond between the first mating surface and the second mating surface.

Abstract: A method, system, and computer program product are disclosed for providing improved access to accelerated processing device compute resources to user mode applications. The functionality disclosed allows user mode applications to provide commands to an accelerated processing device without the need for kernel mode transitions in order to access a unified ring buffer. Instead, applications are each provided with their own buffers, which the accelerated processing device hardware can access to process commands. With full operating system support, user mode applications are able to utilize the accelerated processing device in much the same way as a CPU.

Abstract: A method, system, and computer program product are disclosed for providing improved access to accelerated processing device compute resources to user mode applications. The functionality disclosed allows user mode applications to provide commands to an accelerated processing device without the need for kernel mode transitions in order to access a unified ring buffer. Instead, applications are each provided with their own buffers, which the accelerated processing device hardware can access to process commands. With full operating system support, user mode applications are able to utilize the accelerated processing device in much the same way as a CPU.

Abstract: A method and apparatus provides for the accommodation of display migration among a plurality of physical displays. In one example, the method and apparatus detects a display migration condition from at least a second physical display to a first physical display. The method and apparatus then controls compositing of a plurality of desktop surfaces so as enable access of each one of the plurality of desktop surfaces on the first physical display. The plurality of desktop surfaces include at least a desktop surface associated with the second physical display. The desktop surface is the content in a piece of memory in a frame buffer, which represents all the display content presented on the associated physical display. In one example, the plurality of desktop surfaces may be composited into at least one three-dimensional display object. The three-dimensional display object includes but is not limited to a revolving door object or other three-dimensional shape or object (e.g., a cube object).

Abstract: A method and apparatus for reducing net power consumption in a computer system includes identifying a plurality of processing states operable to execute a task. A processing state and current drain pattern is selected that is most power efficient. A selected processing state may include one or more processing elements of the computer system such as one or more processors or accelerators and indicates the manner in which one or more portions of the received task may be distributed among the processing elements of the computer system. The current drain pattern selected may be a constant current drain pattern or a pulsed current drain pattern and may be selected to optimize power consumption when executing the task among the one or more processing elements.

Abstract: Apparatuses, computer readable mediums, and methods of processor unit testing using cache resident testing are disclosed. The method may include loading a test program in a cache on a chip comprising one or more processor units. The method may include the one or more processor units executing the test program to generate one or more results. The method may include redirecting a first memory reference to the cache, wherein the first memory reference is generated during the execution of the test program. The method may include determining whether the one or more generated results match one or more test results. The method may include redirecting a memory request to a memory location resident in the cache if the memory request includes a memory location not resident in the cache. The method may include redirecting a memory request to the cache if the memory request is not directed to the cache.

Abstract: An input/output memory management unit (IOMMU) having an “invalidate all” command available to clear the contents of cache memory is presented. The cache memory provides fast access to address translation data that has been previously obtained by a process. A typical cache memory includes device tables, page tables and interrupt remapping entries. Cache memory data can become stale or be compromised from security breaches or malfunctioning devices. In these circumstances, a rapid approach to clearing cache memory content is provided.

Abstract: A compensation device configured to be positioned between a robotic arm and a robotic tool. The device may be configured to directly attach to the tool, or may be configured to be positioned away from the tool. The device generally includes a first section that connects to the robotic arm and a second section that connects to the tool. The second section is movable relative to the first section to provide for the tool to be positioned at various orientations. The second section may comply rotationally about a first axis. The second section may be movable in a second plane. In one embodiment, the second plane is perpendicular to the first axis.

Abstract: A method and device of over training a connection is provided. Noise is intentionally supplied and added to a signal that is subjected to a link training operation. The link training operation is used to obtain a link between a source device and a receiving device. The device includes a noise source from which noise is obtained and added to a signal to aid in link over-training.

Abstract: Apparatus and methods for reducing power consumption of a data transfer interface in a computer system are disclosed. In one embodiment, a method for reducing power consumption of a data transfer interface between a first device and a second device, includes, identifying a free interval between a first data and a second data, disabling the data transfer interface during the free interval, enabling the data transfer interface at the end of the free interval, and transmitting the second data. The method may also include a step of notifying the second device that the data transfer interface is being temporarily disabled. Another embodiment, for example, includes the transfer of display data (or video frames) over an interface, such as, a DisplayPort interface, between a graphics controller device and a timing controller device in a computer system.

Abstract: A method, a device, and a non-transitory computer readable medium for performing dithering on an L bit long input data are presented. An M bit long random data is generated, wherein M is a number of least significant bits of the input data. An M bit long frame counter value is added to the random data. The input data is rounded up to L-M most significant bits when the M least significant bits of the input data is greater than the sum of the frame counter value and the random data. The input data is truncated to the L-M most significant bits when the M least significant bits of the input data is less than or equal to the sum of the frame counter value and the random data.

Abstract: A dual-phase ferritic-martensitic stainless steel includes, by weight, about 11.5% to about 12% Cr, about 0.8% to about 1.5% Mn, about 0.75% to about 1.5% Ni, 0% to about 0.5% Si, 0% to about 0.2% Mo, 0% to about 0.0025% B, Fe, and impurities. In various embodiments, the steel has a Brinell hardness (HB) and Charpy V-notch impact energy at ?40° C. (CVN) such that CVN (ft-lb)+(0.4×HB) is about 160 or greater. Articles of manufacture including the stainless steels also are disclosed.

Abstract: A tool changer comprising a master module and a tool module includes a rapid-connect communication bus between the master and tool modules. A unique tool identification number, along with other tool-related information, may be transmitted from the tool module to the master module within about 250 msec of the master and tool modules coupling together. The master module includes a robotic system communications network node connected to the rapid-connect communication bus, and operative to transmit data between the tool and the network via the communication bus. The need for a separate network node in the tool module is obviated, reducing cost and reducing the start-up time required to initialize such a network node upon connecting to a new tool. The rapid-connect communication bus may be a serial bus.