Patents Assigned to ATI
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Publication number: 20140230605Abstract: A method of processing a metallic material includes introducing an electrically conductive metallic material comprising at least one of a metal and a metallic alloy into a furnace chamber maintained at a low pressure relative to atmospheric pressure. A first electron field having a first area of coverage is generated using at least a first ion plasma electron emitter, and the material within the furnace chamber is subjected to the first electron field to heat the material to a temperature above a melting temperature of the material. A second electron field having a second area of coverage smaller than the first area of coverage is generated using a second ion plasma electron emitter. At least one of any solid condensate within the furnace chamber, any solidified portions of the electrically conductive metallic material, and regions of a solidifying ingot to the second electron field, is subjected to the second electron field, using a steering system.Type: ApplicationFiled: April 24, 2014Publication date: August 21, 2014Applicant: ATI PROPERTIES, INC.Inventor: Robin M. Forbes Jones
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Patent number: 8811737Abstract: Embodiments of the present invention are directed to a method and apparatus for block based image compression with multiple non-uniform block encodings. In one embodiment, an image is divided into blocks of pixels. In one embodiment the blocks are four pixels by four pixels, but other block sizes are used in other embodiments. In one embodiment, a block of pixels in the original image is compressed using two different methods to produce a first and second compressed block. Thus, each block in the original image is represented by two, typically different, compressed blocks. In one embodiment, color associated with a pixel is determined by combining the compressed information about the pixel in the first compressed block with information about the pixel in the second compressed block. In another embodiment, global information about the image is combined with the information in the first and second compressed blocks.Type: GrantFiled: July 30, 2013Date of Patent: August 19, 2014Assignee: ATI Technologies ULCInventors: Konstantine Iourcha, Andrew S. C. Pomianowski, Raja Koduri
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Publication number: 20140226070Abstract: A method and apparatus is provided for reconstructing video frames that include missing pixels as a result of video stabilization techniques to compensate for camera movement and/or zooming. In one example, the method and apparatus caches transformed frames of video, identifies coordinates of missing pixels in a current transformed frame, and sequentially processes, for only the missing pixel coordinates, the cached transformed frames in reverse chronological order to identify pixels at coordinates in the cached transformed frames having valid data and corresponding to one of the missing pixel coordinates. Upon identifying a pixel having valid data at a coordinate in a cached transformed frame corresponding to a missing pixel coordinate, the method and apparatus inserts the valid data at the missing pixel coordinate.Type: ApplicationFiled: February 8, 2013Publication date: August 14, 2014Applicant: ATI TECHNOLOGIES ULCInventors: Yubao Zheng, Zingping Cao
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Patent number: 8803900Abstract: A method for performing an operation using more than one resource may include several steps: requesting an operation performed by a resource; populating a ring frame with an indirect buffer command packet corresponding to the operation using a method that may include for the resource requested to perform the operation, creating a semaphore object with a resource identifier and timestamp, in the event that the resource is found to be unavailable; inserting a command packet (wait) into the ring frame, wherein the command packet (wait) corresponds to the semaphore object; and submitting the ring frame to the graphics engine.Type: GrantFiled: December 22, 2011Date of Patent: August 12, 2014Assignee: ATI Technologies ULCInventor: Pat Truong
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Patent number: 8804331Abstract: Various computing devices and methods of thermally managing the same are disclosed. In one aspect, a method of thermally managing a computing device is provided where the computing device includes a housing that has a wall adapted to contact a body part of a user, a circuit board in the housing, and a semiconductor chip coupled to the circuit board. The method includes placing a first heat spreader in thermal contact with the semiconductor chip and the circuit board but separated from the wall by a gap.Type: GrantFiled: December 2, 2011Date of Patent: August 12, 2014Assignee: ATI Technologies ULCInventor: Gamal Refai-Ahmed
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Publication number: 20140216679Abstract: A casting system and method. The casting system can include an energy source and a hearth, which can have a tapered cavity. The tapered cavity can have a first end portion and a second end portion, and the tapered cavity can narrow between the first and second end portions. Further, the tapered cavity can have an inlet at the first end portion that defines an inlet capacity, and one or more outlets at the second end portion that define an outlet capacity. Where the cavity has a single outlet, the outlet capacity can be less than the inlet capacity. Where the cavity has multiple outlets, the combined outlet capacity can match the inlet capacity. Further, the cross-sectional area of the tapered cavity near the inlet can be similar to the cross-sectional area of the inlet.Type: ApplicationFiled: February 5, 2013Publication date: August 7, 2014Applicant: ATI PROPERTIES, INC.Inventors: Evan H. Copland, Matthew J. Arnold, Ramesh S. Minisandram
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Publication number: 20140217997Abstract: Techniques for performing DC to DC power conversion in switch-mode converter circuits include combinations of dynamic switch shedding, phase shedding, symmetric phase circuit topologies, and asymmetric phase circuit topologies. In at least one embodiment of the invention, a method of operating a power converter circuit includes operating a first phase switch circuit portion using a first number of switch devices when the power converter circuit is configured in a first mode of operation. The first number is greater than zero. The method includes operating the first phase switch circuit portion using the first number of switch devices when the power converter circuit is configured in a second mode of operation. The method includes operating a second phase switch circuit portion using a second number of switch devices when the power converter circuit is configured in the second mode of operation. The second number is greater than the first number.Type: ApplicationFiled: April 10, 2014Publication date: August 7, 2014Applicants: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULCInventors: Peter Thomas Hardman, Erwin Pang, Sanjiv K. Lakhanpal
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Patent number: 8799550Abstract: A system and method using new PCI Express transaction layer packet headers so that unchanged header information within a burst of transactions does not need to be re-transmitted. After the first full packet header of a burst is sent, subsequent packet headers in the burst are smaller. Thus, more reduced headers can be transmitted over time with a resulting increased efficiency. Both sides of the PCI Express transaction must support this system and method for this approach to be enabled. Once enabled, both the PCI Express transmitter and receiver can use the regular full header PCI Express packets as well as the reduced header packets.Type: GrantFiled: July 16, 2010Date of Patent: August 5, 2014Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Betty Luk, Gordon F. Caruk
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Patent number: 8797332Abstract: Methods and apparatus are provided, as an aspect of a combined CPU/APD architecture system, for discovering and reporting properties of devices and system topology that are relevant to efficiently scheduling and distributing computational tasks to the various computational resources of a combined CPU/APD architecture system. The combined CPU/APD architecture unifies CPUs and APDs in a flexible computing environment. In some embodiments, the combined CPU/APD architecture capabilities are implemented in a single integrated circuit, elements of which can include one or more CPU cores and one or more APD cores. The combined CPU/APD architecture creates a foundation upon which existing and new programming frameworks, languages, and tools can be constructed.Type: GrantFiled: December 14, 2011Date of Patent: August 5, 2014Assignees: ATI Technologies ULC, Advanced Micro Devices, Inc.Inventors: Paul Blinzer, Leendert Van Doorn, Gongxian Jeffrey Cheng, Elene Terry, Thomas Woller, Arshad Rahman
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Patent number: 8794993Abstract: A utility coupler comprises a coupling unit that is coupled to a tool unit via the reciprocal linear actuation of a hooking cam member in the coupling unit engaging a latching pin in the tool unit. The hooking cam member includes a composite cam surface operative to couple and hold the two units together as the latching pin engages different surfaces of the composite cam surface. Failsafe features prevent the inadvertent decoupling of the units.Type: GrantFiled: August 10, 2012Date of Patent: August 5, 2014Assignee: ATI Industrial Automation, Inc.Inventor: Daniel Allen Norton
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Patent number: 8795620Abstract: An embodiment of a method for recovering nitric acid from acid pickling solution includes introducing a treating material comprising at least one chemical into a pickling solution comprising free nitric acid. The treating material reacts with at least a portion of the free nitric acid in the pickling solution and produces NOx. A gas stream comprising at least a portion of the NOx is contacted with ozone, thereby forming oxidation products including nitrogen sesquioxide and nitrogen pentoxide. At least a portion of the nitrogen sesquioxide and nitrogen pentoxide is contacted with water, thereby forming nitric acid, and at least a portion of the nitric acid is collected.Type: GrantFiled: September 13, 2011Date of Patent: August 5, 2014Assignee: ATI Properties, Inc.Inventor: James A. Moore
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Patent number: 8796842Abstract: A method of assembling a semiconductor chip device is provided that includes providing a circuit board including a surface with an aperture. A portion of a first heat spreader is positioned in the aperture. A stack is positioned on the first heat spreader. The stack includes a first semiconductor chip positioned on the first heat spreader and a substrate that has a first side coupled to the first semiconductor chip.Type: GrantFiled: August 20, 2010Date of Patent: August 5, 2014Assignees: ATI Technologies ULC, Advanced Micro Devices, Inc.Inventors: Gamal Refai-Ahmed, Michael Z. Su, Bryan Black
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Patent number: 8794418Abstract: A compensation device that is positioned between a robot and a robotic tool. The device 10 generally includes a first section that connects to the robot and a second section that connects to the tool. The second section is movable relative to the first section for the tool to comply to accommodate variations in its positioning. The second section 12 may comply rotationally about x, y, and z orthogonal axes relative to the first section.Type: GrantFiled: March 14, 2013Date of Patent: August 5, 2014Assignee: ATI Industrial Automation, Inc.Inventor: Daniel Allen Norton
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Publication number: 20140211854Abstract: Methods and apparatus for facilitating motion estimation in video processing are provided. In one embodiment, search block is defined within one frame. A relative location of a corresponding block in another frame with respect to the search block is determined based on comparative searching at a predetermined granularity to produce a motion vector for the search block with a first precision. Correlation values are determined with respect to the search block for the corresponding block and for one block or more blocks defined at relative locations of less than the predetermined granularity with respect to the corresponding block in different directions. A refined motion vector for the search block with a second higher precision is determined based on the relative location of the block having a selected correlation value that is selected from among the determined correlation values.Type: ApplicationFiled: January 30, 2013Publication date: July 31, 2014Applicant: ATI TECHNOLOGIES ULCInventors: Yubao Zheng, Boris Ivanovic, Allen J. Porter, Xingping Cao
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Publication number: 20140211855Abstract: Methods and apparatus for facilitating processing a reference frame to produce an output frame. Motion vector data for a block of reference frame pels estimates the displacement of the reference frame pels from corresponding pels in a prior input frame. Comparison metrics are produced for a pel of the reference frame with respect to that pel and a plurality of neighboring reference frame pels A first comparison metric is based on a comparison with corresponding pels of a prior output frame that corresponds to the prior input frame as previously processed. A second comparison metric is based on a comparison with corresponding pels of a motion compensated prior output frame derived from applying motion vector data to the pels of the prior output frame. A pel of the output frame that corresponds to the reference frame pel is determined using the first and second comparison metrics.Type: ApplicationFiled: January 30, 2013Publication date: July 31, 2014Applicant: ATI TECHNOLOGIES ULCInventors: Sahar Alipour Kashi, Boris Ivanovic, Allen J. Porter
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Patent number: 8789254Abstract: A method of processing an alloy ingot or other alloy workpiece to reduce thermal cracking may generally comprise depositing a glass material onto at least a portion of a surface of a workpiece, and heating the glass material to form a surface coating on the workpiece that reduces heat loss from the workpiece. The present disclosure also is directed to an alloy workpieces processed according to methods described herein, and to articles of manufacture including or made from alloy workpieces made according to the methods.Type: GrantFiled: January 17, 2011Date of Patent: July 29, 2014Assignee: ATI Properties, Inc.Inventors: Ramesh S. Minisandram, Richard L. Kennedy, Robin M. Forbes Jones
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Patent number: 8790532Abstract: A method of reducing defect heights of iron mound defects on a mill glass coated electrical steel, comprises contacting at least a portion of a surface of a mill glass coated electrical steel with an acidic solution for a contacting time sufficient to reduce an average height of iron defects on the surface to a an average height in a range of 0 percent to 150 percent of the thickness of the mill glass coating, without effectively removing the mill glass coating. After contacting, the acid contacted mill glass coated electrical steel is rinsed with water and dried.Type: GrantFiled: January 18, 2012Date of Patent: July 29, 2014Assignee: ATI Properties, Inc.Inventor: James M. Rakowski
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Patent number: 8784762Abstract: Methods and systems for treating a gas stream comprising NOx are disclosed. In one embodiment of the method, the gas stream comprising NOx is reacted with ozone to form oxidation products including nitrogen sesquioxide and nitrogen pentoxide. At least a portion of the nitrogen sesquioxide and nitrogen pentoxide is reacted with water to form nitric acid, and a solubilized form of the nitric acid is collected and may be reused or otherwise utilized. Systems for conducting the method also are disclosed.Type: GrantFiled: February 15, 2011Date of Patent: July 22, 2014Assignee: ATI Properties, Inc.Inventor: James A. Moore
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Patent number: 8788792Abstract: A multi-instruction set architecture (ISA) computer system includes a computer program, a first processor, a second processor, a profiler, and a translator. The computer program includes instructions of a first ISA, the first ISA having a first complexity. The first processor is configured to execute instructions of the first ISA. The second processor is configured to execute instructions of a second ISA, the second ISA being different than the first ISA and having a second complexity, wherein the second complexity is less than the first complexity. The profiler is configured to select a block of the computer program for translation to instructions of the second ISA, wherein the block includes one or more instructions of the first ISA. The translator is configured to translate the block of the first ISA into instructions of the second ISA for execution by the second processor.Type: GrantFiled: February 13, 2012Date of Patent: July 22, 2014Assignee: ATI Technologies ULCInventors: John S. Yates, Jr., Matthew F. Storch, Sandeep Nijhawan, Dale R. Jurich, Korbin S. Van Dyke
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Patent number: D710964Type: GrantFiled: March 15, 2013Date of Patent: August 12, 2014Assignee: ATI IP, LLCInventor: John R. Chvala