Abstract: A circuit arrangement is provided for processing satellite signals comprising a first circuit part, which is made as a processor for computing position and/or speed signals from satellite signals, a second circuit part, which is made as a real-time clock to provide a time signal, at least two voltage sources, which are provided to supply at least one circuit part, and switching means, which are provided for switching the supply of at least one circuit part between the first voltage source and the second voltage source. According to an embodiment, the switching means have at least one voltage monitor with a bandgap voltage reference circuit to determine a switching voltage. The circuit arrangement can be used for GPS-supported navigation systems.

Abstract: A frequency modulator is provided for generating an output signal with a frequency that is a function of a modulation signal, wherein the modulation signal can assume N?2 different discrete modulation values, and a predetermined frequency value of the output signal is associated with each modulation value, containing: a) a closed phase locked loop with a loop filter for providing a first control voltage, with a voltage controlled oscillator for generating the output signal, and with a switchable frequency divider for deriving a frequency-divided signal, and b) a modulation unit that is designed to provide, at a first output, values of a divisor that are a function of the modulation signal, and at a second output, a second control voltage that is a function of the modulation signal, c) wherein the oscillator has a first control input connected to the loop filter and has a second control input connected to the second output of the modulation unit, and is designed to generate the output signal as a function of t

Abstract: An integrated protection circuit is provided to protect an integrated component against an electrostatic discharge with a conductive structure between the integrated component and a housing terminal, whereby two substantially parallel conductive sections of the conductive structure guide the electrostatic discharge in a preferential direction by inductive coupling.

Abstract: High-voltage field-effect transistor is provided that includes a drain terminal, a source terminal, a body terminal, and a gate terminal. A gate oxide and a gate electrode, adjacent to the gate oxide, is connected to the gate terminal. A drain semiconductor region of a first conductivity type is connected to the drain terminal. A source semiconductor region of a first conductivity type is connected to the source terminal. A body terminal semiconductor region of a second conductivity type is connected to the body terminal. A body semiconductor region of the second conductivity type, is partially adjacent to the gate oxide to form a channel and is adjacent to the body terminal semiconductor region. A drift semiconductor region of the first conductivity type is adjacent to the drain semiconductor region and the body semiconductor region, wherein in the drift semiconductor region, a potential barrier is formed in a region distanced from the body semiconductor region.

Abstract: A method for manufacturing a semiconductor article and a semiconductor article is provided, wherein a base region of a first semiconductor material is applied, a silicide layer is applied above the base region, after the application of the silicide layer, an opening is created in the silicide layer by removing the silicide layer within the area of the opening, and after this, an emitter region is formed within the opening.

Abstract: Time information is retrieved from time signals transmitted by a transmitter and received by a receiver. The retrieval relies on the examination of at least one time portion (86, 87, 88) within a time frame. The time portion has a duration shorter than the duration of the time frame (80-82), to reduce processing operations. The examination checks whether an amplitude of the time signal changed within a time portion. The amplitude change either up or down is then evaluated for the retrieval of the time information. A receiver for receiving the time signals includes components for preprocessing the received time signals thereby reducing the processing steps of a microprocessor connected to the output of the receiver.

Abstract: An arrangement is provided for contacting an integrated circuit in a package by a contact plate arranged on a circuit carrier, wherein the package has contact locations on the contact plate side. In this context, the contact plate has contact vanes, which are formed such that they have a spring action directed normal to the circuit carrier and such that the contact vanes can be brought parallel to the circuit carrier by pressing the package against the contact vanes. The contact locations and contact vanes each establish an electrical connection with one another in the state in which they are pressed against the circuit carrier.

Abstract: An oscillator is provided having an oscillator circuit including at least one oscillator circuit inductor and a first oscillator circuit capacitor, whereby the value of the first oscillator circuit capacitor is reversible by means of the first control voltages between different stages. The oscillator is characterized by a first control voltage source, which applies first control voltages with at least three stepwise different values to the first oscillator circuit capacitor. Preferably, the control voltages are generated over a network of current sources and resistors, whereby the network compensates for the thermal response of the oscillator. Further, a method for operating this type of oscillator is presented.

Abstract: A transponder and method for operating a transponder, which has a capacitor (Cbuf) for storing power transmitted via an air interface and an arithmetic logic unit (10) that can be supplied with the stored power, in which a capacitor voltage (VC) of the capacitor (Cbuf) is compared with a first threshold (V1), in which the capacitor voltage (VC) is compared with a second threshold (V2), whereby the first threshold (V1) and the second threshold (2) are different, in which in a first operating mode (M1), when the capacitor voltage (VC) is above the first threshold (V1), the arithmetic logic unit (10) performs a number of routines with a different priority, in which in a second operating mode (M2), when the capacitor voltage (VC) is between the first threshold (V1) and the second threshold (V2), a number of low-priority routines are stopped and a number of high-priority routines are continued.

Abstract: A CMOS current mirror is provided that includes a current input, an input transistor, whose conductivity path is located between the current input and a reference potential terminal, a current output, an output transistor, whose conductivity path is connected to the reference potential terminal and which supplies the current output with an output current, a gate node common for both transistors, and a supply potential terminal. The current mirror further includes a first additional transistor, whose conductivity path is located between the supply potential terminal and the gate node and whose gate terminal is connected to the current input, and a second additional transistor, whose conductivity path is located between the gate node and the reference potential terminal and whose gate terminal is connected to the gate node.

Abstract: Amplifier circuit for amplifying an input signal, having a vertically integrated cascode that has a collector semiconductor region of a collector, adjacent to the collector semiconductor region, a first base semiconductor region of a first base, a second base semiconductor region of a second base, an intermediate base semiconductor region adjoining both the first base semiconductor region and the second base semiconductor region, and an emitter semiconductor region of an emitter adjacent to the second base semiconductor region, wherein a signal input is connected to the second base, and the first base is electrically coupled both to a voltage source that is independent of the input signal and to the collector.

Abstract: Method for manufacturing integrated circuits having silicon-germanium heterobipolar transistors, wherein a collector semiconductor region is created, an etch stop layer is created on a connection region, an opening is introduced into this etch stop layer, semiconductor material, which is formed as a single crystal at least in the collector semiconductor region above the opening, is applied over the etch stop layer and over the opening. Before etching of the semiconductor material, a masking layer is applied above the collector semiconductor region to the semiconductor material, which protects the collector semiconductor region from the etching. Afterwards the semiconductor material is etched to the depth of the etch stop layer, the etch stop layer acting as an etch stop such that reaching an interface between the semiconductor material and the etch stop layer is detected during the etching and the etching is stopped depending on the detection.

Abstract: A fluid sensor is provided for determining a fluid characteristic, having an electronic sensor element that has an active surface for determining the fluid characteristic, having a mounting plate associated with the sensor element, and having a filter device associated with the sensor element for filtering the fluid, in which the active surface of the sensor element is oriented toward the mounting plate and in which the mounting plate is provided with an opening opposite from the active surface of the sensor element. According to an embodiment the invention, an end region of the filter device is accommodated in a sealed fashion in the opening of the mounting plate. Furthermore, the fluid sensor can be used for tire pressure measurement.

Abstract: A signal processing device and signal processing method is provided that includes a detection unit for detecting a signal strength of a signal, whereby the detection unit is configured to output a detection value that represents the signal strength of the signal; a settable digital filter connected upstream of the detection unit, whereby filter coefficients for setting a transfer characteristic of the filter are assigned to an amplification or attenuation of the signal by the filter; a digital multiplication unit, which is connected upstream of the detection unit for amplification or attenuation of the signal, whereby the multiplication unit is configured to compensate partially for the amplification or attenuation of the filter, whereby the compensation is encumbered with a residual error; and a correction unit to apply to the detection value a correction value at least partially compensating for the residual error.

Abstract: A correlation device is provided that includes an adder for adding an input signal sequence and an auxiliary signal sequence to obtain an addition signal sequence, and a delay element for delaying the addition signal sequence to obtain the auxiliary signal sequence, whereby the delay element has a plurality of coefficient outputs for providing addition signal sequence coefficients. The correlation device comprises further a linking element for the coefficient-wise linking of an addition signal sequence coefficient with a linking coefficient to obtain a correlation result.

Abstract: A transponder receives its operating energy from an external source such as a radio signal or a battery. Such transponders are used for example in a vehicle or in a remote sensor. The response range of the transponder is increased by converting the received energy into an operating voltage which in turn is used to generate a function voltage required for performing a current function sequence. The generated function voltage is checked to determine at least one characteristic of the generated function voltage. The determined function voltage characteristic, for example a voltage value directly representing the function voltage, is then used to acknowledge or reject a result of performing the function sequence. Thus, the time duration for performing any current function sequence is flexibly adapted to the current requirements of that function sequence, whereby the power consumption of the transponder is optimally reduced and the response range respectively increased.

Abstract: A differential cascode amplifier is disclosed that includes in each branch two transistors connected to form a cascode circuit, and has a cross-compensation (neutralization) with at least one pair of capacitors for compensating a parasitic capacitance of a transistor of each branch, wherein in each case, one capacitor of the pair is equal to the parasitic capacitance of the transistor of the associated branch.

Abstract: A device for application in the high frequency field and a method for forming a photonic band-gap structure are provided. The device being mountable on a primary substrate for forming the device. The device being formed by forming conformal coplanar waveguide metallizations on surface areas of two substrates, connecting the conformal coplanar waveguide metallizations of the two substrates, and structured back-etching of the two substrates, starting at surface areas of the two substrates that are opposite the coplanar waveguide metallizations.

Abstract: A circuit arrangement for generating a temperature-compensated voltage or current reference value (UREF) from a supply voltage (VCC) based on the bandgap principle comprises a PTAT circuit (201) for generating a PTAT signal (I1) proportional to the absolute temperature, a CTAT circuit (202) for generating a CTAT signal (UBE) inversely proportional to the absolute temperature, whereby for generating the temperature-compensated reference value (UREF), the PTAT signal (UBE) and the CTAT signal (I1) are superimposed, and a reference value monitoring circuit (203a, 203b, 203), which generates a reference value monitoring signal (UREF_OK) that indicates whether the reference value (UREF) is validly generated or not. The reference value monitoring circuit (203) is formed in such a way that it evaluates a current (I2) and/or a voltage in the CTAT circuit (202) and/or in the PTAT circuit (201) for generating the reference value monitoring signal (UREF_OK).

Abstract: A distributed amplifier is provided that includes an input network that simulates an input signal transmission line, and having an output network that simulates an output signal transmission line, and also having multiple unit cells with amplifying characteristics that are connected in parallel to one another between the input network and the output network, that amplify a signal propagating through the input network and feed it into the output network with a predetermined phase relationship to a signal propagating through the output network.