Patents Assigned to Austriamicrosystems AG
  • Publication number: 20100253399
    Abstract: A circuit arrangement for operating voltage detection has a detection block (1) and a control block (2). Detection block (1) has a first transistor (P1) that is connected between a first supply voltage terminal (VDD) and a first node (K1) and has a first control terminal (S1), a first resistor element (R1) that is connected between first node (K1) and second supply voltage terminal (VSS), a second transistor (P2) that is connected between first supply voltage terminal (VDD) and a second node (K2) and has a second control terminal (S2), a second resistor element (R2) that is connected between second node (K2) and second supply voltage terminal (VSS), a first switch (N1) that connects first node (K1) to second control terminal (S2), and a third resistor element (R3) that is connected between second control terminal (S2) and first supply voltage terminal (VDD).
    Type: Application
    Filed: March 30, 2010
    Publication date: October 7, 2010
    Applicant: austriamicrosystems AG
    Inventor: Johannes FELLNER
  • Publication number: 20100252900
    Abstract: Through a main surface (10) of a semiconductor substrate (1) of a first type of conductivity, a doped well of a second type of conductivity is implanted to form a sensor region (3) extending perpendicularly to the main surface. The sensor region can be confined laterally by trenches (5) comprising an electrically insulating trench filling (6). The bottom of the sensor region is insulated by a pn-junction (20). Contacts (4) are applied to the main surface and provided for the application of an operation voltage and the measurement of a Hall voltage.
    Type: Application
    Filed: March 24, 2010
    Publication date: October 7, 2010
    Applicant: austriamicrosystems AG
    Inventors: Rainer MINIXHOFER, Sara Carniello, Volker Peters
  • Publication number: 20100246540
    Abstract: A method for channel switching comprising the steps: establishing (10) an active communication in a channel ch(m), checking (11) if the communication at an actual timeslot t(n) is successful, if checking (11) if the communication at the actual timeslot t(n) is successful, keeping the communication using the channel ch(m) for a next timeslot t(n+1) and repeating checking (11) if the communication at the actual timeslot t(n) is successful, if checking (11) if the communication at the actual timeslot t(n) is not successful, initiating a selection of a next channel ch(m+1). Further a device for communication is presented.
    Type: Application
    Filed: March 25, 2010
    Publication date: September 30, 2010
    Applicant: austriamicrosystems AG
    Inventors: Mauro Afonso Perez, Nikolaus Ribic
  • Patent number: 7795780
    Abstract: A phase-locked loop for controlling an electromechanical component comprises a digitally controlled oscillator (10), a phase comparator (20), and a digital loop filter (30). The digitally controlled oscillator (10) has an output (11), at which an oscillator signal (SOSC) can be picked up and which can be coupled to a first terminal (51) of the electromechanical component (50). The phase comparator (20) comprises a first input (21), which is coupled to the output (11) of the digitally controlled oscillator (10), and a second input (22), which can be coupled to the first terminal (51) or to a second terminal (52) of the electromechanical component (50) for feeding a current signal (S3). The digital loop filter (30) is connected between the phase comparator (20) and the digitally controlled oscillator (10).
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: September 14, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Urs Denier, Mark Niederberger
  • Patent number: 7791411
    Abstract: An amplifier arrangement and a method for amplifying a signal, the arrangement including a transistor to amplify an input signal and to provide an intermediate signal. The intermediate signal is amplified to form an output signal which is fed back to the transistor.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: September 7, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Thomas Carl Fröhlich, Nicole Heule
  • Publication number: 20100220532
    Abstract: In one embodiment, a readout circuit for rewritable memories comprises a control logic unit with an input for supplying a start signal and with several outputs for providing a respective control signal as a function of start signal, a first terminal for switchable connection to a first memory cell by means of a first switch, and a second terminal for switchable connection by means of a second switch to a second memory cell, and a readout unit coupled to the control logic unit, as well as to the first and second terminals, with an output for providing an output signal as a function of a state of the first and/or the second memory cell and as a function of the control signals, wherein the readout circuit is designed for self-terminating operation in a reading mode and in a test mode. A readout method for rewritable memories is additionally provided.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 2, 2010
    Applicant: austriamicrosystems AG
    Inventors: Johannes FELLNER, Gregor Schatzberger
  • Patent number: 7786777
    Abstract: The circuit arrangement (1) comprises an input (2) for the connection of an oscillator (3) and an amplifier circuit (20) having a first input (21) that is coupled to the input (1) of the circuit arrangement (1), having a second input (22) and an output (23) that is connected to an output (4) of the circuit arrangement (1). A clock signal (Vout) with a duty cycle (?) can be accessed at the output (4) of the circuit arrangement (1). The circuit arrangement (1) furthermore incorporates a low-pass filter (40), the input of which is connected to the output (23) of the amplifier circuit (20), and an integrator circuit (50) the input of which is connected to the low-pass filter (40) and the output of which is connected to the second input (22) of the amplifier circuit (20) for the delivery of an adjustable threshold value (Vth) for controlling the duty cycle (?).
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: August 31, 2010
    Assignee: Austriamicrosystems AG
    Inventor: Urs Denier
  • Patent number: 7781809
    Abstract: In a high voltage junction field effect transistor, a first well (11) of a first conductivity type is formed in a substrate (10) of a second conductivity type. A source (14) and a drain (15) which are each of the first conductivity type are formed in the first well. A gate (16) of the second conductivity type is arranged in a second well (12) of the second conductivity type, wherein the second well is of the retrograde type. The source, gate and drain are spaced apart from one another by field oxide regions (13a to 13d). Field plates (17a, 17b) extend over the field oxide (13a, 13b) from the gate (16) in the direction of source and drain.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: August 24, 2010
    Assignee: Austriamicrosystems AG
    Inventor: Martin Knaipp
  • Patent number: 7778055
    Abstract: An apparatus includes a voltage converter for supplying voltage to an electrical load. The voltage converter is electrically connected at an output to a terminal of a series circuit. The voltage converter includes mechanisms for connecting the electrical load and a current sink. The voltage supplied by the voltage converter is dependent on an input voltage and on a present multiplication factor. The apparatus also includes a first comparator, a second comparator, and selection logic.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: August 17, 2010
    Assignee: Austriamicrosystems AG
    Inventor: Peter Trattler
  • Publication number: 20100194366
    Abstract: A DC/DC converter comprises an inductive element (L) having a first terminal connected to an input connection (1) and a second terminal (4) coupled to a reference potential connection (3) by a first switching element (N1). A second switching element (P1) being a p-channel field-effect transistor couples the second terminal (4) to an output connection (2). A control unit (CTL) comprises a detection unit which is configured to detect a first mode of operation in which an input voltage (VIN) is higher than a desired output voltage (VOUT).
    Type: Application
    Filed: February 4, 2010
    Publication date: August 5, 2010
    Applicant: austriamicrosystems AG
    Inventor: Emir Serdarevic
  • Patent number: 7768216
    Abstract: A control circuit for controlling light emitting diodes comprises a switch for turning on or off a string of light emitting diodes. A combiner generates a control signal from a data signal and a noise signal. A sigma delta modulator receives the control signal and a clock signal with a clock period and generates a switching signal for controlling the switch.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: August 3, 2010
    Assignee: Austriamicrosystems AG
    Inventor: Manfred Pauritsch
  • Patent number: 7768753
    Abstract: A circuit arrangement for protection against electrostatic discharges comprises a diverting element, which is connected between a first and a second terminal and has a control input, via which the diverting element can be controlled into the conducting state. Moreover, trigger elements are provided, which have a trigger output for outputting a trigger signal in a manner dependent on a voltage between the first and the second terminal. The circuit arrangement furthermore comprises at least one amplifier unit, which is coupled to one of the trigger outputs on the input side and to the control input on the output side.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: August 3, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Bernd Fankhauser, Dieter Maier, Franz Unterleitner
  • Publication number: 20100181973
    Abstract: A voltage converter comprises a first, a second and a third capacitor (11, 12, 13) which are switched in series in at least one operating state, an input (1) for supplying an input voltage (VIN), an output (2) for providing an output voltage (VOUT), and a compensation circuit (5). The input (1) of the voltage converter is coupled to a capacitor from a group comprising the first, the second and the third capacitor (11, 12, 13). The output (2) of the voltage converter is coupled to a capacitor from the group comprising the first, the second and the third capacitor (11, 12, 13). The compensation circuit (5) is coupled to the first, the second and the third capacitor (11, 12, 13) and adapts a first voltage (V1) of the first capacitor (11), a second voltage (V2) of the second capacitor (12) and a third voltage (V3) of the third capacitor (13) to one another.
    Type: Application
    Filed: March 25, 2008
    Publication date: July 22, 2010
    Applicant: austriamicrosystems AG
    Inventors: Manfred Pauritsch, Peter Trattler
  • Patent number: 7759929
    Abstract: A sensor arrangement for detecting an angle of rotation of a rotating body. At least one first sensor and one second sensor are connected to one another in a cascade in such a manner that the sensor signal from the first sensor is converted into a first control current which is applied as a bias current to the second sensor, the two angular dependencies of the first and second sensors being multiplied. This achieves improved interpolation when determining the angle of rotation on the basis of the sensor signals provided by the sensor arrangement.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: July 20, 2010
    Assignee: Austriamicrosystems AG
    Inventor: Richard Forsyth
  • Patent number: 7750708
    Abstract: A circuit arrangement for generating an IQ signal which comprises an oscillator (3) and a frequency divider (4). The oscillator (3) and the frequency divider (4) are arranged in a common current path between the supply and reference potentials (7, 5) in accordance with the proposed principle. It is possible to operate the two function blocks using a common BIAS current and additionally to save components.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: July 6, 2010
    Assignee: Austriamicrosystems AG
    Inventor: Tony Gschier
  • Publication number: 20100164451
    Abstract: A voltage regulator, comprising: an input terminal; an output terminal at which an output voltage is provided; an output transistor which couples the input terminal of the voltage regulator to the output terminal of the voltage regulator; and a transimpedance amplifier including an input terminal which is coupled to the output terminal of the voltage regulator and an output terminal which is coupled to a control terminal of the output transistor, optionally via a coupling, the coupling having an impedance value between the output terminal of the transimpedance amplifier and the control terminal of the output transistor which at a given frequency is smaller than or equal to an impedance value of an output impedance of the transimpedance amplifier.
    Type: Application
    Filed: January 16, 2008
    Publication date: July 1, 2010
    Applicant: Austriamicrosystems AG
    Inventors: Marco CERCHI, Carlo FIOCCHI
  • Publication number: 20100164594
    Abstract: An arrangement for charge integration comprises a charge-generating circuit (2) that provides a charge-dependent signal, and a coupling circuit (20) comprising a first and a second transistor (T1, T2). The first transistor (T1) can be controlled in dependence on the charge-dependent signal. The second transistor (T2) is configured to forward the charge-dependent signal in dependence on a control signal provided by the first transistor (T1). The forwarded charge-dependent signal is integrated by an integrator (30).
    Type: Application
    Filed: November 28, 2007
    Publication date: July 1, 2010
    Applicant: Austriamicrosystems AG
    Inventor: Andreas Fitzi
  • Publication number: 20100148257
    Abstract: A MOSFET comprising a substrate of a semiconductor material; source/drain regions, which are arranged at a distance from each other at a surface of the substrate; a gate electrode arranged above an area of the surface of the substrate between the source/drain regions, the gate electrode being electrically insulated from the semiconductor material; at least one recess in the gate electrode, a through-contact arranged in the recess of the gate electrode, the through-contact being electrically insulated from the gate electrode; a terminal contact on the semiconductor material; and a terminal conductor arranged on the side of the gate electrode that faces away from the substrate, wherein the through-contact electrically connects the terminal contact to the terminal conductor.
    Type: Application
    Filed: February 8, 2008
    Publication date: June 17, 2010
    Applicant: austriamicrosystems AG
    Inventor: Georg Röhrer
  • Patent number: 7738265
    Abstract: A control arrangement for a voltage converter includes a first input electrically connected to a device configured to sense a first current in a primary side of a transformer and a first output electrically connected to a control terminal of a transistor. The transistor is electrically connected with the primary side of the transformer and the first output is configured to supply a control signal to the control terminal. The control arrangement also includes a computing unit configured to adjust the control signal so that the transistor has a low resistance value during a switched-on phase and a high resistance value during a switched-off phase.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: June 15, 2010
    Assignee: Austriamicrosystems AG
    Inventor: Peter Trattler
  • Patent number: 7738222
    Abstract: A circuit arrangement for protecting an integrated semiconductor circuit includes a protection circuit connected between an element to be protected and a reference potential. The protection circuit includes a thyristor structure. The circuit arrangement also includes a control circuit configured to drive the protection circuit by generating a plurality of control signals drive an active element of the protection circuit.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: June 15, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Bernd Deutschmann, Bernd Fankhauser, Michael Mayerhofer, Pawel Chojecki