Patents Assigned to Austriamicrosystems AG
  • Circuit Arrangement and Method for Testing a Reset Circuit
    Publication number: 20110025365
    Abstract: A circuit arrangement (10) for testing a reset circuit (11) comprises the reset circuit (11) and a changeover switch (14). The reset circuit comprises a voltage input (12) for feeding an input voltage (VDD) and an output (13) for providing a reset signal (POR) as a function of the input voltage (VDD). The changeover switch (14) comprises a first input (15) for feeding a test voltage (VTM), a second input (16) for feeding a supply voltage (VBAT), a control input (17) for changing over between the first and the second input (15, 16) as a function of the test signal (TM), and an output (18) that is coupled to the voltage input (12) of the reset circuit (11).
    Type: Application
    Filed: January 9, 2009
    Publication date: February 3, 2011
    Applicant: austriamicrosystems AG
    Inventor: Karl Georg Waser
  • Circuit Arrangement and Method for Evaluating a Data Signal
    Publication number: 20110025377
    Abstract: A circuit arrangement (10) comprises a circuit terminal (11) for supplying a data signal (DATA) having digital information, a logic circuit (12) that is coupled at an input (22) to the circuit terminal (11) for supplying the digital information, an activation circuit (13), and a voltage regulator (14) that is coupled for activation to an output (18) of the activation circuit (13). The activation circuit (13) comprises an input (16) that is coupled to the circuit terminal (11), a delay element (17) that is coupled to the input (16) of the activation circuit (13), and the output (18), connected to the delay element (17), for emitting an activation signal (SON).
    Type: Application
    Filed: July 2, 2008
    Publication date: February 3, 2011
    Applicant: austriamicrosystems AG
    Inventors: Manfred Lueger, Peter Trattler
  • Switched-capacitor amplifier arrangement and method
    Patent number: 7880538
    Abstract: A switched-capacitor amplifier arrangement and a method to amplify a signal are presented. A forward path has at least one switched capacitor (10) controlled by a clock signal, thus providing an amplification phase (1) of the forward path and an additional clock phase (2). A damping means (22) is connected to the forward path, the damping means being designed for attenuation of the signal peak at the beginning (2p) of the amplification phase. This avoids an undesired feed forward effect at the beginning of the amplification phase of an SC circuit.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: February 1, 2011
    Assignee: Austriamicrosystems AG
    Inventor: Vivek Sharma
  • Current balance arrangement
    Patent number: 7872463
    Abstract: A current mirror arrangement comprising two transistors (11, 12) which are of different conductivity types and are each suitable for outputting a bias current (PBIAS, NBIAS) is specified. A controlled current source (13, 13?) is connected between the two transistors (11, 12) and forms the output of a current mirror (18, 13?). The proposed principle ensures that the output bias signals (PBIAS, NBIAS) match one another in a highly precise manner. The proposed current mirror arrangement may preferably be integrated using CMOS circuit technology.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: January 18, 2011
    Assignee: Austriamicrosystems AG
    Inventor: Jakob Jongsma
  • Process for manufacturing rounded polysilicon electrodes on semiconductor components
    Patent number: 7867837
    Abstract: A polysilicon layer provided for a polysilicon electrode (8) is patterned by means of a resist mask (5) and an auxiliary layer (4) made of a material that is suitable as an antireflection layer, the auxiliary layer (4) being provided with lateral hollowed-out recesses in such a way that the polysilicon electrode is formed with rounded edges (7) during etching. The auxiliary layer is preferably produced from a soluble material and with a thickness of 70 nm to 80 nm. A base layer (2) may be provided as a gate dielectric of memory cell transistors and additionally as an etching stop layer.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: January 11, 2011
    Assignee: Austriamicrosystems AG
    Inventors: Franz Bermann, Günther Koppitsch, Sven Schroeter
  • Semiconductor body comprising a transistor structure and method for producing a transistor structure
    Patent number: 7863170
    Abstract: A semiconductor body includes a substrate, a buried zone having a first conductivity type that is formed in the substrate, a first zone having the first conductivity type that is above the buried zone, a second zone having a second conductivity type that is different from the first conductivity type and above the first zone, and a third zone having the first conductivity type that is above the second zone. The buried zone includes first and second implantation regions that are formed via first and second implantations that are performed using a mask. The buried zone, the first zone, the second zone and the third zone are parts of a first transistor structure.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: January 4, 2011
    Assignee: Austriamicrosystems AG
    Inventors: Georg Röhrer, Bernard Löffler, Jochen Kraft
  • Oscillator Circuit and Method for Generating a Clock Signal
    Publication number: 20100327985
    Abstract: An oscillator circuit comprises a charging block (200) with a first terminal (201) for feeding a first charging current (IREF1), to which terminal a first capacitor (C1) and a series circuit of a first and a second switch (MN1, MN2) are connected, and with a second terminal (202) for feeding a second charging current (IREF2), to which terminal a second capacitor (C2) and a series circuit of a third and a fourth switch (MN3, MN4) are connected, as well as a comparison circuit (160) with a first and a second comparator (161, 162). The comparators (161, 162) are configured to compare voltages (VC1, VC2) at the first and second terminals (201, 202) to a reference voltage (VREF_OSC), wherein their output is connected to control terminals of the third or first switch (MN3, MN1).
    Type: Application
    Filed: June 30, 2010
    Publication date: December 30, 2010
    Applicant: austriamicrosystems AG
    Inventor: Gregor SCHATZBERGER
  • Buck-Boost Switching Regulator and Method Thereof
    Publication number: 20100327833
    Abstract: A method for DC/DC conversion comprises operating in a Boost mode of operation or in a Buck-Boost mode of operation. Furthermore, the method comprises switching from the Boost mode of operation to the Buck-Boost mode of operation, if a desired value (VOUTR) of an output voltage (VOUT) which is generated from a supply voltage (VIN) by the DC/DC conversion is smaller than a first reference voltage (VR1). The method also comprises switching from the Buck-Boost mode of operation to the Boost mode of operation, if the desired value (VOUTR) is larger than a second reference voltage (VR2).
    Type: Application
    Filed: June 26, 2008
    Publication date: December 30, 2010
    Applicant: Austriamicrosystems AG
    Inventor: Pramod Singnurkar
  • Amplifier arrangement and signal generation method
    Patent number: 7855602
    Abstract: An amplifier arrangement includes an output amplifier stage (OA) comprising a stage input (SIN), a stage output (SOUT) which is coupled to a signal output (OUT) of the amplifier arrangement, and a capacitive element (CE) which couples the stage output (SOUT) to the stage input (SIN). A driver stage (DR) comprises a driver input (DIN) and a driver output (DOUT) which is coupled to the stage input (SIN). The driver stage (DR) is configured to generate a voltage potential at a driver output (DOUT) depending on an input current at the driver input (DIN) and to provide a charging current to the capacitive element (CE) being higher than the input current.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: December 21, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Carlo Fiocchi, Andrea Pierin
  • Semiconductor Substrate with Through-Contact and Method for Production Thereof
    Publication number: 20100314762
    Abstract: The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.
    Type: Application
    Filed: July 23, 2008
    Publication date: December 16, 2010
    Applicant: austriamicrosystems AG
    Inventors: Franz Schrank, Martin Schrems, Jochen Kraft
  • Circuit Configuration and Method for Controlling Particularly Segmented LED Background Illumination
    Publication number: 20100315442
    Abstract: A circuit arrangement for controlling a segmented LED backlight in particular, comprises a generator (50) with a first input (10) to be supplied with a synchronizing signal (SYNC) that comprises image frequency information and/or line frequency information of a display unit, a second input (20) to be supplied with a data signal (DATA) that comprises image information of the display unit, and with an output (30) for providing a modulated signal (MOD).
    Type: Application
    Filed: July 10, 2008
    Publication date: December 16, 2010
    Applicant: austriamicrosystems AG
    Inventor: Manfred Pauritsch
  • Field-Effect Transistor and Method for Producing a Field-Effect Transistor
    Publication number: 20100308404
    Abstract: A semiconductor body (10) comprises a field-effect transistor (11). The field-effect transistor (11) comprises a drain region (12) of a first conduction type, a source region (13) of the first conduction type, a drift region (16) and a channel region (14) of a second conduction type which is opposite to the first conduction type. The drift region (16) comprises at least two stripes (15, 32) of the first conduction type which extend from the drain region (12) in a direction towards the source region (13). The channel region (14) is arranged between the drift region (16) and the source region (13).
    Type: Application
    Filed: November 7, 2008
    Publication date: December 9, 2010
    Applicant: austriamicrosystems AG
    Inventors: Jong Mun Park, Verena Vescoli, Rainer Minixhofer
  • Filtering Arrangement, Filtering Method and Current Sensing Arrangement
    Publication number: 20100308903
    Abstract: A filtering arrangement comprises a reference voltage input (1) and a compensation current arrangement (10) coupled to the reference voltage input (1) and configured to provide a control current at a current output (2) as a function of a voltage at the reference voltage input (1). The filtering arrangement also comprises a first and a second current source (20, 30) each having a control input (4, 5) coupled to the current output (2), a first and a second filter input (7, 8), and a first transistor (T1) and a second transistor (T2). The first transistor (T1) has a first connection (T11), a second connection (T12) and a control connection (T1c), where its first connection (T11) is coupled to the first current source (20) and its second connection (T12) is coupled to the first filter input (7) through a first resistor (R1).
    Type: Application
    Filed: November 14, 2008
    Publication date: December 9, 2010
    Applicant: austriamicrosystems AG
    Inventor: Pramod Singnurkar
  • Circuit Arrangement and Method for Shifting a Voltage Level
    Publication number: 20100295576
    Abstract: A circuit arrangement for shifting a voltage level comprises a data-current converter (2) that is connected to a first connection (K1) and that has an input for feeding a digital input data signal (DIN), a first output for providing a current (I), and also a second output for providing a reference current (I1), and a current-data converter (3) that is connected to a second connection (K2) and that has a first input for feeding the current (I), a second input for feeding the reference current (I1), and also an output for providing a digital output data signal (DOUT). Here, a voltage level of the digital output data signal (DOUT) is different from a voltage level of the digital input data signal (DIN). In addition, a method for shifting a voltage level is provided.
    Type: Application
    Filed: October 15, 2008
    Publication date: November 25, 2010
    Applicant: Austriamicrosystems AG
    Inventors: Vincenzo Leonardo, Mark Niederberger
  • Circuit Arrangement for Protection Against Electrostatic Charges and Method for Dissipation Thereof
    Publication number: 20100290165
    Abstract: A circuit arrangement for protection against electrostatic discharges comprises an shunt device, which is connected between a first and a second terminal of the circuit arrangement and has a control input, via which the conduction of the shunt device can be controlled. In addition there is a trigger element, which has a trigger output for issuing a trigger signal in dependence on a voltage between the first and the second terminal of the circuit arrangement. The circuit arrangement additionally comprises an interruption unit that can be controlled via a deactivation input by means of a sendable deactivation signal and which is connected on the input side to the trigger output and on the output side to the control input. In addition, a method for shunting electrostatic discharges is shown.
    Type: Application
    Filed: August 28, 2008
    Publication date: November 18, 2010
    Applicant: austriamicrosystems AG
    Inventor: Andreas Hartberger
  • Interface arrangement for a system on a chip suitable for outputting higher-frequency signals for operating peripheral devices, and use thereof
    Patent number: 7836240
    Abstract: An interface arrangement (24) is disclosed that provides an interface between a signal line (5) for connecting external peripheral devices and a microcontroller bus (3). Data input and output interfaces (1, 2; 4) are provided for connecting corresponding register units (6, 7) to the bus systems (3, 5) and are connected through a buffer memory (8). This is, moreover, coupled with a direct memory access (DMA) controller (9). A control signal generator is also provided for the flexible generation of control signals (10). The proposed arrangement thus permits a high data transfer rate when operating peripheral devices with a system-on-chip, without demanding computing time from the microcontroller.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: November 16, 2010
    Assignee: Austriamicrosystems AG
    Inventor: Werner Schoegler
  • Semiconductor Component with Terminal Contact Surface
    Publication number: 20100276811
    Abstract: At least one terminal contact surface (1) is formed on a topmost metal plane (2). Under it, in a secondmost metal plane (3), is a reinforcement region (8), in which the secondmost metal plane (3) is structured within its two-dimensional extent such that a part of the area of the vertical (with respect to the metal plane) projection of the terminal contact surface (1) onto the secondmost metal plane (3) that is occupied by the metal of the secondmost metal plane (3) amounts to at least one third of the area.
    Type: Application
    Filed: January 21, 2008
    Publication date: November 4, 2010
    Applicant: austriamicrosystems AG
    Inventors: Rainer Minixhofer, Verena Vescoli
  • Magnetic field sensor and method for the operation thereof
    Patent number: 7825657
    Abstract: A magnetic field sensor comprising a sensor arrangement (H), which is supplied by a supply device (IH) and generates a sensor signal. An evaluation device (ADC, R) to which the sensor signal is fed and which outputs a first output signal (AI). A feedback device (RV) to which the first output signal is fed and which controls the supply device. The regulation of the control loop closed with the feedback device improves the noise behavior of the magnetic field sensor. A method is disclosed for operating the magnetic field sensor.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: November 2, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Siegfried Rossmann, Colin Steele
  • Multiple mask and method for producing differently doped regions
    Patent number: 7820342
    Abstract: In order to produce doping regions (DG) in a substrate (S) having different dopings with the aid of a single mask (DM) different mask regions are provided which have elongated mask openings (MO) having different orientations relative to the spatial direction of an oblique implantation. The substrate is rotated between the first and second oblique implantations, wherein during the first oblique implantation maximum and minimum shadings in the different mask regions are opposite one another and the conditions are precisely reversed during the second oblique implantation after the rotation of the substrate.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: October 26, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Martin Knaipp, Rainer Minixhofer, Martin Schrems
  • Method for determining a tire position in a tire pressure measurement system
    Patent number: 7810389
    Abstract: In a method for transmitting data, the step of transmitting the data representing a measured pressure or pressure variation is repeated with a first repetition rate if no pressure variation has been detected or repeated with a second repetition rate if a specific pressure variation has been detected. The second repetition rate is higher than the first repetition rate. The different repetition frequencies can be used in a method for determining a tire position in a tire pressure measurement system to switch between a first mode of operation and a second mode of operation. The method for determining a tire position evaluates the repetition rate between the received data packets of transmitted data and extracts a pressure variation out of the received data packets.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: October 12, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Manfred Brandl, Bernd Gessner, Teijo Viljanen