Patents Assigned to Avago Technologies General IP Pte. Ltd.
  • Patent number: 7355160
    Abstract: A pointing device and method for using the same to measure the motion of that pointing device over a surface is disclosed. The pointing device includes an illumination system, an imaging system, and a controller. The illumination system generates light in a plurality of wavelength bands and illuminates a surface below the pointing device with light from one of the wavelength bands. The imaging system records images of the illuminated surface. The controller selects the wavelength band used to illuminate the surface, compares first and second images recorded by the imaging system at different times when the surface is illuminated with that wavelength band, and determines a displacement indicative of the direction and distance the positioning device moved between the two different times.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: April 8, 2008
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Chiang Sun Cheah, Gim Eng Chew, Li Chong Tai
  • Patent number: 7352130
    Abstract: First and second substrates are spaced apart and joined around a perimeter to define a gas chamber between the substrates. The first substrate is made of a material that transmits visible radiation. A layer of a phosphor material overlies an interior surface of one of the substrates and is capable of converting UV radiation to visible radiation. A layer of a reflective material overlies an interior surface of the other one of the substrates.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: April 1, 2008
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Rene P. Helbing, Charles D. Hoke
  • Patent number: 7351949
    Abstract: A switch panel having a touch plate, light converter, and light analyzer are disclosed. The touch plate includes an optically transparent layer having first and second surfaces, and having an index of refraction greater than that of air. The touch plate conducts light of an excitation wavelength between the first and second surfaces and emits part of that light through the second surface at one of a plurality of emission locations depending on the position at which pressure is applied to the first surface. The light converter is positioned to receive the light emitted through the second surface and generates light having a plurality of distinct location-specific spectra, one of the location-specific spectra corresponding to each of the emission locations. The light analyzer generates a signal indicative of which of the location-specific spectra was generated by the light converter.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: April 1, 2008
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Chin Hin Oon, Kean Loo Keh, Farn Hin Chen, Calvin B. Ward
  • Patent number: 7352165
    Abstract: A delay-locked loop (DLL) of an integrated circuit (IC) with testing circuitry and a method for testing a DLL. During test mode, a phase comparator of the DLL receives a test clock in place of the reference clock and determines the phase difference between the test clock and the clock fed back to the DLL from a clock buffer tree. A variable delay element of the DLL then shifts the reference clock in time by an amount that depends on that phase difference. The variable delay element can be exercised by varying the phase of the test clock with respect to the reference clock by a known phase offset to cause the variable delay element to produce a range of delays. Whether the variable delay element is functioning properly can be determined by checking whether the phase of the test clock is aligned with the phase of the feedback clock.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: April 1, 2008
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Alvin Leng Sun Loke, Michael Joseph Gilsdorf, Peter Jacob Meier, Jeffrey R. Rearick
  • Patent number: 7348910
    Abstract: A Root Mean Square (RMS) detector circuit includes a first differential pair circuit arranged to operate in a common mode. The detector circuit also includes a compensation circuit unit having a second differential pair circuit to duplicate an unwanted base current drawn by the first differential pair circuit. The compensation circuit unit is arranged to generate an offset voltage using the duplicated base current. The compensation circuit unit also has an operational amplifier coupled to an NMOS transistor so as to generate a corrective current corresponding to the offset voltage, the corrective current being mirrored by a current mirror and provided as a compensatory current to an input of the first differential pair circuit.
    Type: Grant
    Filed: July 6, 2006
    Date of Patent: March 25, 2008
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Fesseha Tessera Seifu, Marco Fornasari, Samir Aboulhouda
  • Publication number: 20080070334
    Abstract: A photonic crystal light emitting diode (“PXLED”) is provided. The PXLED includes a periodic structure, such as a lattice of holes, formed in the semiconductor layers of an LED. The parameters of the periodic structure are such that the energy of the photons, emitted by the PXLED, lies close to a band edge of the band structure of the periodic structure. Metal electrode layers have a strong influence on the efficiency of the PXLEDs. Also, PXLEDs formed from GaN have a low surface recombination velocity and hence a high efficiency. The PXLEDs are formed with novel fabrication techniques, such as the epitaxial lateral overgrowth technique over a patterned masking layer, yielding semiconductor layers with low defect density. Inverting the PXLED to expose the pattern of the masking layer or using the Talbot effect to create an aligned second patterned masking layer allows the formation of PXLEDs with low defect density.
    Type: Application
    Filed: October 8, 2007
    Publication date: March 20, 2008
    Applicants: PHILIPS LUMILEDS LIGHTING COMPANY, LLC, AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
    Inventors: Michael Krames, Mihail Sigalas, Jonathan Wierer
  • Patent number: 7345813
    Abstract: An optical element includes a light absorbing medium formed of a transparent material and light absorbing elements encapsulated within the transparent material. The light absorbing elements have an ultraviolet (UV) light-dependent absorption characteristic and UV light is applied to the light absorbing medium to change the attenuation of the light absorbing medium to a desired attenuation. UV light is applied to the light absorbing medium in a controlled manner to change the attenuation of the light absorbing medium from an initial attenuation to the desired attenuation. The application of UV light to the light absorbing medium can cause the light absorbing elements encapsulated within the light absorbing medium to degrade such that the amount of light absorbed by the light absorbing medium is reduced. Reducing the amount of light that is absorbed effectively reduces the attenuation of the light absorbing medium.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: March 18, 2008
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Tom Sheau Tung Wong, Juay Sim Koh, Frank Flens, Arjan Van Haasteren
  • Patent number: 7342310
    Abstract: A multi-chip package includes a package substrate. First and second semiconductor die are formed on the package substrate. The first and the second semiconductor die are configured to communicate with each other via a high-speed serial communications protocol.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: March 11, 2008
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Michael G. Kelly, Paul A. Chenard, Revathi Uma Polisetti, Patrick A. Mckinley
  • Patent number: 7321840
    Abstract: A tire monitor and a tire pressure gauge for reading the data from the tire monitor are disclosed. The tire monitor includes an in-tire controller that stores a target inflation pressure representing the pressure to which the tire should be inflated when the tire is at a standard temperature. The tire monitor transmits the target inflation pressure to the external processor when the external processor is connected to the in-tire monitor over a communication link. A sensor array in the tire monitor can provide pressure and temperature readings that are stored in the monitor and used to provide a temperature-compensated fill pressure for the tire. The tire pressure gauge provides the user with a fill pressure to be used in inflating the tire. The tire pressure gauge communicates with the tire monitor and obtains pressure and temperature readings stored in the tire monitor. These reading are used to provide the temperature-compensated fill pressure.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: January 22, 2008
    Assignee: Avago Technologies General IP Pte. Ltd.
    Inventor: Daniel Yves Abramovitch
  • Patent number: 7312664
    Abstract: Methods and apparatuses for testing a calibrated VCO to determine whether the VCO has adequate fine frequency tuning capability. A range of coarse frequency tuning calibration settings are determined from coarse frequency tuning calibration settings obtained during a coarse frequency tuning calibration process. A determination is then made as to whether a fine frequency tuning capability of the VCO is adequate based on the determined range of coarse frequency tuning calibration settings.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: December 25, 2007
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Alvin Leng Sun Loke, Michael Joseph Gilsdorf
  • Patent number: 7313372
    Abstract: A second single-ended receiver having a first stage for receiving an input signal and outputting a pair of corresponding output signals, and a second stage for receiving the pair of output signals and outputting a corresponding single output signal. First and second pull-down transistors are coupled to first and second inputs to the first stage. A bias circuit electrically biases the first stage, second stage, and first and second pull-down transistors, and a power supply provides power to those components.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: December 25, 2007
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Manuel Salcido, Gilbert Yoh, Guy Humphrey, Salvador Salcido
  • Patent number: 7310401
    Abstract: A frequency detector for use with a PLL utilizes a counter and a preset value to produce frequency information related to a VCO signal. The frequency information is used to control the frequency of the VCO signal and to determine whether the VCO signal should be controlled by the frequency detector or a phase detector. Using the counter and preset value involves establishing a preset value that is used to obtain the desired frequency information. The preset value is set such that the counter is at one-half full-scale at the end of a known time period when the VCO signal is oscillating at a target frequency. When the preset value is set to such a value, the most significant bit of the counter after the known time period indicates whether the frequency of the VCO signal is above or below the target frequency.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: December 18, 2007
    Assignee: Avago Technologies General IP PTE Ltd
    Inventor: Thomas A. Knotts
  • Patent number: 7304674
    Abstract: A method of sampling image signals generated by pixel circuits of an active pixel sensor (APS) image sensor. The APS image sensor supports a normal mode of operation and a sub-sampling mode of operation. The method includes providing a plurality of column amplifiers. A row of pixels circuits to sample is selected. Image signals from each pixel circuit in the selected row are routed to a different one of the plurality of column amplifiers when the APS image sensor is in the normal mode of operation. Image signals from a plurality of the pixel circuits in the selected row are routed to one of the plurality of column amplifiers when the APS image sensor is in the sub-sampling mode of operation.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: December 4, 2007
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Ray A. Mentzer, Matthew M. Borg
  • Patent number: 7294862
    Abstract: A photonic crystal structure is formed in an n-type layer of a III-nitride light emitting device. In some embodiments, the photonic crystal n-type layer is formed on a tunnel junction. The device includes a first layer of first conductivity type, a first layer of second conductivity type, and an active region separating the first layer of first conductivity type from the first layer of second conductivity type. The tunnel junction includes a second layer of first conductivity type and a second layer of second conductivity type and separates the first layer of first conductivity type from a third layer of first conductivity type. A photonic crystal structure is formed in the third layer of first conductivity type.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: November 13, 2007
    Assignees: Philips Lumileds Lighting Company, LLC, Avago Technologies General IP Pte. Ltd.
    Inventors: Jonathan J. Wierer, Jr., Michael R. Krames, Mihail M. Sigalas
  • Patent number: 7288476
    Abstract: The controlled etch into a substrate or thick homogeneous film is accomplished by introducing a sacrificial film to gauge the depth to which the substrate/thick film has been etched. Optical endpointing the etch of the sacrificial film on the etch stop layer allows another element of process control over the depth of the primary trench or via.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: October 30, 2007
    Assignee: Avago Technologies General IP Pte. Ltd.
    Inventor: Ronnie P. Varghese
  • Patent number: 7290277
    Abstract: A system for supporting management operations associated with an interconnect device includes a port of the interconnect device to maintain authentication data that facilitates authorization of a management operation and a configuration switch coupled to the port to generate a reset signal in response to an operator's command. The port is operable to reset the authentication data upon receiving the reset signal from the configuration switch.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: October 30, 2007
    Assignee: Avago Technologies General IP PTE Ltd
    Inventors: Norman C. Chou, Olivier Cremel
  • Patent number: 7282795
    Abstract: A method of modifying a semiconductor device to provide electrical parameter monitoring. The device includes a semiconductor die and a package substrate. The substrate includes a conductive plane. The die is connected to the plane via a plurality of connection structures. The method includes disconnecting a first one of the connection structures from the plane, and connecting the first connection structure to an external package connection, thereby providing a capability to monitor an electrical parameter of the die via the external package connection.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: October 16, 2007
    Assignee: Avago Technologies General IP Pte Ltd
    Inventor: Robert M. Batey
  • Patent number: 7280201
    Abstract: A sensor, such as a lateral flow sensor, which includes a chemical layer and a detector on a flexible substrate. An optical signal is produced in response to an analyte placed on the chemical layer. The detector detects the signal, to thereby detect the presence, absence or concentration of the analyte. The detector is on the substrate. The chemical layer and the substrate are laminated together, to thereby form an integrated sensor. The sensor can include a light source. The light source can be on the substrate, or on an opposite side of the chemical layer than the detector.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: October 9, 2007
    Assignee: Avago Technologies General IP Pte Ltd
    Inventor: Rene Helbing
  • Patent number: 7280092
    Abstract: A driver circuit and method for driving an electrical device, such as an LC device, utilizes a feedback capacitor and a reference current on an output transistor to control the slew rate of the generated output signal. In an embodiment, a stored signal from a previous operating cycle is used to activate the output transistor, which ensures that the initial slew rate for each rising or falling edge transition of the output signal is at an appropriate level. The controlled slew rate of the output signal does not depend on the load or other external factors. Thus, the driver circuit provides an output signal that can be used to drive the electrical device with high accuracy and long-term stability.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: October 9, 2007
    Assignee: Avago Technologies General IP Pte Ltd
    Inventor: Oliver Dieter Landolt
  • Patent number: 7280002
    Abstract: A method and apparatus is presented for generating a reference voltage that biases a metal-oxide-semiconductor (MOS) transistor used as a varactor in capacitive tuning applications. In one embodiment, a biasing circuit is implemented. The biasing circuit comprises a diode-clamped FET and an element coupled to the diode-clamped FET at a connection point. The element produces a constant current through the diode-clamped FET. A voltage is produced at the connection point. The voltage is one gate overdrive plus a threshold voltage above ground or one gate overdrive plus a threshold voltage below VDD. Establishing a threshold voltage in this way enables the biasing circuit to track an ideal voltage of a varactor that is coupled to the biasing circuit through the threshold voltage.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: October 9, 2007
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Alvin Leng Sun Loke, Tin Tin Wee, Robert Keith Barnes, Kari Lee Arave, Thomas Edward Cynkar, James Ruhl Pfiester