Patents Assigned to Avago Technologies General IP (Singapore) Pte. Ltd.
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Publication number: 20200044094Abstract: A method of fabricating a semiconductor structure includes forming a plurality of Fin structures, doping first dopants at both sides of a first Fin structure of the Fin structures, and providing a first thermal diffusion operation to the semiconductor structure. The method also includes doping second dopants at both sides of a second Fin structure of the Fin structures, and providing a second thermal diffusion operation to the semiconductor structure. A first gate length for the first Fin structure is formed using the first and the second thermal diffusion operations, and a second gate length for the second Fin structure using the second thermal diffusion operation. The first dopants are of the same type or a different type.Type: ApplicationFiled: August 1, 2018Publication date: February 6, 2020Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventor: Qing Liu
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Publication number: 20200036463Abstract: In some aspects, the disclosure is directed to methods and systems for improving signal to noise ratios of signals from multiple communication links. In some embodiments, a system includes a first frequency transformation circuit configured to transform a first signal in a time domain received from a first device into a corresponding second signal in a frequency domain. The system further includes a second frequency transformation circuit configured to transform a third signal in the time domain received from a second device into a corresponding fourth signal in the frequency domain. The system further includes a leg combining circuit configured to select, for a group of subcarriers, one of the first frequency transformation circuit and the second frequency transformation circuit, and cause, for the group of subcarriers, the selected frequency transformation circuit to output one of the second signal and the fourth signal, according to the selection.Type: ApplicationFiled: July 30, 2018Publication date: January 30, 2020Applicant: Avago Technologies General IP (Singapore) Pte. Ltd .Inventors: Avi Kliger, Anatoli Shindler, Giuseppe Cusmai, Eliran Hania, Steven Jaffe
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Publication number: 20200014974Abstract: In some aspects, the disclosure is directed to methods and systems for controlling a set top box remotely and monitoring its display output. Remote control commands may be intercepted or captured and forwarded over a network as encapsulated serial data or HDMI-CEC, in some implementations. This data may be transmitted over a network to a processing device, sometimes referred to as an HDMI pass-through and streamer device. The HDMI pass-through device may receive the encapsulated serial data via the network and retransmit the data as CEC data over HDMI to the set top box as if it were any other HDMI capable device, such as a television. Thus, the recipient set top box may receive the remote control commands via CEC and treat them as incoming IR commands and act accordingly.Type: ApplicationFiled: July 2, 2019Publication date: January 9, 2020Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Manan Patel, Rajesh MAMIDWAR, Prashant Katre, David ERICKSON
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Publication number: 20190372402Abstract: A system, an apparatus, and a method for wireless power transfer are provided. The system includes a plurality of wireless power transmitters and at least one receiver. The at least one receiver is configured to receive the power wirelessly transmitted at least one wireless power transmitter of the plurality of wireless power transmitters. The plurality of wireless transmitters is configured to wirelessly transmit power. Each wireless power transmitter is positioned at a different location and/or orientation. Each wireless power transmitter is an active power source or a passive relay power source. The one or more wireless power transmitters are identified for power transmission based on a plurality of factors including at least presence of obstacles in transmission paths.Type: ApplicationFiled: June 5, 2018Publication date: December 5, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Murat Mese, John Walley
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Patent number: 10498486Abstract: An apparatus includes a demapper to compute a reliability metric associated with a number of bit streams received by multiple radio-frequency (RF) antennas. The apparatus further includes a channel decoder in a feedback loop with the demapper to process the reliability metric and to provide a feedback signal to the demapper. The demapper is an iterative demapper and can use a symbol subset of at least a first stream of the plurality of bit streams and the feedback signal to compute the reliability metric for a second stream of the plurality of bit streams.Type: GrantFiled: August 23, 2018Date of Patent: December 3, 2019Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Daniel Stopler, Rethnakaran Pulikkoonattu, Roy Oren, Ilan Reuven, Amir Eliaz
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Patent number: 10462465Abstract: A system and method for processing graphics are provided. Pixel data may be received for a pixel block. Endpoints for the values of the pixels in the pixel block may be determined. A weight for the pixels in the pixel block may be determined in four dimensions corresponding to the endpoints. A compressed data block representative of the pixel block may be generated in response to the endpoints for the pixel block and the weight for the pixels of the pixel block in the four dimensions corresponding to the endpoints.Type: GrantFiled: January 2, 2015Date of Patent: October 29, 2019Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.Inventors: Brian Francis Schoner, Anand Pande, Praveen Vadakkumthodam Radhakrishnan
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Publication number: 20190327019Abstract: In some aspects, the disclosure is directed to methods and systems for extending a range of wireless communication. In one aspect, a first station device from one or more stations receives a trigger frame comprising a predetermined bit from an access point. The first station device may transmit to the access point a first response message in a first format during a first time period, in response to detecting the predetermined bit in the trigger frame. The first station device may transmit to the access point, a second response message in a second format during a second time period, in response to detecting the predetermined bit in the trigger frame. The first station device may receive, from the access point, a downlink frame during a third time period after the first time period and the second time period.Type: ApplicationFiled: April 23, 2018Publication date: October 24, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Chunyu HU, Matthew J. FISCHER, Zhou LAN
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Publication number: 20190327092Abstract: In some aspects, the disclosure is directed to methods and systems for using biometric authentication on local or remote devices, without requiring a secure communication channel between the devices. An enrollment operation may be performed on a first device. The enrollment data and user credentials may be encrypted using a cryptography key generated using the biometric information. The encrypted enrollment data may be transferred to the remote device via any available communication channel regardless of its security. On the remote device, the cryptographic key may be regenerated using newly captured biometric data, and the enrollment data and user credentials decrypted. This allows the user to completely eliminate the use of passwords and re-enrollment of biometric authentication on the remote device.Type: ApplicationFiled: April 23, 2018Publication date: October 24, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventor: Sreenadh KARETI
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Publication number: 20190289038Abstract: In some aspects, the disclosure is directed to methods and systems for providing coordinative security among network devices across multi-level networks. Shared cryptographic secrets among the network devices are used as the basis for mutual security authentication and peering among these devices. The cryptographic secrets can be embedded in the SoC devices for these devices or dynamically generated based on unique identification information and attributes of these SoC devices. The messages for authentication and peering can be communicated directly among the network devices or indirectly via a cloud security portal entity that acts as a messaging proxy. The mutual authentication and peering process can be carried out coordinately among the network devices and a cloud security portal in a one-to-one mesh relationship, or in a transitive layering relationship, where each network entity authenticates and peers with its direct subordinates in a multi-level network.Type: ApplicationFiled: July 30, 2018Publication date: September 19, 2019Applicant: Avago Technologies General IP (Singapore) Pte. .Ltd.Inventors: Yong LI, Xuemin CHEN, Weimin ZHANG, Victor LIANG, Binfan LIU
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Publication number: 20190278886Abstract: A system and method are disclosed for provisioning IP features in a system-on-chip. A plurality of identical chips are fabricated, each of which is capable of have a number of features enabled or disabled. As a default, all features are disabled. A production process is later carried out, in which the chip is installed in a greater device. During this process, the manufacturer requests a license the IP owner for enablement of various features. Using secure communications, a license is granted identifying the features to be enabled, and a volume of units permitted to be manufactured. The license information is encrypted using a key already known to the chip, and sent to the manufacturer. The chip receives the license information during provisioning, extracts relevant provisioning information using the key, and a secure processing system provisions the relevant features. Log information is generated to allow the IP owner to verify license compliance.Type: ApplicationFiled: March 7, 2018Publication date: September 12, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Yong LI, Sherman (Xuemin) Chen, Abbas Saadat, Fabian Russo, Dexter Bayani, Brett Tischler, Bryant Tan
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Publication number: 20190132743Abstract: In some aspects, the disclosure is directed to methods and systems for utilizing protocols to enable two 802.11 devices to exchange their dynamically-changing local channel availability table and form a mutual channel availability table with time, frequency, and transmission rate domains available. This table may be used to make optimum opportunistic use of link resources by adapting packet duration, frequency utilization and transmission rate to channel conditions.Type: ApplicationFiled: April 12, 2018Publication date: May 2, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Sundararm Vanka, Matthew J. Fischer, Rohit Gaikwad, Vinko Erceg, Ron Porat
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Publication number: 20190130035Abstract: In some aspects, the disclosure is directed to methods and systems for synchronization management of high dynamic range (HDR) media metadata. A synchronization controller of a media device may receive a first set of HDR media metadata provided in connection with one or more images of media. The synchronization controller may disable a metadata synchronization indicator provided to each core of a plurality of processing cores of the media device, responsive to receiving the first set of HDR media metadata. The synchronization controller may write the first set of HDR media metadata to a first memory location while the metadata synchronization indicator is disabled. The synchronization controller may enable the metadata synchronization indicator, responsive to completion of writing of the first set of HDR media metadata to the first memory location.Type: ApplicationFiled: October 30, 2017Publication date: May 2, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Jason Herrick, Richard Wyman, Hongtao Zhu
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Patent number: 10277210Abstract: A time-interleaved clock circuit, including circuitry to provide multiple clock components of a sampling clock. The clock components are corrected by averaging pairs of the multiple clock components in order to output averaged signals. The time-interleaved clock is applied to data conversion in which input signals of the analog signal domain or of the digital signal domain are sampled based on the corrected clock components and converted to the digital signal domain or the analog signal domain, respectively.Type: GrantFiled: October 26, 2017Date of Patent: April 30, 2019Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.Inventors: Hyo Gyuem Rhew, Adesh Garg, Meisam Honarvar Nazari, Jiawen Zhang, Ali Nazemi, Jun Cao
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Publication number: 20190123007Abstract: An integrated circuit die includes a metal layer, a first passivation layer disposed above the metal layer, an aluminum containing redistribution layer disposed above the first passivation layer, an under bump metallization layer, and a redistribution layer plug. The redistribution layer plug is coupled to the metal layer and disposed in a via in the first passivation layer. The under bump metallization layer is coupled to the aluminum containing redistribution layer above the first passivation layer at a distance from the redistribution layer plug.Type: ApplicationFiled: October 25, 2017Publication date: April 25, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd .Inventors: Sam Ziqun Zhao, Liming Tsau, Edward Law, Andy Brotman
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Patent number: 10264439Abstract: A method, apparatus and computer program for discovery of network devices and application user. An example method for use in an access point or station may comprise receiving a discovery request from an application, the application running thereon, the discovery request including at least one application level identifier, causing monitoring of a discovery channel for at least one device within a proximate distance, and upon discovery of a device associated with the application level ID, providing an indication to the application of the discovery of the device.Type: GrantFiled: June 13, 2016Date of Patent: April 16, 2019Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.Inventors: Sami-Jukka Hakola, Guillaume Sebire, Samuli Turtinen, Vlora Rexhepi
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Publication number: 20190089520Abstract: In some aspects, the disclosure is directed to methods and systems for controlling periodic jitter arising from a phase interpolator (PI). A receiver can receive incoming data. A fractional-N phase-locked loop (PLL) can receive a reference clock. Measurement circuitry can measure a parts per million (PPM) offset between the incoming data and the reference clock, of a PI. The fractional-N PLL can restrict jitter arising from the PI, to frequencies within a predefined bandwidth, by tuning a center frequency of the fractional-N PLL to reduce the PPM offset of the PI.Type: ApplicationFiled: September 18, 2017Publication date: March 21, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Amiad Dvir, Mike Rolfe Ferrara, Vitaly Zborovski, Mario Caresosa, Ryan Hirth, Assaf Naor
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Publication number: 20190079930Abstract: Systems and methods are provided to render a plurality of graphical assets each having a format of a plurality of formats. Each graphical asset is processed by determining whether the format of the graphical asset is compatible with a predetermined render domain format and responsive to determining the format is not compatible with the predetermined render domain format, converting, using a format conversion circuit, the format to the predetermined render domain format. The plurality of graphical assets are rendered using a single rendering engine operable coupled to the format conversion circuit using the predetermined render domain format.Type: ApplicationFiled: October 25, 2017Publication date: March 14, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd .Inventors: Richard Wyman, David Wu, Jason Herrick
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Publication number: 20190080674Abstract: Systems and methods are provided for combining a plurality of streams with a plurality of formats into a single output stream in a predetermined output format. Each of the plurality of streams includes at least one of video or graphics. Each stream is processed by determining a format of the stream, determining whether the format is compatible with the predetermined output format, and responsive to determining that the format is compatible with the predetermined output format, converting the format to the predetermined output format. The processed plurality of streams are combined into a single output stream in the predetermined output format.Type: ApplicationFiled: October 25, 2017Publication date: March 14, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Richard Wyman, David Wu, Jason Herrick
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Publication number: 20190069317Abstract: The present disclosure is directed to methods and apparatuses for increasing throughput of WLANs using queue size based intelligent reverse direction grants (RDGs). RDGs have been introduced in many WLANs to reduce the amount of overhead associated with variants of the CSMA/CD MAC protocol. Reducing overhead increases the WLANs achievable data throughput. However, RDGs are not intelligently used in WLANs, limiting their effectiveness.Type: ApplicationFiled: August 30, 2017Publication date: February 28, 2019Applicant: Avago Technologies General IP (Singapore) Pte.Ltd.Inventors: Prashant KOTA, Manish AIRY, Sandeep PS
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Publication number: 20190069234Abstract: In some aspects, the disclosure is directed to methods and systems for NAN tethering a second wireless to a first wireless device. The first wireless device includes a primary processor and a secondary processor. The primary processor negotiates one or more first wake up slots for a NAN service with the second wireless device, establishes the NAN service with the second wireless device, and offloads the NAN service to the secondary processor, responsive to establishing the NAN service and prior to the primary processor entering into a sleep mode. The secondary processor renegotiates one or more second wake up slots with the second wireless device for the offloaded NAN service. The secondary processor is configured to wirelessly tether, the second wireless device to the first wireless device, using the one or more second wake up slots of the offloaded NAN service.Type: ApplicationFiled: August 22, 2017Publication date: February 28, 2019Applicant: Avago Technologies General IP (Singapore) Pte. Ltd .Inventors: Sriram Neelakandan, Raghavendra Malladi, Samson Kativarapu, Jagadeesh Cherukuri, Swaraj Vutturi