Patents Assigned to Avago Technologies International Sales Pte. Limited
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Patent number: 11405044Abstract: The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.Type: GrantFiled: January 28, 2021Date of Patent: August 2, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventors: Jingguang Wang, Jing Wang, Robert Roze, Kambiz Vakilian
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Publication number: 20220240166Abstract: Systems and methods of scanning for wireless networks can use a wireless integrated package including a first radio and a second radio. The method includes providing a first probe request in a first time slot on a first channel using the first radio, and receiving a first probe response in a second time slot on the first channel using the second radio. The second time slot is at least partially contemporaneous with the first time slot. Fast parallel active scanning can be achieved.Type: ApplicationFiled: March 24, 2021Publication date: July 28, 2022Applicant: Avago Technologies International Sales Pte. LimitedInventors: Rakesh Balaji, Sandeep PS, Sandhya Patil, Sridharan Parthasarathy
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Publication number: 20220239303Abstract: The systems and methods discussed herein related to digital to analog conversion. A digital to analog conversion circuit can includes a digital input, an analog output, and a cell array. The digital to analog converter can also include an integrator, an analog to digital converter (ADC), and a summer coupled to the ADC, and an adaptation circuit coupled to the summer. The adaption circuit provides controls signals to the cell array.Type: ApplicationFiled: January 28, 2021Publication date: July 28, 2022Applicant: Avago Technologies International Sales Pte. LimitedInventors: Koon Lun Jackie Wong, Chi-Hung Lin
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Patent number: 11398844Abstract: Disclosed herein are related to systems and methods for selectively disabling current steering circuitries. In one aspect, the system includes a balun including a first inductor and a second inductor, a first current steering circuit coupled to the first inductor, a second current steering circuit coupled to the first inductor, and a controller coupled to the first current steering circuit and the second current steering circuit. In one aspect, the controller is configured to, based on input data having a first state, apply a first signal and a second signal having a first level to the first current steering circuit and a third signal and a fourth signal having the first level to the second current steering circuit to disable a first current through the second inductor, a second current through the first current steering circuit, and a third current through the second current steering circuit.Type: GrantFiled: March 19, 2021Date of Patent: July 26, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventors: Bevin George Perumana, Mohyee Mikhemar, Tirdad Sowlati, Alvin Lin, Sudharshan Srinivasan, Wei-Hong Chen
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Patent number: 11394432Abstract: A front end radio frequency (RF) module including one or more first filter circuits configured to implement a front end function by filtering first signals communicated between one or more first antenna and a transceiver and one or more second filter circuits configured to implement at least a portion of an additional network function within the front end RF module by filtering second signals communicated between one or more second antennas and the transceiver.Type: GrantFiled: June 26, 2020Date of Patent: July 19, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventors: Richard Ruby, William Carrol Mueller, Young Kwon, Joo Min Jung, Chan Hoe Koo
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Patent number: 11394401Abstract: An interleaved encoder includes a number of encoders consisting of L parallel encoders, and a first switch circuit to sequentially couple an input node to an input port of one of the encoders. The input node receives a group of K*L symbols. Each symbol of the group of K*L symbols is received in synch with a respective clock pulse of a group of K*L clock pulses. The first switch circuit is synched with clock pulses of the group of K*L clock pulses, and sequentially couples the input node to an input port of a subsequent one of the encoders in response to each clock pulse of the group of K*L clock pulses.Type: GrantFiled: February 3, 2021Date of Patent: July 19, 2022Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Chungming Tu, Thomas V. Souvignier, Ahmad Darabiha
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Patent number: 11386021Abstract: A data packer forma bit stream for forwarding values to memory. The bit stream includes the values and respective prefixes for identifying the values and the data packer is configured to insert the prefixes at predetermined boundaries in the bit stream, such that a prefix for identifying one value is inserted between bits that define a value identified by a preceding prefix. A data unpacker unpacks a bit stream that comprises values and respective prefixes for identifying those values that are located at predetermined boundaries in the bit stream, such that a prefix for identifying one value is inserted between bits that define a value identified by a preceding prefix. The data unpacker identifies a prefix at a predetermined boundary in the bit stream and determine, in dependence on that prefix and the predetermined boundaries, a location of the next prefix in the bit stream.Type: GrantFiled: June 21, 2018Date of Patent: July 12, 2022Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: James Andrew Hutchinson, Thomas Oscar Miller, Stephen John Barlow, Jack Stuart Haughton
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Patent number: 11368396Abstract: Virtual machine environments are provided in the switches that form a network, with the virtual machines executing network services previously performed by dedicated appliances. The virtual machines can be executed on a single multi-core processor in combination with normal switch functions or on dedicated services processor boards. Packet processors analyze incoming packets and add a services tag containing services entries to any packets. Each switch reviews the services tag and performs any network services resident on that switch. This allows services to be deployed at the optimal locations in the network. The network services may be deployed by use of drag and drop operations. A topology view is presented, along with network services that may be deployed. Services may be selected and dragged to a single switch or multiple switches. The management tool deploys the network services software, with virtual machines being instantiated on the switches as needed.Type: GrantFiled: May 19, 2020Date of Patent: June 21, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventors: James Kwon, Joseph Ammirato
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Patent number: 11368412Abstract: The disclosed systems and methods provide methods and systems for providing power throttling adapted for high performance network switches. A method includes determining, for each of a plurality of measurement periods within a thermal average period, an energy usage estimate for a packet processing block configured to process ingress packets at a power gated clock rate. The method includes determining, for each of the plurality of measurement periods, a target clock rate for the packet processing block based on the determined energy usage estimates to meet a target energy value that is averaged for the thermal average period. The method includes adjusting, for each of the plurality of measurement periods, the power gated clock rate towards the target clock rate, wherein the adjusting causes the packet processing block to process the ingress packets at the adjusted power gated clock rate.Type: GrantFiled: July 31, 2020Date of Patent: June 21, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventors: Surendra Anubolu, Sachin Prabhakarrao Kadu, Laxminarasimha Rao Kesiraju, Mohan V. Kalkunte
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Patent number: 11363549Abstract: Disclosed herein are related to systems and methods for a multiple-input multiple-output (MIMO) communication. In one aspect, during a first time period, a master access point transmits, to a slave access point, information for a joint transmission by the master access point and the slave access point. In one aspect, the slave access point estimates synchronization information for the joint transmission, according to the information for the joint transmission. In one aspect, during a second time period after the first time period, the master access point transmits a portion of a null data packet to a station device. In one aspect, during the second time period, the slave access point transmits the portion of the null data packet to the station device, based on the synchronization information for the joint transmission. In one aspect, the station device determines steering information for the MIMO communication, according to the null data packet.Type: GrantFiled: August 26, 2019Date of Patent: June 14, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventors: Ron Porat, Srinath Puducheri Sundaravaradhan, Karim Nassiri Toussi, Jun Zheng
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Patent number: 11363375Abstract: Provided are communication devices having adaptable features and methods for implementation. One device includes at least one adaptable component and a processor configured to detect an external cue relevant to operation of the at least one adaptable component, to determine a desired state for the at least one adaptable component corresponding to the external cue, and then to dynamically adapt the at least one adaptable component to substantially produce the desired state. One adaptable component comprises at least one adaptable speaker system. Another adaptable component comprises at least one adaptable antenna.Type: GrantFiled: June 12, 2018Date of Patent: June 14, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventor: John Walley
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Patent number: 11355632Abstract: A semiconductor structure includes a substrate having a top surface, pillar structures formed on top of the substrate, a gate conductor, a drain/source region and a source/drain region. Each pillar structure of the pillar structures includes a first end and a second end, and the first end is closer to the substrate than the second end. The gate conductor surrounds each of the pillar structures disposed between the first end and the second end. The drain/source region is at the top surface of the substrate and in contact with the first end of a first pillar structure of the pillar structures, and the source/drain region is at the top surface of the substrate and in contact with the first end of a second pillar structure of the pillar structures.Type: GrantFiled: July 29, 2019Date of Patent: June 7, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventor: Qing Liu
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Patent number: 11350140Abstract: Systems, methods and apparatuses for handling trick mode operation using multiple video streams are provided. A media server presents a first video stream having a first level of a video characteristic for display. The media server, in response to receiving a first command, presents a second video stream having a second level of the video characteristic for display while stopping presenting the first video stream for display based on a determination determined using the first level of the video characteristic and the second level of the video characteristic. The first video stream and the second video stream are directed to the same video content.Type: GrantFiled: February 1, 2019Date of Patent: May 31, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventors: Jason W. Herrick, Daniel William English, Wade K. Wan
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Publication number: 20220149851Abstract: The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.Type: ApplicationFiled: January 28, 2021Publication date: May 12, 2022Applicant: Avago Technologies International Sales Pte. LimitedInventors: Jingguang Wang, Jing Wang, Robert Roze, Kambiz Vakilian
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Patent number: 11323358Abstract: A semiconductor chip for implementing load-aware equal-cost multipath routing includes a number of pipes, each pipe being coupled to a portion of ports on the semiconductor chip, and a central unit consisting of a state machine and multiple databases. The databases contain information regarding a communication network including an overlay network and an underlay network, and the state machine is implemented in hardware and can optimize at least one feature of the overlay network and a corresponding group of paths within the underlay network.Type: GrantFiled: April 14, 2021Date of Patent: May 3, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventor: Sachin Prabhakarrao Kadu
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Publication number: 20220123910Abstract: A wireless communication device (alternatively, device, WDEV, etc.) includes at least one processing circuitry configured to support communications with other WDEV(s) and to generate and process signals for such communications. In one example, the circuitry is configured to generate a null data packet (NDP), transmit at least a portion of the NDP to another wireless communication device via fewer than all of a plurality of sub-channels of a communication channel, and receive feedback from the another wireless communication device that is based on the another wireless communication processing the at least the portion of the NDP that is received via the fewer than all of the plurality of sub-channels of the communication channel. In one example, the generated NDP includes at least one signal field (SIG) field therein that includes information to specify a preamble puncturing option or the information is transmitted in a previous packet.Type: ApplicationFiled: January 3, 2022Publication date: April 21, 2022Applicant: Avago Technologies International Sales Pte. LimitedInventors: Ron Porat, Jun Zheng
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Patent number: 11310735Abstract: System, method and computer-readable storage medium including, a first communications device including a host processor to wake up upon receipt of a message and stream audio directly to another device via wireless communication, a second communications device including circuitry to control the streaming of the audio by sending messages to the first communications device and to control a display. The host processor of the first communications device enters a sleep stale during audio streaming while a state of the display is off. Reduction in the number of messages sent by the second communications device, or offloading, of message handling by the host processor, allows the host processor to remain in a steep state for longer periods.Type: GrantFiled: November 5, 2019Date of Patent: April 19, 2022Assignee: Avago Technologies international Sales Pte. LimitedInventors: Raghavendra Ramappa, Ravi Nagarajan, Avish Vijaykumar Shah
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Patent number: 11308649Abstract: A device implementing the subject pixel storage for graphical frame buffers may include at least one processor configured to obtain a plurality of data units containing a plurality of pixels stored in memory, each of the plurality of data units including a first pixel of the plurality of pixels packed in succession with at least a portion of a second pixel of the plurality of pixels, in which the plurality of pixels is represented by a number of bits, obtain a group of pixels from the plurality of pixels, and store the group of pixels using a targeted number of bits. A method and computer program product implementing the subject pixel storage for graphical frame buffers is also provided.Type: GrantFiled: January 13, 2021Date of Patent: April 19, 2022Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Richard Hayden Wyman, Brian Francis Schoner, David Chao Hua Wu, Timothy James Mamtora
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Patent number: 11297609Abstract: Embodiments of systems and methods for wireless communication in a wireless network include generation of a bandwidth query report poll (BQRP) frame by an access point and transmission of the BQRP frame to multiple wireless stations. The BQRP frame includes a bandwidth query for each station. Each wireless station receives the BQRP frame and generates a bandwidth query report. The bandwidth query report includes channel availability information at a corresponding wireless station. The access point allocates channel resources to each wireless station according to the channel availability information.Type: GrantFiled: October 30, 2019Date of Patent: April 5, 2022Assignee: Avago Technologies International Sales Pte. LimitedInventors: Zhou Lan, Matthew J. Fischer
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Publication number: 20220095370Abstract: In some aspects, the disclosure is directed to methods and systems for early termination of multi-user enhanced distributed channel access parameter application for one or more stations or devices. In various implementations, referred to as un-solicited or solicited termination, the multi-user enhanced distributed channel access timeout period may be terminated early by an access point device, or by a non-access point station or device, respectively.Type: ApplicationFiled: December 2, 2021Publication date: March 24, 2022Applicant: Avago Technologies International Sales Pte. LimitedInventors: Zhou Lan, Chunyu Hu