Patents Assigned to Avago Technologies International Sales Pte. Limited
  • Patent number: 11758240
    Abstract: A system for integrating video content and data provision includes an upstream signal path to process upstream data traffic received from a first transmission network for transmission to a second transmission network, and a downstream signal path to process downstream data traffic and downstream video traffic for transmission from the second transmission network to the first transmission network. The upstream signal path includes an analog-to-digital converter (ADC) and an upstream demodulator, and the downstream signal path includes an Ethernet processor, a digital-signal-processor (DSP) and a digital-to-analog converter (DAC).
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: September 12, 2023
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Weimin Zhang, Yong Li, Xuemin Chen, Charlie Lei Lou
  • Patent number: 11758027
    Abstract: In some aspects, the disclosure is directed to methods and systems for a flexible type-length-value (TLV) parser and identification map that may be used to quickly identify TLV sequences of packet headers for subsequent processing in a pipeline. A flexible TLV bus may provide a secondary path for the TLV header and identification map, allowing for subsequent processing stages to read, process, modify, delete, or otherwise utilize individual TLV sequences within the header.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: September 12, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Amit Narayan Gupta, Bhaswar Mitra, Chi Ho Fredrek Choi, Arun Prasath Chandrasekaran
  • Patent number: 11758473
    Abstract: Systems and methods of scanning for wireless networks can use a wireless integrated package including a first radio and a second radio. The method includes providing a first probe request in a first time slot on a first channel using the first radio, and receiving a first probe response in a second time slot on the first channel using the second radio. The second time slot is at least partially contemporaneous with the first time slot. Fast parallel active scanning can be achieved.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: September 12, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Rakesh Balaji, Sandeep PS, Sandhya Patil, Sridharan Parthasarathy
  • Patent number: 11757803
    Abstract: Certain embodiments enable application message delivery to be automatically guaranteed for all failover scenarios through use of a novel infrastructure layer that supports high availability (HA) messaging. The High Availability Application Messaging Layer (HAML) can guarantee delivery of application messages whether a failover occurs at one or both of the source and the intended destination of the message. The HAML may transmit messages to one intended destination, as unicast messaging, or to multiple intended destinations, as multicast messaging. In some embodiments, the HAML may be HA aware, which refers to the awareness of the HAML of the redundancy for all processing entities within a network device to ensure hitless failover at the network device. By moving support for HA messaging from individual applications to the HAML, as a common infrastructure layer across the processing entities, the individual applications do not need to implement additional software to explicitly support HA messaging.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: September 12, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Bill Ying Chin, Poongovan Ponnavaikko, Dan N. Retter, Mayur Mahajan
  • Patent number: 11757705
    Abstract: One embodiment of the present invention provides a switch system. The switch includes a port that couples to a server hosting a number of virtual machines. The switch also includes a link tracking module. During operation, the link tracking module determines that reachability to at least one end host coupled to a virtual cluster switch of which the switch is a member is disrupted. The link tracking module then determines that at least one virtual machine coupled to the port is affected by the disrupted reachability, and communicates to the server hosting the affected virtual machine about the disrupted reachability.
    Type: Grant
    Filed: September 5, 2022
    Date of Patent: September 12, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Suresh Vobbilisetty, Phanidhar Koganti
  • Patent number: 11750522
    Abstract: Systems and methods of communicating in a network use rate limiting. Rate limiting units (either receive side or transmit side) can perform rate limiting in response to a) a maximum number of bytes that can be solicited over a first period of time is exceeded, b) a maximum number of bytes that are outstanding over a second period of time is exceeded; or c) a maximum number of commands that are outstanding over a period of time is exceeded as part of CMD_RXRL. The CMD_RXRL can have three components (a) max bytes, b) outstanding bytes, c) outstanding commands. TXRL contains the component of max bytes or maximum number of bytes that can be transmitted over a third period of time to match the speed of a receive link, or any node or link through the network/fabric.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: September 5, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Kenny Wu, James Winston Smart, Mark Karnowski, Ravi Shenoy, Gregorio Gervasio, Jr., Lalit Chhabra, Chakradhara Raj Yadav Aradhyula
  • Publication number: 20230268929
    Abstract: Systems and methods provide a fractional signal from a delta sigma modulator to a summer, a combination of an integer value and the fractional signal to a divider, and a divided clock signal from the divider in response to the combination and the input clock signal. The systems and methods also delay the divided clock signal in response to a truncation phase error and gain calibration factor from a calibration unit to provide an output clock signal having equal periods.
    Type: Application
    Filed: May 2, 2023
    Publication date: August 24, 2023
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Ahmed Elkholy, Yousr Ismail, Adesh Garg, Ali Nazemi, Jun Cao
  • Publication number: 20230269175
    Abstract: A semiconductor chip for implementing load-aware equal-cost multipath routing includes a number of ports and several pipes, each pipe being coupled to a portion of ports on the semiconductor chip, and a central unit consisting of a state machine and multiple databases. The databases contain information regarding a communication network including an overlay network and an underlay network, and the state machine is implemented in hardware and can determine at least one feature of the overlay network and a corresponding group of paths within the underlay network.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 24, 2023
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventor: Sachin Prabhakarrao
  • Patent number: 11729099
    Abstract: A method for managing network traffic is shown. The method includes establishing a virtual tunnel between a source endpoint and a destination endpoint, the virtual tunnel including a plurality of data flow paths, each of the plurality of data flow streams connecting the source endpoint and the destination endpoint. The method includes providing, via the destination endpoint, a plurality of credits to the source endpoint, the plurality of credits provided via two or more of the plurality of data flow paths. The method includes updating, at the source endpoint, a data transmission sequence based on the received plurality of credits. The method includes providing a plurality of data packets based on the data transmission sequence to the destination endpoint.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: August 15, 2023
    Assignee: Avago Technologies International Sales PTE. Limited
    Inventors: Vahid Tabatabaee, Niranjan Vaidya, Chih-Yuan Chang, Mark David Griswold
  • Patent number: 11722109
    Abstract: An optical module includes an optical receiver with a complementary metal-oxide semiconductor (CMOS) transimpedance amplifier (TIA) and a digital signal processing (DSP) circuit. The DSP circuit is integrated with the CMOS TIA and facilitates adaptability of the CMOS TIA, and the CMOS TIA can adapt by using information provided by the DSP circuit.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: August 8, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Jiawen Zhang, Delong Cui, Afshin Momtaz, Kun Chuai, Jun Cao
  • Patent number: 11723143
    Abstract: A system and method for dissipating heat from a package and reducing interference between signaling pins is disclosed. The system includes a circuit substrate that includes a dielectric layer and at least one metal layer having an external surface. A plurality of metal posts is disposed on the external surface that function to a least one of dissipate heat from the circuit substrate, shield interfering signals between the signaling pins, and interact with mounting substrates on corresponding componentry. One or more metal posts are merged, increasing the interference shielding and heat dissipation functions of the metal posts.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: August 8, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Chang Kyu Choi, Hyun Mo Ku, Sarah Kay Haney, Li Sun
  • Patent number: 11723009
    Abstract: Systems, methods, and devices for conducting wireless communication are provided. One method includes identifying a location of a device and obtaining spectrum usage data from a database. The spectrum usage data indicates a licensed entity licensed within an area including the location of the device to communicate across a first sub-band of frequencies within a frequency band, and one or more transmission characteristics of the transmissions of the licensed entity. The method further includes determining beam steering characteristics for wireless transmissions of the device within the frequency band using the spectrum usage data. The beam steering characteristics are determined using the transmission characteristics for the licensed entity and configured to reduce interference with the transmissions of the licensed entity within the frequency band caused by the wireless transmissions of the device.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: August 8, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Vinko Erceg, Ron Porat, Thomas Derham, Matthew J. Fischer, Christopher David Szymanski
  • Patent number: 11721685
    Abstract: A memory system includes a memory stack including a number of memory dies interconnected via copper bonding, a logic die coupled to the memory stack via a copper bonding. The memory system further includes a buffer die extended to provide the copper bonding between the logic die and the memory stack and a silicon carrier layer bonded to the memory stack and the logic die.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: August 8, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventor: Thomas Edward Dungan
  • Patent number: 11706272
    Abstract: Methods and systems for early identification of bitrates for segments in adaptive bitrate streaming can allow the server to begin processing or transcoding content as necessary for delivery, reducing processing and transmission latency. In a first aspect, a client may request a second segment before the first segment has been completely received. The server may begin any transcoding processes for preparing the second segment, and once the server has completed sending the first segment, the server may begin transmitting the now-prepared or partially prepared second segment. The server can then transmit the first and second segment contiguously, with essentially no network dead time. In a second aspect, the client may transmit an early notification of parameters for the request of the second segment, allowing the server to begin transcoding. The client may subsequently request the already-prepared or partially prepared second segment, similarly reducing request-response processing latency.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: July 18, 2023
    Assignee: Avago Technologies International Sales Pte.Limited
    Inventor: Alexander Garland MacInnis
  • Patent number: 11700039
    Abstract: A front end radio frequency (RF) module including one or more first filter circuits configured to implement a front end function by filtering first signals communicated between one or more first antenna and a transceiver and one or more second filter circuits configured to implement at least a portion of an additional network function within the front end RF module by filtering second signals communicated between one or more second antennas and the transceiver.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: July 11, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Richard Ruby, William Carrol Mueller, Young Kwon, Joo Min Jung, Chan Hoe Koo
  • Publication number: 20230216654
    Abstract: Disclosed herein are related to systems and methods for correcting non-linearity due to duty cycle error. In one aspect, a system includes a mixer configured to up-convert transmission (Tx) data, a coefficient calibrator configured to select a target value of a coefficient based on a measurement of an interference signal due to non-linearity of the mixer, and an interference canceller coupled to the coefficient calibrator and the mixer. In some embodiments, the interference canceller is configured to generate compensated Tx data based on the Tx data and the selected target value of the coefficient and provide the compensated Tx data to the mixer. In some embodiments, the compensated Tx data corrects for the non-linearity of the mixer.
    Type: Application
    Filed: March 15, 2023
    Publication date: July 6, 2023
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Bevin George Perumana, Mohyee Mikhemar, Tirdad Sowlati, Alvin Lin, Sudharshan Srinivasan, Wei-Hong Chen
  • Patent number: 11696109
    Abstract: Techniques are described for interference reductions using, e.g., a Received Signal Strength Indicator (RSSI) or packet error rate threshold. User Equipment that implements these techniques may reduce interference among personal area network enabled devices, for example, with the added benefit of reducing power consumption by reduced radio frequency transmissions. By reducing interference, the performance of personal area network devices may be improved.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: July 4, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Arthur Jin, Lih-Feng Tsaur, Chikan Kwan, Erik John Rivard, Xin Tian, Chaojing Sun, Angel Polo
  • Patent number: 11689395
    Abstract: A digital signal processing (DSP) device includes a first fitter to equalize channel dispersion associated with signal transmission through a medium, a second filter to cancel channel reflections, and a third filter to at least reduce noise. The DSP device is a receiver DSP of the SERDES.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: June 27, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Magesh Valliappan, Adam Benjamin Healey
  • Patent number: 11683261
    Abstract: A semiconductor chip for implementing load-aware equal-cost multipath routing includes a number of ports and several pipes, each pipe being coupled to a portion of ports on the semiconductor chip, and a central unit consisting of a state machine and multiple databases. The databases contain information regarding a communication network including an overlay network and an underlay network, and the state machine is implemented in hardware and can determine at least one feature of the overlay network and a corresponding group of paths within the underlay network.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: June 20, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventor: Sachin Prabhakarrao Kadu
  • Patent number: 11683046
    Abstract: The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.
    Type: Grant
    Filed: August 1, 2022
    Date of Patent: June 20, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Jingguang Wang, Jing Wang, Robert Roze, Kambiz Vakilian