Patents Assigned to BAE Systems Information
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Patent number: 8365575Abstract: A method of performing chemical analysis is disclosed. The method includes the steps of forming carbide-derived carbon (CDC) material having a plurality of pore size, surface chemistry, and surface electrical properties. An array of the surface functionalized CDCs are used for atmospheric sampling, in which chemicals in the atmosphere are adsorbed on the CDCs. The adsorbed samples are desorbed later for analysis by a plurality of individual mass spectrometers.Type: GrantFiled: November 3, 2009Date of Patent: February 5, 2013Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Tadd C. Kippeny
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Patent number: 8365671Abstract: A method for detonating a munition comprising the steps of providing a plurality of micro-detonators and microprocessors in said munition and initiating said micro-detonators in a predetermined sequence by means of said microprocessor. Depending on the specific predetermined sequence which is selected, one of a variety of explosive modes may be achieved.Type: GrantFiled: January 12, 2011Date of Patent: February 5, 2013Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Paul R. Rohr
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Publication number: 20130000828Abstract: Embodiments of the invention are directed to methods and apparatus for infrared imagers including fast electrostatic shutters and offset compensation. Fast electrostatic shutters are used for video image correction including image offset compensation where temporal noise and scene nonuniformity are corrected. This method provides a shutterless experience for the user because the image will be blocked for only one frame at a time. A method of manufacturing an electrostatic infrared shutter includes a conductive infrared-transparent substrate, covering it with an insulating layer, depositing adhesive and a thin film stack, delineating a working area, providing contacts, heat-treating the assembly, and making the polymer non-reflective in the infrared.Type: ApplicationFiled: September 12, 2012Publication date: January 3, 2013Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Sergey Liberman, Michael Joswick
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Patent number: 8343792Abstract: An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers.Type: GrantFiled: October 27, 2008Date of Patent: January 1, 2013Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T. S. Pomerene, Vu A. Vu, Robert Kamocsai, Timothy J. Conway
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Patent number: 8338230Abstract: A system and method are provided in which a first chip in a stacked multi-chip module configuration is affixed via one or more adhesion layers to a first portion of a partitioned interposer unit. Planar partitions of the interposer are physically bonded via multiple solder “bumps,” which possess high tensile strength but low resistance to horizontal shear force or torque. A second chip is affixed via one or more adhesion layers to the second portion of the partitioned interposer. The chips may thus be separated by horizontally and oppositely shearing or twisting the first and second portions of the partitioned interposer away from one another.Type: GrantFiled: September 27, 2011Date of Patent: December 25, 2012Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: John A. Hughes, Thomas E. Love, Eugene Lemoine, David H. Lee, Christopher Ebel
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Publication number: 20120322177Abstract: A method for integrating a slotted waveguide into a CMOS process is disclosed. A slot can be patterned on a SOI wafer by etching a first pad hard mask deposited over the wafer. The slot is then filled with a plug material by depositing a second pad hard mask over the first pad hard mask. A waveguide in association with one or more electronic and photonic devices can also be patterned on the SOI wafer. The trenches can be filled with an isolation material and then polished. Thereafter, the first and second pad hard masks can be stripped from the wafer. The slot can once again be filled with the plug material and patterned. After forming one or more electronic and photonic devices on the wafer using the standard CMOS process, a via can be opened up down to the nitride plug and the nitride plug can then be removed.Type: ApplicationFiled: December 2, 2011Publication date: December 20, 2012Applicant: BAE Systems Information And Electronic Systems Integration Inc.Inventors: Andrew TS Pomerene, Craig M. Hill, Timothy J. Conway, Stewart L. Ocheltree
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Publication number: 20120321246Abstract: An asymmetric slotted waveguide and method for fabricating the same. The slotted waveguide is constructed in silicon-on-insulator using a Complementary metal-oxide-semiconductor (CMOS) process. One or more wafers can be coated with a photo resist material using a photolithographic process in order to thereby bake the wafers via a post apply bake (PAB) process. An anti-reflective coating (TARC) can be further applied on the wafers and the wafers can be exposed on a scanner for the illumination conditions. After a post exposure bake (PEB), the wafers can be developed in a developer using a puddle develop process. Finally, the printed wafers can be processed using a shrink process to reduce the critical dimension (CD) of the slot and thereby achieve an enhanced asymmetric slotted waveguide that is capable of guiding the optical radiation in a wide range of optical modulation applications using an electro-optic polymer cladding.Type: ApplicationFiled: December 2, 2011Publication date: December 20, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Andrew TS Pomerene, Wesley D. Reinhardt, Craig M. Hill
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Publication number: 20120312184Abstract: A method for detonating a munition comprising the steps of providing a plurality of micro-detonators and microprocessors in said munition and initiating said micro-detonators in a predetermined sequence by means of said microprocessor. Depending on the specific predetermined sequence which is selected, one of a variety of explosive modes may be achieved.Type: ApplicationFiled: May 18, 2012Publication date: December 13, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Paul R. ROHR
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Patent number: 8330820Abstract: Embodiments of the invention are directed to methods and apparatus for infrared imagers including fast electrostatic shutters and offset compensation. Fast electrostatic shutters are used for video image correction including image offset compensation where temporal noise and scene nonuniformity are corrected. This method provides a shutterless experience for the user because the image will be blocked for only one frame at a time. A method of manufacturing an electrostatic infrared shutter includes a conductive infrared-transparent substrate, covering it with an insulating layer, depositing adhesive and a thin film stack, delineating a working area, providing contacts, heat-treating the assembly, and making the polymer non-reflective in the infrared.Type: GrantFiled: December 5, 2008Date of Patent: December 11, 2012Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Sergey Liberman, Michael Joswick
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Publication number: 20120306050Abstract: A system and method for improving the prompt dose radiation response of mixed-signal integrated circuits is disclosed. An internal analog circuit inside a mixed-signal integrated circuit generates an internal analog reference voltage that has been used for various purposes in the integrated circuit. At least one external capacitor is added either internal or external to a device package of the integrated circuit. The external capacitor reduces any change in the internal reference voltage due to prompt dose radiation by stabilizing the internal reference voltage and thus improves prompt dose radiation response of mixed-signal integrated circuits. A much greater value of capacitance may be provided without increase in dielectric rupture suceptability or decrease in manufacturing yield which may be associated with added on-chip capacitance. This increased capacitance primarily reduce the amount of disturbance caused to the internal node during a prompt dose radiation event.Type: ApplicationFiled: May 30, 2012Publication date: December 6, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventor: John C. Rodgers
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Publication number: 20120304919Abstract: A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium, seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed layer to produce a p-doped germanium seed layer. At this point, a hulk germanium layer can be grown on top of the doped germanium seed layer.Type: ApplicationFiled: August 15, 2012Publication date: December 6, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Daniel N. Carothers, Craig M. Hill, Andrew T.S. Pomerene, Vu A. Vu
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Patent number: 8326309Abstract: Techniques are disclosed that allow for resource allocation during situations requiring co-existence in cognitive radios. Even under situations of bandwidth scarcity, the techniques allow various users to be guaranteed quality of service (QoS) by proper distribution and allocation of resources. The techniques allow wireless communication systems to operate in a normal mode and a co-existence mode. In the co-existence mode of operation, sub-frame creation, sharing and zone formation schemes are implemented that enable the existing underlying frame structure to remain intact and inter-operable with the legacy systems and at the same time, provide a guaranteed QoS. The zones effectively create partitions in space, time and frequency, which result in interference avoidance and allow various users in neighboring cells to communicate on the same frequencies.Type: GrantFiled: March 6, 2009Date of Patent: December 4, 2012Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Apurva N. Mody, Ranga Reddy
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Patent number: 8324542Abstract: A system is provided for the remote control of a spinning projectile, the system comprising: a polarized radiation source emitting polarized radiation wherein commands are encoded; a projectile round; a polarized radiation receiver disposed on the projectile round and configured to receive the polarized radiation; and a projectile steering mechanism, the mechanism directing movement of the projectile according to the commands communicated by means of rotation of polarization of the polarized radiation source.Type: GrantFiled: March 17, 2009Date of Patent: December 4, 2012Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Robert D Frey, Jr.
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Patent number: 8319636Abstract: A convenient handheld locator is provided for locating an item in an urban environment in which the locator is programmed to search for and locate specific items, with the detected item being displayed on the locator as to its identity or name, also displaying where the item is relative to the locator, as to position and range.Type: GrantFiled: July 21, 2011Date of Patent: November 27, 2012Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Karl D. Brommer, Court E. Rossman, Cedric L. Logan, Paul E. Gili
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Publication number: 20120292726Abstract: An entry slit panel for a push-broom hyperspectral camera is formed at least partly from a silicon wafer on which at least one companion sensor is fabricated, whereby the companion sensor is co-planar with the slit and detects light imaged on the panel but not on the slit. In embodiments, the companion sensor is a panchromatic sensor or a sensor that detects light outside the wavelength range of the camera. At least a region of the wafer is back-thinned to a thickness appropriate for a diffraction slit. The slit can be etched or laser cut through the thinned region, or formed between the wafer and another wafer or a conventional blade. The wafer can be back-coated or metalized to ensure its opacity across the camera's wavelength range. The companion sensor can be located relative to the slit to detect scene features immediately before or after the hyperspectral camera.Type: ApplicationFiled: January 24, 2012Publication date: November 22, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Thomas H. Wallace
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Publication number: 20120286570Abstract: A method and apparatus of using DICE-T personality cards to adapt the incoming voltages supplied by the GVA and provide the ability to turn any voltage to any card on or off depending upon operating mode in a radio system is disclosed. The ability to control voltages individually also allows the control of the power-up sequencing of any card. The DICE-T personality cards use voltages from GVA to generate the additional voltages required by the Core Engines and VHF Module. All of the voltages are connected to hot-swap controllers which provide switching of the power to each destination. These hot-swap controllers also provide monitoring of voltage and shut-down if over-current conditions occur. The two DICE-T personality cards each have a Complex Programmable Logic Device (CPLD) controls the hot-swap controller for each voltage. The CPLD also controls the sequencing of the individual voltages applied to each module.Type: ApplicationFiled: May 7, 2012Publication date: November 15, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Boris Radovcic, Christopher O'Bara
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Publication number: 20120287575Abstract: A method and apparatus for cooling modules in a radio system is disclosed. The apparatus comprises an adaptor module with side walls and integrated heat exchanging elements. The adaptor module adapts the air flow from a chassis in the radio system such that the exiting ducting on the chassis efficiently mate with the air conduits in the modules. The adaptor allows the use of new high power density modules in the existing chassis without changing the module design. The use of adaptor module in chassis provides efficient cooling and use less volume in the chassis.Type: ApplicationFiled: May 7, 2012Publication date: November 15, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Eric G. Nelson
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Publication number: 20120290771Abstract: A system and method for protecting boot and recovery area of a flash memory in order to meet GMR requirements in radio system is disclosed. When the Core Engine Modem is installed in the factory test equipment, LOCK signal on the PoP module is logic high. At this time, the flash will be unlocked, and the boot and recovery code is written. The boot and recovery sectors will then be locked and the user area of the flash is left unlocked. When installed in the GLS DICE-T, LOCK signal on the PoP module is logic low. At this time, the flash device will ignore block lock commands, which prevent the unlocking of the protected sectors. The write enable signal from the GVA can now be utilized to enable writing to the user area of the flash despite of protecting boot and recovery areas.Type: ApplicationFiled: May 7, 2012Publication date: November 15, 2012Applicant: BAE Systems Information and Electronics Systems Inc.Inventor: Boris Radovcic
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Publication number: 20120287977Abstract: A method and apparatus of minimizing corruption of a reference clock to a RF circuitry in a radio system is disclosed. A DICE-T receives a reference clock in a Low Voltage Differential Signal (LVDS) format from a GVA. The DICE-T personality card converts the reference clock signal into an analog signal. The analog signal is supplied to the Core Engine RF card and the LVDS format signal is supplied to the Core Engine modem for local clocking. The Core Engine RF feeds the analog signal into a programmable phase locked loop chip to generate all the clocks required for RF processing. The analog signal is also used to provide the clocks to the ADC and DAC of core engine modem. By routing the reference clock directly to the RF card then deriving the modem clocks, the phase noise of the reference clock is reduced.Type: ApplicationFiled: May 7, 2012Publication date: November 15, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Boris Radovcic, Michael S. Vogas
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Publication number: 20120290741Abstract: A system and method for allowing individual register access during system integration and test is disclosed. A Chip select is routed between an OMAP processor and a waveform FPGA and configured to allow individual register access during system integration and test. Logic is then added to the FPGA to support the single access to the FPGA's peripherals. This allows the user connected to the debug port to be able to send and receive individual commands to and from the waveform FPGA's peripherals. A Graphical User Interface (GUI) maybe developed to provide a graphical interface or scripts may be used to assemble multiple commands thereby increasing flexibility to configure the peripherals during integration and troubleshooting.Type: ApplicationFiled: May 7, 2012Publication date: November 15, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Boris Radovcic