Patents Assigned to BAE Systems
  • Patent number: 6472676
    Abstract: The present invention provides an apparatus and a method for accurately positioning tools for use in manufacturing or inspection operations whilst reducing the need for costly tooling such as jigs. The method for accurately positioning tools comprises at least the steps of projecting an image onto a surface, detecting the projected image, processing the projected image, calculating at least two dimensional co-ordinates of the projected image relative to a tool, and moving the tool so that it is positioned in a pre-defined spacial relationship with respect to the projected image.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: October 29, 2002
    Assignee: BAE Systems plc
    Inventors: Anthony J Douglas, Paul E Jarvis, Kevin W Beggs
  • Patent number: 6473054
    Abstract: A source of interference signals may be present at a fixed incident angle relative to a stationary antenna. Horizontal array antennas are provided with radiation pattern notches or nulls at selected fixed angles to suppress reception of interference signals. By excitation of elements on the left side of an array in opposite phase relative to elements on the right side and provision of an appropriate line-length differential between left and right radiation element feed lines, a radiation pattern notch is positioned at a selectable angle relative to boresight. Notch width optimization is provided by use of relative excitation levels of radiating elements as disclosed. Other configurations are disclosed.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: October 29, 2002
    Assignee: BAE System Aerospace Inc.
    Inventors: Alfred R. Lopez, Henry L. Bachman
  • Patent number: 6471883
    Abstract: A vibrating structure gyroscope having a silicon substantially planar ring vibrating structure (1) capacitive means for imparting drive motion to and sensing motion of the vibrating structure (1), and a screen layer (15) surrounding the capacitive means is made by depositing photoresist material (9) on a glass or silicon substrate (7), hardening, patterning and developing the photoresist (9) to expose areas of the substrate (7), etching the exposed areas to form cavities (10) therein, stripping any remaining photoresist material (9) attaching a silicon layer (8) to the cavitated substrate (7) depositing a layer of aluminium on the silicon layer (8), depositing photoresist material on the aluminium layer, hardening, patterning and developing the photoresist layer to expose areas of the aluminium layer, etching the exposed areas of the aluminium layer to leave regions of aluminium on the silicon layer providing bond pads (11, 12, 13 and 14), stripping the remaining photoresist from the aluminium layer, depositi
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: October 29, 2002
    Assignee: BAE Systems PLC
    Inventors: Christopher P Fell, Kevin Townsend, Ian Sturland
  • Patent number: 6468860
    Abstract: A method for manufacturing an integrated circuit having high voltage transistors and low voltage transistors is disclosed. First, lightly doped drains are formed in both high voltage transistors and low voltage transistors within the integrated circuit. A thin layer of silicon nitrate film is then deposited on the first and second transistors. Afterwards, a layer of silicon oxide is deposited on the silicon nitride film. After forming oxide spacers on both high voltage transistors and low voltage transistors, the oxide spacers are removed from the low voltage transistors. Finally, diffusion implants are performed on the first and second transistors. As a result, the high voltage transistors possess lightly doped drained junctions.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: October 22, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventors: Murty S. Polavarapu, Jon Maimon
  • Patent number: 6466325
    Abstract: A method for calibrating position (11) of each light source in a first set of light sources (1) on a first part (2) when the first set (1) are attached thereto, including the steps of measuring first positions (3i) of each of the light sources in the first set (1), each of said light sources (1) being either an active light source or an illuminable reflecting point, generating a first set of light sources to facet mapping (4), which first set to facet mapping (4) specifies which facet (9i) of the first part (2) each of the light sources in the first set (1) are located on, estimating a transformation (5) that transforms the first positions (3i) into a co-ordinate frame of the first part (7), thereby generating estimated positions (6i) of each of the light sources in the first set (1) on the first part (2), which estimated positions (6i) are in the co-ordinate frame of the first part (7), calculating (10a) first distances (8i) from the estimated positions (6i) to respective facets (9i) of the first part (2), i
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: October 15, 2002
    Assignee: BAE Systems plc
    Inventor: Richard M Gooch
  • Patent number: 6464365
    Abstract: A collimator is provided to collimate light from a lambertian light source in which light from a fluorescent lamp is reflected towards an exit slit and in which light which leaves the slit at 180 degrees and is collimated in one direction to +/−1/2 degree. The collimator is utilized in one application to maximize the diffraction efficiency of a diffractive color separator microlens array to increase the brightness of a color liquid crystal display and to increase color saturation. In order to provide collimation, the light exiting the exit slit is collimated by parabolic surfaces of an optical waveguide to provide a beam which has a collimation of +/−3 degrees in one direction. This light in one embodiment is spread out by a reflective array and is further collimated by a cylindrical lens array so that it exits a panel with the required +/−1/2 degree collimation.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: October 15, 2002
    Assignee: Bae Systems Information and Electronic Systems Integration Inc.
    Inventors: Thomas V. Gunn, Wesley H. Halstead
  • Patent number: 6461458
    Abstract: The invention relates to a method of providing a seal between an aircraft structure (14) and a removable panel (26) mountable on the structure to close an opening (12) therein. According to the invention, the method comprises applying a sealant compound (28) for example a polysulphide rubber compound, to one of the structure and the panel, forming a rebate (46) in the sealant compound, and providing a sealant tape (48) to fit within the rebate. Subsequently, the panel is fastened to the structure with the seal (50) comprising the sealant compound and the sealant tape being sandwiched between the structure and the panel and encircling the opening.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: October 8, 2002
    Assignee: BAE Systems plc
    Inventors: David Fisher, Raja S. Abbas, John S. Robbens, Stan Wood
  • Patent number: 6463483
    Abstract: A computing or processing system including a microprocessor and a memory coupled together by a local bus, and also includes a north bridge providing translation to a PCI or other standard bus. The system also includes a device bus, which may or may not be coupled to the PCI bus by a south bridge. A device bus interface bypasses the north and south bridges, to provide a single-step interface to the device bus. This reduces the latency.
    Type: Grant
    Filed: January 19, 2000
    Date of Patent: October 8, 2002
    Assignee: BAE Systems Controls, Inc.
    Inventor: Steven Robert Imperiali
  • Patent number: 6462927
    Abstract: An electro-magnet (11) is spatially coupled with respect to a support armature (15) by an operational gap (16) and their relative movement is automatically compensated by controlling a current (14) supplied to the electromagnet (11). The current (14) and hence a magnetic field (F) are controlled by a current controller (13) which incorporates a transfer function and is operated in a feedforward path (19) by a signal (18) from a sensor (17) which detects variations in the gap (16) between the electro-magnet (11) and the support armature (12). The current controller (13) is also operated in a feedback path (22) by a signal (21) from a sensor (20) which detects variations in the flux intensity of the magnetic field (F).
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: October 8, 2002
    Assignee: Bae Systems Electronics Limited
    Inventor: Malcolm A Swinbanks
  • Patent number: 6457396
    Abstract: A self propelled gun (2) comprises a vehicle (4) possessing a source of primary power (6) and a gun assembly (8) movably attached to the vehicle. The gun assembly (8) comprises a base (10), a cradle (14) pivotally mounted to the base and a barrel (16) slidably mounted to the cradle (14) such as to be displaceable from a first, run-out, position to a second, recoiled, position as a consequence of the barrel (16) recoiling on firing. The gun assembly (8) is movably mounted to the vehicle (4), preferably by a pivot arrangement (24, 26) between vehicle (4) and base (10), such that in a first, “mobility”, mode the gun assembly (8) is free of any direct contact with the ground (42), and said barrel (16) points in a first direction allowing said vehicle (4) to be driven and a second, “firing”, mode of operation in which the gun assembly is deployed to a firing position in which the base moves towards and into engagement with the ground (42).
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: October 1, 2002
    Assignee: Bae Systems Marine Limited
    Inventors: Mervyn L Bean, Frederick Herbert, David A Eaglestone
  • Patent number: 6456138
    Abstract: A clock splitter circuit for providing a single event upset (SEU) tolerant clock signal to latches in a space-based environment. The clock splitter circuit can include one or more event offset circuit delay circuits. The event offset delay receives a clock signal and generates a delayed clock signal. The event offset delay circuit can generate an inverted clock signal, a delayed inverted clock signal and a pair of intermediate clock signals. The delayed clock signal and inverted delayed clock signal can be delayed by the known duration of single event effects (SEE). The delayed and undelayed clock signals can be passed to an event blocking filter which can block any disturbance in the delayed and/or undelayed clock signals. A synchronizer can synchronize outputs of the event blocking filter prior to or coincident with being passed to corresponding inverting clock drivers. The synchronizers can also insure that the synchronized blocking filter outputs can not be low simultaneously.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: September 24, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventors: Joseph W. Yoder, Abbas Kazemzader
  • Patent number: 6455947
    Abstract: A power combining apparatus for a hybrid electric vehicle comprises a planetary gear set comprising a sun gear, a ring gear connected to an output shaft, a plurality of planet gears, and a carrier assembly rotatably supporting the plurality of planet gears journaled with the sun and ring gears. A torque transmitting arrangement is coupled to the sun gear and to the shaft of the variable power source for influencing rotation of the sun gear according to the rotation of the variable power supply shaft for causing rotation of the sun gear, thereby influencing rotation of the ring gear and the output shaft. The carrier assembly of the planetary gear arrangement is selectively connectable to the constant power source for selectively influencing rotation of the carrier assembly of the planetary gears and the ring gear, to thereby influence rotation of the output shaft.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: September 24, 2002
    Assignee: BAE Systems Controls, Inc.
    Inventors: Timothy J. Lilley, Grantland I. Kingman
  • Patent number: 6455392
    Abstract: An integrated resistor includes a resistor body region and a resistor contact region that is aligned with the body region. Because the resistor includes an aligned body and contact, it often occupies a smaller area than prior integrated resistors having a similar resistance value. A method for forming such a resistor is also disclosed.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: September 24, 2002
    Assignee: BAE Systems Information and Electrical Systems Integration, Inc.
    Inventors: Jonathan Maimon, Murty S. Polavarapu
  • Patent number: 6450394
    Abstract: A method of forming a structural airframe component for an aircraft and an airframe structural component are provided. The method includes placing at least two components (1, 2) in abutting relationship with each other and joining them together by friction stir butt welding (3), and the structural airframe component comprises a component manufactured according to the method of the invention.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: September 17, 2002
    Assignee: BAE Systems plc
    Inventors: Tim Wollaston, Richard Pedwell, Paul Bush
  • Patent number: 6450193
    Abstract: An aircraft fuel tank (101) comprises an inner and an outer chamber (103, 105) which are fluidly interconnected via a plurality of open-ended pipes (109). A non-flammable gas, which is immiscible with the fuel (119), is pumped into the outer chamber (103) on demand to displace the fuel (119) into the less vulnerable inner chamber (105) and thereby forms a protective non-flammable gaseous barrier around the fuel-retaining inner chamber (105). The fuel tank (101) is used primarily for military aircraft and provides the ability to attenuate hydrodynamic ram effects arising in the fuel following penetration of the fuel tank (101) by a projectile. All round protection is achieved because the inner chamber (105) is contained wholly within the outer chamber (103).
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: September 17, 2002
    Assignee: BAE Systems plc
    Inventor: Chrisostomos Constantinou
  • Patent number: 6452462
    Abstract: The present invention provides a compact slotline balun implemented on a 10-mil thick printed circuit card. The balun utilizes a transition region configuration of a six-port network to achieve a good impedance match and low insertion loss across a wide operating band. The balun is typically manufactured using standard printed circuit techniques which yield a thin, flexible, dimensionally stable device.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: September 17, 2002
    Assignee: BAE Systems Information and Electronics Systems Integration Inc.
    Inventor: Zane Lo
  • Patent number: 6452549
    Abstract: The present invention features a stacked, multi-band, antenna system consisting of a low-frequency, forward portion and a gridded, rear portion designed for operation at a higher frequency. Both front and rear radiating elements may share a common ground plane or the rear element may form a ground plane for the front element. Typically, the front antenna is a relatively narrow-band, gridded, bow-tie dipole or a similar radiating structure and the rear antenna is a wide-band dipole or slot element. Additional frequency bands may be designed into the inventive system by adding additional dipole or similar antenna elements above, below, or between the front and rear antennas. By properly choosing element sizes and spacings, and orienting the various antennas, a frequency band ratio of as little as 4:1 may be obtained.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: September 17, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration Inc
    Inventor: Zane Lo
  • Patent number: 6448936
    Abstract: The present invention features a reconfigurable resonant cavity specifically for use with a slot radiator. A series of internal planes with frequency-selective materials disposed on their top surfaces, in conjunction with switchable shorting pins, is used to reconfigure the cavity's resonant frequency. PIN diodes, MEMS or other photonically or electrical activated switching devices may be used to selectively “activate” shorting pins. A single resonant cavity may be electrically reconfigured to operate at two, three, or even more different frequency bands.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: September 10, 2002
    Assignee: BAE Systems Information and Electronics Systems Integration Inc.
    Inventors: David E. Kopf, Zane Lo
  • Patent number: 6448576
    Abstract: A method for manufacturing a programmable chalcogenide fuse within a semiconductor device is disclosed. A resistor is initially formed on a substrate. Then, a chalcogenide fuse is formed on top of the resistor. Finally, a conductive layer is deposited on top of the chalcogenide fuse for providing electrical conduction to the chalcogenide fuse.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: September 10, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventors: John D. Davis, Thomas J. McIntyre, John C. Rodgers, Keith K. Sturcken, Peter W. Spreen, Tushar K. Shah
  • Patent number: 6448862
    Abstract: A single event effect immune oscillator circuit is disclosed. The single event upset immune oscillator circuit includes an odd number of logic circuit blocks connecting in series to provide a continuous pulse signal at an output of the oscillator circuit. Each logic circuit block has a first input, a second input, and an output. For a series of logic circuit blocks i, where i=1 to n (n is an odd number), the output of a logic circuit block i is connected to a first input of a logic circuit block i+1. The output of the logic circuit block i is also connected to a first input of a logic circuit block i+x, wherein x is an odd number greater than one and less than or equal to n.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: September 10, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Joseph Yoder, Nadim Haddad