Abstract: A method of making a semiconductor package with package-on-package stacking capability is characterized by the step of attaching a chip-on-interposer subassembly on a base carrier with the chip inserted into a through opening of the base carrier and the interposer laterally extending beyond the through opening. The interposer provides primary fan-out routing for the chip whereas dual buildup circuitries formed on both opposite sides of the base carrier provides further fan-out routing and are electrically connected to each other by plated through holes to provide the package with stacking capacity.

Abstract: The present invention relates to an interconnect substrate with an embedded device, a built-in stopper and dual build-up circuitries and a method of making the same. In accordance with one preferred embodiment of the present invention, the method includes: forming a stopper on a dielectric layer; mounting a semiconductor device on the dielectric layer using the stopper as a placement guide for the semiconductor device; attaching a stiffener to the dielectric layer; forming a first build-up circuitry and a second build-up circuitry that cover the semiconductor device, the stopper and the stiffener at both sides; and providing a plated through-hole that provides an electrical connection between the first and second build-up circuitries. Accordingly, the stopper can accurately confine the placement location of the semiconductor device and avoid the electrical connection failure between the semiconductor device and the build-up circuitry.

Abstract: A method of making a semiconductor device with face-to-face chips on interposer includes the step of attaching a chip-on-interposer subassembly on a heat spreader with the chip inserted into a cavity of the heat spreader so that the heat spreader provides mechanical support for the interposer. The heat spreader also provides thermal dissipation, electromagnetic shielding and moisture barrier for the enclosed chip. In the method, a second chip is also electrically coupled to a second surface of the interposer and an optional second heat spreader is attached to the second chip.

Abstract: The present invention relates to a thermally enhanced interconnect substrate and a method of making the same. In accordance with one preferred embodiment, the method includes: forming a stopper on a metal layer of a laminate substrate; removing a selected portion of the metal layer to form a paddle layer; mounting a semiconductor device on the paddle layer using the stopper as a placement guide for the semiconductor device; attaching a stiffener to the laminate substrate; forming first and second build-up circuitries that cover the semiconductor device, the paddle layer and the stiffener at both sides; and providing a plated through-hole that provides an electrical connection between the first and second build-up circuitries. Accordingly, the paddle layer can provide excellent heat spreading, and the stopper can accurately confine the placement location of the semiconductor device and avoid the electrical connection failure between the semiconductor device and the build-up circuitry.

Abstract: In a preferred embodiment, a wiring board with embedded device and electromagnetic shielding includes a semiconductor device, a core layer, a shielding lid, shielding slots and build-up circuitry. The build-up circuitry covers the semiconductor device and the core layer. The shielding slots and the shielding lid are electrically connected to at least one ground contact pad of the semiconductor device by the build-up circuitry and can respectively serve as effective horizontal and vertical electromagnetic shields for the semiconductor devices.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and first and second adhesives. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a post and a base. The post extends upwardly from the base through an opening in the first adhesive, and the base extends laterally from the post. The first adhesive extends between the base and the conductive trace and the second adhesive extends between the post and the conductive trace. The conductive trace provides signal routing between a pad and a terminal.

Abstract: A stackable semiconductor assembly includes a semiconductor device, a heat spreader, an adhesive, a plated through-hole, first build-up circuitry and second build-up circuitry. The heat spreader includes a bump and a flange. The bump defines a cavity. The semiconductor device is mounted on the bump at the cavity, electrically connected to the first build-up circuitry and thermally connected to the bump. The bump extends into an opening in the adhesive and the flange extends laterally from the bump at the cavity entrance. The first build-up circuitry and the second build-up circuitry extend beyond the semiconductor device in opposite vertical directions. The plated through-hole extends through the adhesive and provides signal routing between the first build-up circuitry and the second build-up circuitry. The heat spreader provides heat dissipation for the semiconductor device.

Abstract: A method of making a semiconductor assembly that includes a semiconductor device, a heat spreader, an adhesive and a build-up circuitry is disclosed. The heat spreader includes a bump, a base and a flange. The bump defines a cavity. The semiconductor device is mounted on the bump at the cavity, electrically connected to the build-up circuitry and thermally connected to the bump. The bump extends from the base into an opening in the adhesive, the base extends vertically from the bump opposite the cavity and the flange extends laterally from the bump at the cavity entrance. The build-up circuitry includes a dielectric layer and conductive traces on the semiconductor device and the flange. The conductive traces provide signal routing for the semiconductor device.

Abstract: A hybrid wiring board includes an interposer, a stopper, a stiffener and a build-up circuitry. The stopper is laterally aligned with and laterally extends beyond peripheral edges of the interposer in lateral directions. The interposer extends into an aperture of the stiffener and is electrically connected to the build-up circuitry. The build-up circuitry covers the stopper, the interposer and the stiffener and provides signal routing for the interposer. The stiffener provides mechanical support, ground/power plane and heat sink for the build-up circuitry.

Abstract: The present invention relates to a method of making a semiconductor assembly. In accordance with a preferred embodiment, the method includes: preparing a dielectric layer and a supporting board including a stiffener, a bump/flange sacrificial carrier and an adhesive, wherein the adhesive bonds the stiffener to the sacrificial carrier and the dielectric layer covers the supporting board; then removing the bump and a portion of the flange to form a cavity and expose the dielectric layer; then mounting a semiconductor device into the cavity; and then forming a build-up circuitry that includes a first conductive via in direct contact with the semiconductor device and provides signal routing for the semiconductor device. Accordingly, the direct electrical connection between the semiconductor device and the build-up circuitry is advantageous to high I/O and high performance, and the stiffener can provide adequate mechanical support for the build-up circuitry and the semiconductor device.

Abstract: A method of making a cavity substrate. The method includes: preparing a supporting board including a stiffener, a bump/flange sacrificial carrier, an adhesive and an electrical pad, wherein the adhesive bonds the stiffener to the sacrificial carrier; forming a careless build-up circuitry on the supporting board in contact with the bump and the stiffener; and removing the bump to form a cavity and expose the electrical pad from a closed end of the cavity; wherein the cavity is laterally covered and surrounded by the adhesive. A semiconductor device can be mounted on the cavity substrate and electrically connected to the electrical pad. The careless buildup circuitry provide signal routing for the semiconductor device while the built-in stiffener can provide adequate mechanical support for the careless build-up circuitry and the semiconductor device.

Abstract: The present invention relates to a method of making a hybrid wiring board. In accordance with a preferred embodiment, the method includes: preparing a dielectric layer and a supporting board including a stiffener, a bump/flange sacrificial carrier and an adhesive, wherein the adhesive bonds the stiffener to the sacrificial carrier and the dielectric layer covers the supporting board; then removing the bump and a portion of the flange to form a cavity and expose the dielectric layer; then mounting an interposer into the cavity; and then forming a build-up circuitry that includes a first conductive via in direct contact with the interposer and provides signal routing for the interposer. Accordingly, the direct electrical connection between the interposer and the build-up circuitry is advantageous to high I/O and high performance, and the stiffener can provide adequate mechanical support for the build-up circuitry and the interposer.

Abstract: A method of making a stackable semiconductor assembly that includes a semiconductor device, a heat spreader, an adhesive, a plated through-hole, first build-up circuitry and second build-up circuitry is disclosed. The heat spreader includes a bump and a flange. The bump defines a cavity. The semiconductor device is mounted on the bump at the cavity, electrically connected to the first build-up circuitry and thermally connected to the bump. The bump extends into an opening in the adhesive and the flange extends laterally from the bump at the cavity entrance. The first build-up circuitry and the second build-up circuitry extend beyond the semiconductor device in opposite vertical directions. The plated through-hole extends through the adhesive and provides signal routing between the first build-up circuitry and the second build-up circuitry. The heat spreader provides heat dissipation for the semiconductor device.

Abstract: A thermally enhanced wiring board includes a heat sink, a stiffener and a build-up circuitry. The heat sink extends into an aperture of the stiffener and is thermally connected to the build-up circuitry. The build-up circuitry covers the heat sink and the stiffener and provides signal routing for the stiffener. The stiffener provides signal routing and mechanical support for the build-up circuitry.

Abstract: The present invention relates to a method of making a cavity substrate. In accordance with a preferred embodiment, the method includes: preparing a supporting board including a stiffener, a bump/flange sacrificial carrier and an adhesive, wherein the adhesive bonds the stiffener to the sacrificial carrier; then attaching an interconnect substrate to the supporting board using a dielectric layer; then removing the bump and a portion of the flange to form a cavity and expose the dielectric layer; and then forming a via opening in the dielectric layer to expose a selected portion of the interconnect substrate. A semiconductor device can be mounted on the cavity substrate and electrically connected to the exposed portion of the interconnect substrate. The interconnect substrate provides signal routing for the semiconductor device while the stiffener can provide adequate mechanical support for the interconnect substrate and the semiconductor device.

Abstract: The present invention relates to a semiconductor assembly with a built-in stopper and a method of making the same. In accordance with one preferred embodiment of the present invention, the method includes: forming a stopper on a dielectric layer; mounting a semiconductor device on the dielectric layer using the stopper as a placement guide for the semiconductor device; attaching a stiffener to the dielectric layer; and forming a build-up circuitry that covers the semiconductor device, the stopper and the stiffener and provides signal routing for the semiconductor device. Accordingly, the stopper can accurately confine the placement location of the semiconductor device and avoid the electrical connection failure between the semiconductor device and the build-up circuitry.

Abstract: The present invention relates to a method of making a thermally conductive semiconductor assembly. In accordance with a preferred embodiment, the method includes: providing a chip; providing an interposer that includes a through via, a first contact pad on a first surface and a second contact pad on an opposite second surface; electrically coupling the chip to the first contact pad of the interposer by a conductive bump or a wire; providing a heat sink with a cavity; then attaching the chip and the interposer on the heat sink using an adhesive with the chip inserted into the cavity; and then forming a build-up circuitry on the second surface of the interposer. Accordingly, the heat sink can provide essential thermal dissipation for the embedded chip, and the interposer and build-up circuitry can respectively provide first and second level fan-out routing/interconnection for the embedded chip.

Abstract: The present invention relates to a method of making a hybrid wiring board with built-in stopper and interposer. In accordance with one preferred embodiment of the present invention, the method includes: forming a stopper on a dielectric layer; mounting an interposer on the dielectric layer using the stopper as a placement guide for the interposer; attaching a stiffener to the dielectric layer; and forming a build-up circuitry that covers the interposer, the stopper and the stiffener and provides signal routing for the interposer. Accordingly, the stopper can accurately confine the placement location of the interposer and avoid the electrical connection failure between the interposer and the build-up circuitry.

Abstract: In a preferred embodiment, a wiring board with embedded device, built-in stopper and electromagnetic shielding includes a stopper, a semiconductor device, a stiffener with shielding sidewalls, a first build-up circuitry and a second build-up circuitry with a shielding lid. The first and second build-up circuitries cover the semiconductor device, the stopper and the stiffener in the opposite vertical directions. The shielding sidewalls and the shielding lid are electrically connected to at least one ground contact pad of the semiconductor device by the first build-up circuitry and can respectively serve as effective horizontal and vertical electromagnetic shields for the semiconductor device within the aperture of the stiffener.

Abstract: The present invention relates to a thermally enhanced interconnect substrate and a method of making the same. In accordance with one preferred embodiment, the method includes: forming a stopper on a metal layer of a laminate substrate; removing a selected portion of the metal layer to form a paddle layer; mounting a semiconductor device on the paddle layer using the stopper as a placement guide for the semiconductor device; attaching a stiffener to the laminate substrate; forming first and second build-up circuitries that cover the semiconductor device, the paddle layer and the stiffener at both sides; and providing a plated through-hole that provides an electrical connection between the first and second build-up circuitries. Accordingly, the paddle layer can provide excellent heat spreading, and the stopper can accurately confine the placement location of the semiconductor device and avoid the electrical connection failure between the semiconductor device and the build-up circuitry.