Abstract: A method is disclosed for maintaining the integrity of a communication system. The method comprises detecting common path distortion (CPD) and periodic impulse/burst (PIB) noise in a received signal in the communication system. After isolating the CPD and PIB noise, ingress noise in the received signal is identified. Isolating the CPD and PIB noise thus prevents improper classification of CPD and PIB noise as ingress noise. Operating parameters of the communication system are then adapted in accordance with the identified ingress noise, the detected CPD and/or the detected PIB noise.

Abstract: Inter-device adaptable interfacing clock skewing. The invention is operable in either one of both of a transmit mode and a receive mode to perform skewing of a transmitted and/or a received signal. The operational parameters including frequency and phase may be determined during auto detect/auto negotiation, they may be programmed externally, or they may be user selected in various embodiments. A device may include a clock generator, one or more divider, and one or more delay cells internally to the device. If desired, a high frequency clock is generated within the device and then divided down to generate the appropriate clock signal that supports the communication and interaction between multiple devices. Registers and/or pins may be used to select the clock frequency and phase of output clock signals. The present invention supports multiple Ethernet protocols between multiple devices including 10BaseT, 100BaseT, and 1000BaseT.

Abstract: New version packet data devices support a backwards-compatible signal format. New version devices operate within a first frequency band while old version devices operate within a second frequency band. The first frequency band differs from but overlaps with the second frequency band. The new version devices may operate on a first carrier frequency (within the first frequency band) while old version devices may operate at a second carrier frequency (within the second frequency band). The new version devices and/or the old version devices may also support carrier-less modulations. Preamble, header, and trailer portions of a new version signal include a plurality of spectral copies of a baseband modulated signal. One or more of these spectral copies of the baseband modulated signal is/are indistinguishable from corresponding components of an old version signal. The payload of the new version signal may be formed in the same manner or may be formed in have a wider bandwidth, higher data rate format.

Abstract: A vector processing system for executing vector instructions, each instruction defining multiple value pairs, an operation to be executed and a modifier, the vector processing system comprising a plurality of parallel processing units, each arranged to receive one of said pairs of values and, when selected, to implement an operation on said value pair to generate a result, each processing unit comprising at least one flag and being selectable in dependence on a condition defined by said at least one flag, wherein the modifier defines the condition under which the parallel processing unit is individually selected.

Abstract: Auto-negotiation with a communication partner includes downgrading a set of advertised communications capabilities, e.g., IEEE 802.3 capabilities, when a link with the communication partners fails to support an advertised communications capability, e.g., wire-speed.

Abstract: A network device includes at least one network port, a masks table, a rules table, a pointers table, and a fast filter processor. The masks table contains filter information and a mask key. The rules table contains corresponding rules to the filter information and is related to the mask table by the mask key. The pointers table contains boundary data related to the rules for corresponding filter information. The fast filter processor is coupled to the mask table, the rules table and the pointers table, and configured to perform at least one binary search for at least one rule related to a data packet received by the network device at the at least one network port, the binary search being limited based on the boundary data in the pointers table.

Abstract: Methods and apparatus for testing wireless devices. Devices being tested receive and transmit radio frequency test signals. These radio frequency test signals are received or transmitted using an antenna associated with the device, and then are transmitted or received using a unique wide-band tapered-slot antenna connected to a test system. The wide-band tapered-slot antenna has an input path that is substantially orthogonal to the tapered slot, and one of the conductors defining the slot is grounded.

Abstract: A method and system for performing diagnostic tests on a communications system. Diagnostic test signals are generated by a transceiver included within the communications system. Diagnostic data signals generated within the communications system in response to the diagnostic test signals are collected by the transceiver. The communications transceiver may operate alone, with an assisting communications transceiver, or with a non-assisting communications transceiver. The collected diagnostic data signals are stored and made available for later analysis. The method and system are used to generate and store ECHO Crosstalk, Near End Cross Talk (NEXT) and Far End CrossTalk (FEXT) data signals.

Abstract: The present invention provides a method for determining nonlinear distortion of a transmitter. A test symbol sequence is transmitted from the transmitter under test as an analog output signal. The analog output signal is sampled to produce a first sequence which represents the test symbol sequence as distorted by a linear distortion sequence and a nonlinear distortion sequence. The test symbol sequence is filtered via an adaptive filter to produce a second sequence such that the second sequence is approximately equal to the test symbol sequence as distorted by the linear distortion sequence. The second sequence is subtracted from the first sequence to produce an output sequence substantially equal to the nonlinear distortion sequence.

Abstract: A Variable Gain Amplifier (VGA) amplifies an input signal according to a gain, to produce an amplified signal. A detector module detects a power indicative of a power of the amplified signal. A comparator module compares the detected power to a high threshold, a low threshold and a target threshold intermediate the high and low thresholds. A controller module changes the gain of the VGA so as to drive the detected power in a direction toward the middle threshold when the comparator module indicates the detected power is not between the high and low thresholds.

Abstract: A wireless telephone having an array of microphones and a digital signal processor (DSP) and a method of processing audio signals from a wireless telephone having an array of microphones and a DSP. The wireless telephone includes an array of microphones and a DSP. Each microphone in the array is configured to receive sound waves emanating from the surrounding environment and to generate an audio signal corresponding thereto. The DSP is coupled to the array of microphones. The DSP is configured to receive the audio signals from the array of microphones, to detect a direction of arrival (DOA) of a sound wave emanating from the mouth of a user based on the audio signals and to adaptively combine the audio signals based on the DOA to produce a first audio output signal.

Abstract: A source-follower transistor based buffer provides high linearity. A replica transistor is used to generate a replica voltage substantially equal to the output voltage of the buffer. The replica voltage is level shifted by a level shift circuit and applied at the drain of the source-follower transistor to improve the linearity of the buffer. The buffer may be used in conjunction with a switched-capacitor sampling circuit. A damping circuit may be used to reduce charge glitches due to sampling. The damping circuit may be a low pass filter. The buffer may be used in an interface circuit that produces an output signal from an input signal and controls the level of the output signal.

Abstract: A super set of space-time block codes is combined with set partitioning to form super-orthogonal space-time trellis codes having full diversity, enhanced coding gains, and improved rates. In communications systems, these codes are implemented by an encoder of a diverse transmitter to send an information signal to a receiver having one or more receiver elements. A decoder in the receiver decodes the encoded signal to reproduce the information signal. A method of the invention is used to generate set partitioning structures and trellis structures that enable code designers to systematically design the codes of the invention.

Abstract: An improved automated testing system that decreases the number of test signals that must be stored in the tester pattern memory for a timed test pattern. In the present invention, a timed test pattern is controlled by a timing generator operable to change the timing interval of individual test cycles during the timed test pattern between first and second timing intervals, thereby decreasing the number of test signals stored in pattern memory for the timed test pattern. The method and apparatus of the present invention can be implemented to test integrated circuits comprising circuitry operating in first and second time domains wherein the first and second timing intervals of the timed test pattern correspond to the first and second time domains of the circuit, respectively.

Abstract: Metric calculation design for variable code rate decoding of broadband trellis, TCM (trellis coded modulated), or TTCM (turbo trellis coded modulation). A single design can accommodate a large number of code rates by multiplexing the appropriate paths within the design. By controlling where to scale for any noise of a received symbol within a received signal, this adaptable design may be implemented in a manner that is very efficient in terms of performance, processing requirements (such as multipliers and gates), as well as real estate consumption. In supporting multiple code rates, appropriately selection of the coefficients of the various constellations employed, using the inherent redundancy and symmetry along the I and Q axes, can result in great savings of gates borrowing upon the inherent redundancy contained therein; in addition, no subtraction (but only summing) need be performed when capitalizing on this symmetry.

Abstract: A calibration circuit and method causes a cutoff frequency to match the design frequency of low pass filter by adjusting a capacitor array in the low pass filter.

Abstract: A method and apparatus for controlling data flow in a network switch, wherein the method includes the steps of determining if a quantity of queued data for a port has exceeded a first predetermined threshold, disabling a data flow to the port if the quantity of queued data is determined to have exceeded the first predetermined threshold, and re-enabling the data flow to the port upon satisfying a predetermined spatial requirement and a predetermined temporal requirement. The apparatus includes at least one queue in connection with the at least one data port interface for receiving data transmitted to the at least one data port interface, and a memory management unit in connection with the at least one queue.

Abstract: A method of setting a delay offset in slave Delay-Locked Loop (DLL) modules by a master DLL module is disclosed. The method includes determining whether a delay tap value needs to be adjusted based on a comparison with a reference clock signal, calculating a delay offset value to correct the delay tap value, repeating the determining and calculating steps a predetermined number of times and forwarding a representative value of the calculated delay offset values. The representative value is determined through a comparison between all of the calculated delay offset values obtained in the repeating step.

Abstract: A design for a differential amplifier with a large input common mode signal range. The differential amplifier comprises two differential pairs, each having two amplifying MOSFETs. A source follower is connected to the gate terminal of each amplifying MOSFET in one of the differential pairs. A differential signal applied to the differential amplifier comprises two separate signal. Each separate signal is applied to the gate terminals of both the amplifying MOSFET in the differential pair not driven by the source follower and the driven MOSFET of the source follower. The differential amplifier further comprises a pair of switch MOSFETs connected to a current source MOSFET. The switch MOSFETs act to control the distribution of the total current flowing from the current source MOSFET and, consequently, to determine which differential pair works dominantly to amplify the input signals.

Abstract: A power detector having temperature compensation for improved measurement performance includes a pair of rectifier transistors coupled to a differential input signal biased by a first temperature dependent current. An output of the pair of rectifier transistors provides a first component of a differential DC output signal. The first component of the differential DC output signal includes a DC voltage proportional to an amplitude of the differential input signal plus an offset voltage. The power detector further includes a reference transistor biased by a reference current. The reference current includes a second temperature dependent current and a temperature independent offset current for temperature compensation. An output of the reference transistor provides a second component of the differential DC output signal that includes a reference voltage.