Abstract: A transmitter includes a detection element to determine when a current power requirement of a communication link is less than the standard transmit power. The current power requirement may be determined by a current operation condition of the communication link, for instance. The transmit power of the transmitter may be set to be less than the standard power in any of a variety of ways. For example, a center tap voltage of the transmitter may be reduced. In another example, a class of operation of the transmitter may be changed. In yet another example, the transmitter may include a current mirror having a plurality of diode-connected transistors coupled in parallel, thereby reducing the current at output terminals of the transmitter. Reducing the current at the output terminals decreases the output power of the transmitter, which may reduce the power consumed by the transmitter.

Abstract: A method for communication is disclosed and may include, in a network interface device, parsing a portion of a TCP segment into one or more portions of Internet Small Computer Systems Interface (iSCSI) Protocol Data Units (PDUs). A header and/or a payload for one or more of the parsed iSCSI PDUs may be recovered. Concurrent with parsing of a remaining portion of the TCP segment to recover a remaining portion of PDUs, the recovered header may be evaluated and/or the recovered payload may be routed external to the network interface device for processing. The evaluating and the routing may occur independently of the parsing within the network interface device. Respective separate physical processors may be used for the parsing and the recovering. The respective separate processors for recovering may be used for the evaluating and the routing.

Abstract: A system and method of analyzing a powered device (PD) in a Power-over-Ethernet (PoE) system are presented. The system includes an Ethernet interface having a physical layer (PHY) chip capable of providing a signal pulse in addition to physical layer 1 functions. The system further includes a pulse transformer, coupled to the PHY chip, capable of relaying the signal pulse provided by the PHY chip to the PD via the transmit line and a second PHY chip. The first PHY chip receives one or more return pulse signals from the PD, analyzes characteristics such as voltage and/or frequency of the return pulse signal(s), and determines attributes of the PD based on those characteristics. The attributes can include powered device validity and power classification. A method of supplying power to a PD is also presented.

Abstract: A system and method for providing physical (PHY) layer signal processing in a PHY layer signal processing circuit, at least portions of which may be shared for communication with a plurality of different types of communication networks. Various aspects of the present invention may, for example and without limitation, provide a PHY layer signal processing module that operates to perform a PHY layer signal processing operation on an input PHY layer signal. The PHY layer signal processing module may, for example, operate in a first operating mode to process the input PHY layer signal in a first manner in accordance with a first communication protocol. The PHY layer signal processing module may also, for example, operate in a second operating mode to process the input PHY layer signal in a second manner in accordance with a second communication protocol.

Abstract: Operational parameter adaptable LDPC (Low Density Parity Check) decoder. A novel means is presented by which LDPC coded signal can be decoded, and any one or more operational parameters can be adjusted during the decoding processing. For example, the original information extracted from a received LDPC coded signal (e.g., log likelihood ratios (LLRs)), can be modified during (or before) the iterative decoding processing performed in accordance with decoding an LDPC coded signal. Such modification of an operational parameter can include any one or combination of scaling, compression (and expansion/decompression), adding an offset to or subtracting an offset from, scaling, rounding, and/or some other modification of an operational parameter. The bit (or variable) edge messages and/or the check edge messages can also undergo modification during decoding processing.

Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.

Abstract: A handheld computing unit includes a processing module, a main memory interface coupled to main memory, a baseband processing module, an RF section, I/O interfaces, a bus structure, and a connection structure. The main memory includes an operating system section and a user section. The operating system section stores at least a portion of a remote mode operating system when in a remote mode and stores at least a portion of a docked mode operating system when in a docked mode. The docked mode operating system includes at least some of the remote mode operating system.

Abstract: A method and system for interfacing to a plurality of antennas is provided. The method may comprise scheduling signals within different frequency ranges communicated from different antennas to use different timeslots in a TDM frame, such as a GSM frame. A plurality of antennas may be used, and at least one high frequency antenna may be adapted to operate at frequencies above 700 MHz and at least one low frequency antenna may be adapted to operate at frequencies below 700 MHz. The high frequency antenna may support WCDMA, HDSPA, HSUPA, GSM, GPRS, EDGE, Wi-Fi, Bluetooth, GPS, and/or DVB communication. The low frequency antenna may support FM or NFC. NFC may be enabled by applying a DC bias voltage to the low frequency antenna. The method may also comprise dynamically tuning the antennas to frequency bands corresponding to particular communication protocols. The dynamic tuning may further comprise compensating the antennas for changes in frequency.

Abstract: A power amplifier (PA) provides dynamic stability and gain control for linear and non-linear operation. The PA operates with a baseband processor and a transmitter, in which the PA receives a signal from the transmitter for power amplification prior to transmission of the signal. The PA is configured to select between the linear mode of operation and the non-linear mode of operation, in which device scaling within the PA is achieved by changing a device sizing of at least one stage of the PA. Further to changing the device size, the PA changes biasing resistance and impedance of a matching network in response to the changing of the device size to control power output and stability for the PA.

Abstract: A method is provided for payload header suppression within a wireless network in which a limited number of suppression indices are used to map suppression rules to data streams. Network resources are conserved by implementing precise classification algorithms to correctly identify incoming packets at the wireless device as belonging to a particular data stream, which ensures that a minimum number of suppression indices are utilized. Additionally, network resources are conserved by utilizing sophisticated algorithms for reusing suppression indices when new data streams are detected by the wireless device. One such reuse algorithm involves recycling the suppression index that has been least recently used in transmitting a packet with a suppressed payload header.

Abstract: The present invention provides methods and systems for decoding a data burst in a communication system. A data burst, including a plurality of forward error correction (FEC) blocks, is received. At least one FEC block of the data burst is decoded. Thereafter, it is detected if one or more errors are present in the at least one FEC block of the data burst. Upon detecting one or more errors in the at least one FEC block, the method halts the decoding of the data burst. In response to detecting the one or more errors, a retransmitted data burst corresponding to the data burst is received. One or more FEC blocks of the data burst may be combined with corresponding one or more FEC blocks of the retransmitted data burst. The one or more FEC blocks of the data burst includes the at least one FEC block that had the one or more errors detected as present.

Abstract: Aspects of a method and system for processing signals in a television system using a subset of receive operations for detecting digital and analog television signals are provided. The system and method may be deployed in, for example, cable TV set-top boxes, cable TV modems, and television receivers, which may be coupled to a cable TV or over-the-air terrestrial network. Performing only a subset of receiver operations may allow detection of the type of signal; for example digital QAM, digital VSB, or analog; present in a television channel. In this regard, it is not necessary to generate and validate a bit stream in order to detect if a signal is present and/or the type of signal present.

Abstract: Methods and apparatus for network communications are disclosed. In an example embodiment, a network switch assembly for network communications comprises a fabric blade. In the example embodiment, the at least one switch comprises a plurality of data port interfaces, where the plurality of data port interfaces are configured to transmit and receive data over a plurality of fabric data ports. The at least one switch of the fabric blade also includes a central processing unit (CPU) interface configured to communicate with an external CPU subsystem. The example network switch assembly also includes a plurality of port blades. Each port blade of the plurality of port blades includes a local CPU and at least one switch. In the example network switch assembly, the at least one switch of each port blade includes a plurality of data port interfaces, where the plurality of data port interfaces being configured to transmit and receive data over a plurality of port data ports.

Abstract: A power amplifier circuit including a first transistor, a second transistor, and a power control circuit. The first transistor includes a first input and a first output. The second transistor includes a second input coupled in series with the first output of the first transistor. The input circuit is coupled to the first input of the first transistor. The power control circuit is coupled to the second input of the second transistor. The control circuit includes a time delay circuit and a variable source.

Abstract: An integrated circuit device for use in connecting synchronous optical networks to packet networks and synchronous time division multiplexed subscriber lines and a method of operation of same is disclosed. An embodiment of the invention may include SONET/SDH compatible optical carrier framing, cross connect, and packet mapping functionality. In addition, it may support Ethernet packet network connections and DS1/E1 and DS3/E3 time division multiplexed subscriber circuits, and may include a telecom bus compatible interface for the connection of additional communications devices. An embedded microprocessor core and embedded memory may permit the present invention to support enhanced remote diagnostic, trouble reporting, traffic management, and software update capabilities.

Abstract: A system and method for managing a user interface resource. Various aspects of the present invention comprise establishing a wireless communication link between a user interface resource and a first system. The user interface resource may, for example, be utilized to communicate user interface information with the first system. An inter-system communication link may be established between the first system and a second system. The user interface resource, or alternative source, may communicate a predetermined signal to the first system. The first system may, for example after receiving the predetermined signal, communicate a hand-off signal to the second system over the inter-system communication link. The hand-off signal may indicate that the user interface resource is to be used with the second system. The second system may establish a wireless communication link with the user interface resource, and the user interface resource may be utilized with the second system.

Abstract: A packet-based, hierarchical communication system, arranged in a spanning tree configuration, is described in which wired and wireless communication networks exhibiting substantially different characteristics are employed in an overall scheme to link portable or mobile computing devices. The network accommodates real time voice transmission both through dedicated, scheduled bandwidth and through a packet-based routing within the confines and constraints of a data network. Conversion and call processing circuitry is also disclosed which enables access devices and personal computers to adapt voice information between analog voice stream and digital voice packet formats as proves necessary. Routing pathways include wireless spanning tree networks, wide area networks, telephone switching networks, internet, etc., in a manner virtually transparent to the user.

Abstract: The present invention relates to a system and method for processing the read and write operations in a memory architecture. The system processing the read and write operations includes at least one local memory block and a synchronously controlled global controller coupled to the local memory block and adapted to extend the high portion of a clock pulse. The method for processing the read and write operations includes skewing a clock pulse using at least one word line interfacing with the global controller.

Abstract: A radio transceiver device includes circuitry for radiating electromagnetic signals at a very high radio frequency both through space, as well as through wave guides that are formed within a substrate material. In one embodiment, the substrate comprises a dielectric substrate formed within a board, for example, a printed circuit board. In another embodiment of the invention, the wave guide is formed within a die of an integrated circuit radio transceiver. A plurality of transceivers with different functionality is defined. Substrate transceivers are operable to transmit through the wave guides, while local transceivers are operable to produce very short range wireless transmissions through space. A third and final transceiver is a typical wireless transceiver for communication with remote (non-local to the device) transceivers.

Abstract: A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P+ gate electrode formed over the thick gate oxide layer and coupled to a first voltage supply line, and P+ pick-up terminals formed in the P-type region adjacent the gate electrode and coupled to a second voltage supply line. The low-pass filter semiconductor device acts as a capacitor, whereby a gate-to-substrate voltage is maintained at less than zero volts to maintain a stable control voltage for the circuit.