Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.

Abstract: LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices. An LDPC matrix corresponding to an LDPC code is employed within a communication device to encode and/or decode coded signals for use in any of a number of communication systems. The LDPC matrix is composed of a number of sub-matrices and may be partitioned into a left hand side matrix and a right hand side matrix. The right hand side matrix may include two sub-matrix diagonals therein that are composed entirely of CSI (Cyclic Shifted Identity) sub-matrices; one of these two sub-matrix diagonals is located on the center sub-matrix diagonal and the other is located just to the left thereof. All other sub-matrices of the right hand side matrix may be null sub-matrices (i.e., all elements therein are values of zero “0”).

Abstract: A system and method for increasing bandwidth usage between an access point and a wireless device are described. One embodiment can include an access point, a prioritizer, and a priority storage device. These components can increase bandwidth usage between an access point and a wireless device by allocating previously unused transmission slots.

Abstract: An efficient optimal maximum-likelihood output detector reducing the complexity of demodulation/decoding computations in multiple-input multiple-output communication systems. A plurality of received signals may be combined into a plurality of combined received signals by multiplication of a matrix representing the plurality of received signals with another matrix that meets certain conditions. The plurality of combined received signals may then allow for slicing operations as well as calculation of distance metrics with significantly reduced complexity.

Abstract: An integrated circuit radio transceiver and method therefor is operable to determine an antenna configuration for receive operations. More specifically, the system is operable to determine a receive antenna configuration in a network that includes a number of spatial streams, antenna configuration information, code rate, quadrature modulation type, and transmission protocol modulation scheme, etc. Generally, a selected antenna configuration for transmissions to a remote transceiver is used as an initial antenna configuration for receive operations.

Abstract: In an RF communication system, aspects for cellular network and intelligent integrated broadcast television downlink with intelligent service control with feedback may comprise a mobile terminal (MT) generating a request for media comprising a specified quality of service (QoS) to be delivered to the mobile terminal. The request may be sent via a cellular service. The QoS may be negotiated between the MT and the cellular service and/or a broadcast service, where the cellular service and/or the broadcast service may provide the requested media. The specified QoS may be determined based on, for example, a received channel condition. The media may be received by the MT via a single integrated cellular and VHF/UHF baseband processor, and the received media may be consumed by the MT. The broadcast service may comprise, for example, a cellular broadcast service and VHF/UHF broadcast services such as, for example, DVB, ISDB, ISDB terrestrial, and ATSC services.

Abstract: Aspects of a method and system for medium access control (MAC) rate selection are presented. Aspects of the system may include at least one processor that enables selection of MAC layer parameter values and/or PHY layer parameter values, to maintain a rate of data transmission of at least one transmitted signal, which is no greater than a selected data transfer rate. The error rate of the one or more transmitted signals may be maintained within a specified range based on the selection for varying signal to noise (SNR) ratios.

Abstract: Virtual limited buffer modification for rate matching. A reduced-size memory module is employed within a communication device to assist in storage of log-likelihood ratios (LLRs) employed in accordance with turbo decoding. This architecture is also applicable to other types of error correction code (ECC) besides turbo code as well. The memory size is selected to match the number of coded bits (e.g., including information bits and redundancy/parity bits) that is included within a transmission. The received signals may be various transmissions made in accordance with hybrid automatic repeat request (HARQ) transmissions. When the LLRs calculated from a first HARQ transmission is insufficient to decode, those LLRs are selectively stored in the memory module. When LLRs corresponding to a second HARQ transmission is received, LLRs corresponding to both the first HARQ transmission and the second HARQ transmission are passed from the memory module for joint use in decoding.

Abstract: A video processing system includes a video encoder that encodes a video stream into an independent video layer stream and a first dependent video layer stream that requires the independent video layer for decoding. A scrambling module scrambles the independent video layer stream to produce a scrambled independent video layer stream and leaves the first dependent video layer stream unscrambled.

Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.

Abstract: Aspects of a method and apparatus for a configurable connector for Ethernet are provided. In this regard, a configurable Ethernet connector residing in an Ethernet enabled communication device may couple the communication device to one or more twisted pairs and enable communication of Ethernet frames over the twisted pair(s). Conductors of each of the twisted pairs may make contact with adjacent pins of the configurable Ethernet connector. A size and shape of the configurable Ethernet connector may enable housing of more than 48 instances of the configurable Ethernet connector in a single standard size one rack unit face plate of a 19-inch rack. The configurable Ethernet connector may provide mechanical and electrical indications that enable a device coupled to the configurable Ethernet connector to determine configuration information of the configurable Ethernet connector. The information may indicate presence or absence of various components within and/or on the configurable Ethernet connector.

Abstract: A system and method for discovering a cable type and resistance for Power over Ethernet (PoE) applications. Cabling power loss in PoE applications is related to the resistance of the cable itself. A PHY can be designed to measure electrical characteristics (e.g., insertion loss, cross talk, length, etc.) of the Ethernet cable to enable determination of the cable resistance. The determined resistance can be used in powering decisions and in adjusting power budgets allocated to power source equipment ports.

Abstract: A location tracking apparatus and method are disclosed. In one embodiment, the method comprises receiving information from each repeater indicating which packets wirelessly transmitted by a mobile station were received by each repeater including received signal strength of each of those packets, and determining location of the mobile station with respect to the repeaters based on power levels of individual wirelessly transmitted packets received at the repeaters.

Abstract: Aspects of a method and system for redundancy-based decoding of voice content in a wireless local area network (WLAN) system are provided. A WLAN receiver may determine whether a decoded portion of a received packet comprises voice content and may select a redundancy-based decoder to decode a remaining portion of the packet when voice content is detected. The redundancy-based decoder may be a Viterbi decoder. The redundancy-based decoder may be selected to decode a determined number of subsequent packets or to decode subsequent packets for a determined amount of time. After decoding the remaining portion of the packet and any subsequent packets, the WLAN receiver may select a standard Viterbi decoder to decode additional received packets. The WLAN receiver may generate at least one signal to select the redundancy-based decoder and the standard Viterbi decoder.

Abstract: A method for configuring a multiple input multiple output (MIMO) wireless communication begins by generating a plurality of preambles for a plurality of transmit antennas. Each of the plurality of preambles includes a carrier detection sequence at a legacy transmit rate, a first channel sounding at the legacy transmit rate, a signal field at the legacy transmit rate, and Z?1 channel soundings at a MIMO transmit rate, where L corresponds to a number of channel soundings. The method continues by simultaneously transmitting the plurality of preambles via the plurality of transmit antennas.

Abstract: Certain aspects of a method and system for increased resolution switching using MEMS and switched capacitors may include a mobile terminal that includes an integrated circuit bonded to a multi-layer package. A capacitance of a first switched capacitor array in the multi-layer package may be tuned via one or more MEMS switches integrated in and/or on the multi-layer package. A capacitance of a second switched capacitor array in the integrated circuit may be tuned via one or more NMOS switches. A plurality of signals may be transmitted and/or received via one or more antennas in the mobile terminal.

Abstract: Certain aspects of a method and system for using shared secrets to protect the access of testing keys for a set-top box may comprise receiving within a security processor within a set-top box a plurality of secret keys from a plurality of users. A password may be generated utilizing secret sharing based on the received plurality of secret keys. The generated password may be compared with a generated response. The plurality of users may be authenticated access to the set-top box based on the comparison.

Abstract: Herein described is at least a method and system for processing a read or write operation when one or more defects are mapped using one or more fractional sectors. The method comprises using one or more fractional sectors to map defects and to store data symbols. Furthermore, a first algorithm is used for translating a logical block address into a physical starting location such that one or more fractional sectors may be processed during a read or write operation. A second algorithm is used for temporally processing one or more portions of a track of a disk drive, wherein the one or more portions may comprise one or more defective fractional sectors, non-defective fractional sectors, frame remainders, and servo sectors. The system comprises a memory, a processor, and software resident in memory. The process executes the software that implements the first and second algorithms.

Abstract: A system and method for implementing a common control bus in a multi-regulator power supply integrated circuit. The integrated circuit may, for example, comprise first and second power regulator modules that control at least one characteristic of respective power signals. The integrated circuit may also, for example, comprise a communication interface module that receives power control information related to operation of the first and second power regulator modules over a shared data bus. An exemplary method may, for example, comprise receiving power control information over a data bus. The method may also, for example, comprise determining which of a plurality of power regulators corresponds to the received power control information. The method may further, for example, comprise determining a regulator control signal, based at least in part on the received power control information, and provide the regulator control signal to the determined regulator(s) to control operation of the determined regulator(s).

Abstract: Systems and methods are disclosed for non-preemptive DRAM transactions. More specifically, the present invention relates to improvements in non-preemptive DRAM transactions in real-time unified memory architectures. One embodiment of the present invention relates to a method for determining access to non-preemptive DRAM devices. This method comprises determining real time need for access to the device and prioritizing access using a rate monotonic scheduling.