Abstract: A method for transmitting high rate data within a multiple input multiple output (MIMO) wireless local area network (WLAN) begins by determining a data transmission rate. The method continues by, when the data transmission rate is between a first data rate and a second data rate, enabling two transmission paths. The method continues by, for each of the two transmission paths, determining at least one of: level of constellation, number of data subcarriers, rate code, and cyclic prefix duration.

Abstract: A receiver includes a filter stage that receives, filters, and equalizes a received signal, and a decisional feedback loop coupled to the filter stage that receives and processes a signal output from the filter stage using remodulation. The decisional feedback loop includes a converter that generates a baseband signal, a detector that generates a decision signal, a restorative signal generator that generates a restorative signal using remodulation, and a carrier loop that generates a frequency correction signal and provides a frequency-offset estimate. The restorative signal and the frequency correction signal are provided to the converter to compensate for inter-symbol interference. The presented “remodulation” technique decouples interaction between the carrier loop, the pre-filters, and the equalizer of the restorative signal generator, providing an architecture that is more stable and significantly faster than conventional architectures.

Abstract: A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.

Abstract: Presented herein is a reduced memory implementation technique of filterbank and block switching for real-time audio applications. Calculation of the pulse code modulated samples from the IMDCT samples and inverse window functions is simplified by exploiting the symetric qualities of the IMDCT function. As a result, memory requirements and operations are significantly reduced.

Abstract: Certain embodiments of the invention may be found in a method and system for handling deadlock conditions in a data processing system. Aspects of the method may comprise identifying a potential deadlock state in a distribute and merge data processing system. An actual deadlock state may be detected once the potential deadlock state is identified. The detected actual deadlock state may be indicated by generating a signal. The method may comprise initiating recovery from deadlock conditions by generating at least one signal that indicates when data is accepted in response to the indication of the actual deadlock state.

Abstract: A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with a parallel routing scheme for calculating routing information for incoming packets. Using the programmable hash and route routing scheme, a hash and route circuit can be programmed for a variety of applications, such as routing, flow-splitting or load balancing.

Abstract: A tuner front-end circuit for processing a radio frequency (RF) signal includes a first filter block that terminates the RF signal for unwanted frequency bands; a second filter block that provides selectivity within the unterminated signal by separating the unterminated signal into a plurality of separate signals, each of a different desired frequency band; and an amplifier block that amplifies each of the separate signals. One or more of the amplified separate signals can be provided to a tuner. The circuit can also include a daisy chain output block that provides the amplified separate signals to one or more additional tuners. One or more tracking filter blocks can also be included to provide further selectivity to the amplified separate signals and to reject signals at specific harmonics to prevent degradation of a signal-to-noise ratio. A method of processing an RF signal is also presented.

Abstract: According to one exemplary embodiment, a power management unit residing in an electronic device includes a battery detection controller coupled to a battery charger and a regulator block, where the regulator block is capable of providing power to the electronic device. The battery detection controller is configured to turn off the regulator block when the battery charger is coupled to an external power source and is not coupled to a battery of the electronic device. The battery detection controller can be further configured to turn on the regulator block when the battery charger is coupled to the external power source and is coupled to the battery if the battery has a battery voltage greater than a threshold voltage.

Abstract: A new pulse width modulation return scheme in which the source of PWM FET is directly connected to the 48 Volt return and therefore Ids of PWM FET does not pass through the hot-swap FET which therefore significantly reduce the power dissipation on the die of PD chip.

Abstract: Aspects of the invention provide a method and system for securely managing the storage and retrieval of data. Securely managing the storage and retrieval of data may include receiving a first disaster recovery code and acquiring a first password corresponding to the first disaster recovery code. A first disaster recovery key may be generated based on the first disaster recovery code and the first password. Another aspect of the invention may also include generating the received first disaster recovery code based on said first password and the first disaster recovery key. The generated disaster recovery code may be securely stored on at least a portion of a storage device or a removable media. Data stored on the storage device may be encrypted using the first generated disaster recovery key. Additionally, data read from the storage device may be decrypted using the generated first disaster recovery key.

Abstract: A method for determining attenuation of a transmit/receive switch for attenuating inbound RF signals begins by enabling the transmit/receive switch to provide a loop back configuration between a transmitter section and a receiver section of a radio frequency integrated circuit. When the transmit section provides a test RF signal to the receiver section the processing continues when the receiver section measures the signal strength of the test RF signal to produce a 1st signal strength. The processing continues by enabling receive attenuation mode of the transmit/receive switch. The processing continues when the transmit section provides another test RF signal to the receiver section via the transmit/receive switch in the receive attenuation mode to produce an attenuated test RF signal. The processing continues when the receive section measures the signal strength of the attenuated test RF signal to produce a 2nd signal strength.

Abstract: Aspects of the invention include assigning a priority to a primary packet for a particular channel and replicating the primary packet to create a secondary packet for the particular channel. A primary packet may be selected in order to co-relate the primary packet to a legacy system. Similarly, a secondary packet may be selected in order to co-relate the secondary packet to a new system. The priority assigned to the primary packet may uniquely distinguish the primary packet from a priority of the other packets for the particular channel. The primary packet and the secondary packet may have the same priority and the same continuity counter.

Abstract: A network switch for network communications includes a protocol determining means for determining whether an incoming packet is an IP packet or an IPX packet. L3 lookup tables, IP router tables, and IPX router tables are provided. A concurrent lookup is performed of the L3 lookup table, and either the IP router table or the IPX router table, depending upon the determination of the packet type. If a match is found on the L3 table, the packet is forwarded based on the L3 match. If no match is found on the L3 lookup, then a longest prefix cache lookup is performed on the appropriate IP or IPX router table, and the packet is forwarded based upon the match of the longest prefix cache lookup. If no match is provided, then the packet is forwarded to the CPU interface.

Abstract: A multi-band integrated circuit radio transceiver comprising receive and transmit radio front end circuit blocks further includes a local oscillation generator for generating a local oscillation for use by the receive and transmit radio front end circuit blocks to down convert received RF signals to baseband or low intermediate frequency signals and for use by the transmit front end circuit blocks to up-convert outgoing communication signals to RF, respectively. The transceiver further includes at least one buffering element coupled disposed in the local oscillation path that produces a buffered oscillation based upon the local oscillation to at least one front end circuit block wherein the buffering element includes a differentially arranged amplifier stage having a load and a cross-coupled capacitive element coupled between input and output nodes of the amplifier stage and at least one of an inductive device or a selectable capacitive device.

Abstract: A tester unit for evaluating data integrity of a block of data is described. The tester unit comprises a checksum determination facility adapted for deriving a checksum value from a block of data stored in a memory, and a checksum evaluation facility adapted for comparing the derived checksum value with a predetermined checksum value, and for initiating a reload of the block in case the derived checksum value differs from the predetermined checksum value.

Abstract: A communication system performs burst noise cancellation. A transmitter produces and transmits a spread signal that comprises at least one known-value symbol spread by a plurality of non data-carrying orthogonal codes and data symbols spread by at least one data-carrying orthogonal code. The transmitter transmits the spread signal across a communication link that introduces burst noise. A burst noise detector determines burst noise affected chips of the orthogonal codes. A weight computation functional block calculates a plurality of complex-valued combining weights based upon the burst noise affected chips. A vector de-spreader and a linear combiner operate in combination to use the plurality of non data-carrying orthogonal codes, the at least one data-carrying orthogonal code, and the plurality of complex-valued combining weights to de-spread the received spread signal to produce the data symbols with the burst noise substantially removed.

Abstract: Decoder design adaptable to decode coded signals using min* or max* processing. A very efficient means of min* processing or max* processing may be performed within a communication device to assist in the very complex and cumbersome calculations that are employed when decoding coded signals. The types of coded signals that may be decoded using min* processing or max* processing are varied, and they include LDPC (Low Density Parity Check) coded signals, turbo coded signals, and TTCM (Turbo Trellis Coded Modulation) coded signals, among other coded signal types. Many of the calculations and/or determinations performed within min* processing or max* processing are performed simultaneously and in parallel of one another thereby ensuring very fast operation. In a finite precision digital implementation, when certain calculated bits of min* or max* processing are available, they govern selection of resultants from among multiple calculations and determinations made simultaneously and in parallel.

Abstract: A resonator-synchronized oscillator for resonance mode selection is disclosed. In one embodiment, the resonator-synchronized oscillator comprises an oscillation loop, at least one capacitor switching circuit coupled to the oscillation loop, and a multi-mode resonator having an output coupled to the at least one capacitor switching circuit. The output signal of the resonator is used to synchronize the oscillator using switched capacitor structures to instantaneously reset the phase of the resonator-synchronized oscillator.

Abstract: A method and apparatus for selecting a queue for service across a shared link. The method includes determining a priority for each queue (202) within a plurality of ingresses (102), wherein the priority is instantaneous for a given timeslot for data transfer, selecting a queue having a first priority for each group of queues within each ingress (104) having packets destined for a particular egress (104), selecting a queue having a second priority for each subset of queues having first priorities and having packets destined for the particular egress (104), and selecting the queue having the second priority for service across the shared link in the given timeslot.

Abstract: A system and method are used to determine connectivity and/or cable faults of a cable. A signal transmitting and receiving system is coupled to the cable. An analog-to-digital converter (ADC) coupled to the signal transmitting and receiving system. A TDR system coupled to the ADC and a memory, and a controlling system coupled to at least one of the ADC, the TDR system, and the signal receiving and transmitting system. The controlling system includes a controller and one or more state machines that are used to control the TDR system.