Patents Assigned to Business Machines Corporation
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Publication number: 20080310621Abstract: A computer implemented method for performing a privacy enhanced comparison of a plurality of data sets includes allocating a private encryption key to each of the data sets; performing an encryption operation for each of the data sets, the encryption operation comprising generating a commutatively encrypted data set of the respective data set, wherein the commutatively encrypted data sets are generated by successively applying a keyed commutative encryption function on the respective data set with the private encryption key of the respective data set itself and with the private encryption keys of the other data sets; and comparing the commutatively encrypted data sets.Type: ApplicationFiled: March 26, 2008Publication date: December 18, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chris P. Vanden Berghe, Tadeusz J. Pietraszek, Jan Leonhard Camenisch, Dieter Sommer
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Publication number: 20080313234Abstract: An XML schema is compiled into an annotated automaton encoding, which includes a parsing table for structural information and annotation for type information. The representation is extended to include a mapping from schema types to states in a parsing table. To validate a fragment against a schema type, it is necessary simply to determine the state corresponding to the schema type, and start the validation process from that state. When the process returns to the state, fragment validation has reached successful completion. This approach is more efficient than a general tree representation. Only the data representation of the schema information is handled, making it much easier than manipulating validation parser code generated by a parser generator. In addition, only one representation is needed for schema information for both document and fragment validation. This approach also provides a basis for incremental validation after update.Type: ApplicationFiled: August 25, 2008Publication date: December 18, 2008Applicant: International Business Machines CorporationInventors: Yao-Ching Stephen CHEN, Fen-Ling Lin, Ning Wang, Guogen Zhang
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Publication number: 20080310624Abstract: An encryption apparatus and method for providing an encrypted file system are provided. The encryption apparatus and method of the illustrative embodiments uses a combination of encryption methodologies so as to reduce the amount of decryption and re-encryption that is necessary to a file in the Encrypted File System in the event that the file needs to be modified. The encryption methodologies are interleaved, or alternated, with regard to each block of plaintext. In one illustrative embodiment, Plaintext Block Chaining (PBC) and Cipher Block Chaining (CBC) encryption methodologies are alternated for encrypting a sequence of blocks of data. The encryption of a block of plaintext is dependent upon the plaintext or a cipher generated for the plaintext of a previous block of data in the sequence of blocks of data so that the encryption is more secure than known Electronic Code Book encryption methodologies.Type: ApplicationFiled: August 20, 2008Publication date: December 18, 2008Applicant: International Business Machines CorporationInventors: Ufuk Celikkan, William C. Conklin, Shawn P. Mullen, Ravi A. Shankar
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Publication number: 20080312904Abstract: A method of classifying text input for use with a natural language understanding system can include determining classification information including a primary classification and one or more secondary classifications for a received text input using a statistical classification model (statistical model). A statistical classification sub-model (statistical sub-model) can be selectively built according to a model generation criterion applied to the classification information. The method further can include selecting the primary classification or the secondary classification for the text input as a final classification according to the statistical sub-model and outputting the final classification for the text input.Type: ApplicationFiled: June 18, 2007Publication date: December 18, 2008Applicant: International Business Machines CorporationInventors: Rajesh Balchandran, Linda M. Boyer, Gregory Purdy
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Publication number: 20080311773Abstract: Embodiments may include connectors with discharge elements integrated into the connectors to interconnect conductors of a cable to attenuate or discharge an electrostatic charge built up on the conductors. In some embodiments, the conductors are momentarily connected to ground as the connector couples with another connector to interconnect a cable with, e.g., a computer. In further embodiments, the discharge elements interconnect the conductors of a cable to redistribute an electrostatic charge and thereby minimize the impact of a discharge when the cable couples with an electronic system such as a computer. Another embodiment comprises a male connector with discharge elements, which ground conductors of the cable as the cable is being inserted into the connector. The discharge elements are pushed out of the way of the conductors as the conductors couple with the connector.Type: ApplicationFiled: June 26, 2008Publication date: December 18, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mithkal M. Smadi, Anthony C. Spielberg
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Publication number: 20080310104Abstract: A cooling apparatus is provided for facilitating cooling of electronics drawers of an electronics rack. The apparatus includes a bi-fold door assembly configured for mounting to the electronics rack. The door assembly includes a first door and a second door, each configured for separate, hinged mounting to the electronics rack. The apparatus further includes a coolant distribution apparatus, wherein a coolant supply manifold thereof is mounted to the first door and a coolant return manifold thereof is mounted to the second door. Separate connections are coupled in fluid communication with the coolant supply and return manifolds for facilitating supply and return of coolant to and from the manifolds, and for facilitating pivotal movement of the doors relative to the electronics rack. A plurality of coolant distribution ports are provided within the supply and return manifolds, and disposed to facilitate supply and return of coolant to the electronics drawers.Type: ApplicationFiled: July 17, 2008Publication date: December 18, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Levi A. Campbell, Richard C. Chu, Michael J. Ellsworth, JR., Madhusudan K. Iyengar, Roger R. Schmidt, Robert E. Simons
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Publication number: 20080310439Abstract: There is disclosed a method, apparatus and computer program for communicating messages between a first messaging system and a second messaging system. The messaging system comprises a set of source queues with each source queue owning messages retrievable in priority order. It is determined that a message should be transferred from the first messaging system to the second messaging system. A source queue is selected which contains a message having at least an equal highest priority when compared with messages on the source queues. A message having the at least equal highest priority from the selected source queue of the first messaging system is then transferred to a target queue at the second messaging system.Type: ApplicationFiled: June 16, 2008Publication date: December 18, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Martin J. Gale, David Locke
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Publication number: 20080313245Abstract: Various embodiments of a computer system and computer program product backup a dataset. An input image copy of the dataset is read, wherein the input image copy is prior to a start of dataset reorganization. A cursor value associated with reorganization of said dataset is determined. A backup copy is produced based on the input image copy, the changes from the log and the cursor value.Type: ApplicationFiled: August 22, 2008Publication date: December 18, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John Terry Langley, David Wayne Moore
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Publication number: 20080312980Abstract: A system for generating staffing and cost estimations and reports for multi-dimensional project plans for implementing packaged software applications, the system includes: a view layer configured to act as a user interface for user inputs and system outputs; a model and control layer configured to implement rules based on a series of estimation and implementation models, and to perform calculations to determine costs and staffing requirements for multi-dimensional project plans; an estimation knowledge base layer configured to hold and derive the series of estimation and implementation models; and wherein the system for scoring and ranking multi-dimensional project plans for implementing packaged software applications is carried out over networks comprising: the Internet, intranets, local area networks (LAN), and wireless local area networks (WLAN).Type: ApplicationFiled: June 13, 2007Publication date: December 18, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Paul R. Boulineau, John D. Cann, Rajat Dugar, Jed Kreamer, Juhnyoung Lee, Rakesh Mohan, Andrew Raymond, Thomas D. Rosinski, Clayton W. Sheriff, Vikas J. Shivpuriya, Gerhard Sigl
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Patent number: 7466010Abstract: The present invention provides a bipolar transistor having a raised extrinsic base silicide and an emitter contact border that are self-aligned. The bipolar transistor of the present invention exhibit reduced parasitics as compared with bipolar transistors that do not include a self-aligned silicide and a self-aligned emitter contact border. The present invention also is related to methods of fabricating the inventive bipolar transistor structure. In the methods of the present invention, a block emitter polysilicon region replaces a conventional T-shaped emitter polysilicon.Type: GrantFiled: July 5, 2005Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: David C. Ahlgren, Gregory G. Freeman, Marwan H. Khater, Richard P. Volant
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Patent number: 7467272Abstract: Exemplary methods, systems, and products are described that operate generally by moving subroutine return address protection to the processor itself, in effect proving atomic locks for subroutine return addresses stored in a stack, subject to application control. More particularly, exemplary methods, systems, and products are described that write protect subroutine return addresses by calling a subroutine, including storing in a stack memory address a subroutine return address and locking, by a computer processor, the stack memory address against write access. Calling a subroutine may include receiving in the computer processor an instruction to lock the stack memory address. Locking the stack memory address may be carried out by storing the stack memory address in a protected memory lockword. A protected memory lockword may be implemented as a portion of a protected content addressable memory.Type: GrantFiled: December 16, 2004Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: Denise Marie Genty, Shawn Patrick Mullen, James Stanley Tesauro
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Patent number: 7467050Abstract: A circuit for detecting noise events in a system with time variable operating points is provided. A first voltage, which is averaged over time, is compared to a second voltage. A signal is generated to instruct circuits within a processor to initiate actions to keep a voltage from drooping further.Type: GrantFiled: May 30, 2006Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: Daniel Douriet, Anand Haridass, Andreas Huber, Colm B. O'Reilly, Bao G. Truong, Roger D. Weekly
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Patent number: 7467138Abstract: A method and associated algorithm for in-place sorting S sequences of binary bits stored contiguously in an array within a memory device of a computer system prior to the sorting. Each sequence includes contiguous fields of bits. The algorithm is executed by a processor of a computer system. The in-place sorting executes program code at each node of a linked execution structure. Each node includes a segment of the array. The program code is executed in a hierarchical sequence with respect to the nodes. Executing program code at each node includes: dividing the segment of the node into groups of sequences based on a mask field having a mask width, wherein each group has a unique mask value of the mask field; and in-place rearranging the sequences in the segment, wherein the rearranging results in each group including only those sequences having the unique mask value of the group.Type: GrantFiled: December 14, 2004Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventor: Dennis J. Carroll
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Patent number: 7467157Abstract: A method for automatically generating semantically valid XPath expressions in a computer system is provided. The method includes populating an instance of a sequence-type model by organizing XML data into a hierarchical structure consistent with the sequence-type model. The method also includes priming the instance of the sequence-type model to remove ambiguities and redundancies, while retaining semantic validity of the instance of the sequence-type model. The method further includes scanning the instance of the sequence-type model to identify one or more location paths that match a search pattern, where an initial scan originates at a root of the hierarchical structure and subsequent scans originate from a termination point of a prior scan to incrementally search for location steps by searching along XPath axes. The method additionally includes determining whether a sequence type at each location step matches the search pattern and outputting a result as semantically valid XPath expression output.Type: GrantFiled: August 20, 2007Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: Wallace Chen, Ciby Mathew
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Patent number: 7466534Abstract: Disclosed are embodiments of a capacitor with inter-digitated vertical plates and a method of forming the capacitor such that the effective gap distance between plates is reduced. This gap width reduction significantly increases the capacitance density of the capacitor. Gap width reduction is accomplished during back end of the line processing by masking connecting points with nodes, by etching the dielectric material from between the vertical plates and by etching a sacrificial material from below the vertical plates. Etching of the dielectric material from between the plates forms air gaps and various techniques can be used to cause the plates to collapse in on these air gaps, once the sacrificial material is removed. Any remaining air gaps can be filled by depositing a second dielectric material (e.g., a high k dielectric), which will further increase the capacitance density and will encapsulate the capacitor in order to make the reduced distance between the vertical plates permanent.Type: GrantFiled: June 6, 2006Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventor: Anil K. Chinthakindi
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Patent number: 7467277Abstract: The present invention generally relates to memory controllers operating in a system containing a variable system clock. The memory controller may exchange data with a processor operating at a variable processor clock frequency. However the memory controller may perform memory accesses at a constant memory clock frequency. Asynchronous buffers may be provided to transfer data across the variable and constant clock domains. To prevent read buffer overflow while switching to a lower processor clock frequency, the memory controller may quiesce the memory sequencers and pace read data from the sequencers at a slower rate. To prevent write data under runs, the memory controller's data flow logic may perform handshaking to ensure that write data is completely received in the buffer before performing a write access.Type: GrantFiled: February 7, 2006Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: Melissa Ann Barnum, Mark David Bellows, Paul Allen Ganfield, Lonny Lambrecht, Tolga Ozguner
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Patent number: 7466284Abstract: A chip seal ring that maintains the chip seal ring as a continuous barrier to contamination, while at the same time creating a desirable electrical feature in the seal ring that enables the use of an on-chip loop antenna. In one embodiment, at least a portion of the chip seal ring has a serpentine configuration, such as a square wave, triangle wave, or curved geometry, that increases the reactance and resistance of the seal ring so as to mitigate the adverse induced currents created by the magnetic coupling effects between the on-chip antenna and the seal rings, thereby improving the efficiency of an on-chip loop antenna in the presence of the seal ring.Type: GrantFiled: November 30, 2006Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventor: Robert L. Barry
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Patent number: 7467201Abstract: A method for providing status information to a device attached to an information technology infrastructure utilizing a device monitoring application resident at the device is disclosed. The device monitoring application utilizes signature data to monitor data associated with a device and selectively provide messages based on a correspondence between signature data and data associated with the device. A message signature is incorporated within the signature data. The data associated with the device is monitored by utilizing the device monitoring application so as to detect a presence of the message signature in the monitored data. A status message is provided by utilizing the device monitoring application if the presence of the message signature is detected in the monitored data. The signature data includes computer virus signatures and the message signature is not related to a computer virus.Type: GrantFiled: August 22, 2003Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: Steven Lingafelt, Gerald Marko
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Patent number: 7467260Abstract: An apparatus and method is disclosed for flushing a cache in a computing system. In a multinode computing system a cache in a first node may contain modified data in an address space of a second node. The cache in the first node must be purged prior to shutting down the first node. The computing system uses a random class replacement scheme for the cache. A cache flush routine sets a cache flush mode in a class replace select mechanism, overriding the random class replacement scheme. With the random class replacement scheme overridden, a minimum number of fetches will flush all the cache lines in the cache, each fetch loading the cache with a cache line not already in the cache. No additional delay penalty is incurred in a critical path through which fetches and stores to the cache must pass.Type: GrantFiled: October 8, 2004Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: Duane Arlyn Averill, John Michael Borkenhagen, Philip Rogers Hillier, III
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Patent number: 7467266Abstract: Snapshot sets comprising snapshot criteria are created, maintained, and executed via a command set designed to facilitate managing and conducting snapshots on data distributed across multiple volumes. Snapshot criteria such as source volume, target volume, redundancy level, copy mode, and the like are added as desired to a snapshot set. Upon invocation of an execute command, the fast replication operations defined by the snapshot set are executed, providing a logically atomic data replication utility potentially involving multiple sources and targets. In one embodiment auto selection of a target may be specified, thus facilitating over-subscription of target resources. The present invention reduces the complexity of archiving data—particularly data distributed across multiple volumes such as data associated with database applications and the like.Type: GrantFiled: August 5, 2003Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: David Alan Burton, Mohamad H. El-Batal, Noel Simen Otterness, Alan Lee Stewart