Patents Assigned to CO
  • Patent number: 12086428
    Abstract: An operating method for a memory system including a host and a memory system.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: September 10, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyunseok Kim, Jingyu Heo, Inhae Kang, Jaeyoul Oh
  • Patent number: 12087540
    Abstract: Disclosed is a field emission-type tomosynthesis system including a vacuum body having a space therein; a plurality of sources provided inside the body, wherein each of the sources emits a plurality of electrons; and a plurality of anodes disposed inside the body to face the sources and responsible for emitting a plurality of X-rays, wherein each of the anodes faces a corresponding source among the sources, and the electrons collide with each of the anodes to generate X-rays, wherein the X-ray emission angle of each of the anodes is capable of being independently adjusted so as to focus the X-rays emitted toward an object located outside the body. With this configuration, a plurality of X-rays is focused on an object and is emitted to the object to obtain information, and the information is synthesized, thereby improving the reliability of information about the object.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: September 10, 2024
    Assignee: CAT BEAM TECH CO., LTD.
    Inventors: Jehwang Ryu, Seung Jun Yeo, Jong Min Lim, Woo Seob Kim, Jeung Sun Ahn, Moonkyoo Kong, Jae Ik Jung, Jun Young Park
  • Patent number: 12086022
    Abstract: A bus monitoring device and method, a non-transitory computer-readable storage medium, and an electronic device are disclosed. The bus monitoring method may include: arranging monitoring nodes in a bus, with each monitoring node arranged in one of subsystems to be tested of the bus, where the monitoring nodes are connected in series in a ring topology (202); acquiring a test vector and sending a test message according to the test vector to one of the monitoring nodes to transmit the test message across the monitoring nodes, the test vector being configured to instruct each monitoring node to execute the test message and acquire test information of the respective subsystem to be tested, where the test information is configured to indicate information of the bus of the respective subsystem to be tested when the monitoring node executes the test message (204).
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: September 10, 2024
    Assignee: SANECHIPS TECHNOLOGY CO., LTD.
    Inventor: Nian Liu
  • Patent number: 12084562
    Abstract: A sealer for use in an all-solid-state secondary battery provided with a sulfur-containing solid electrolyte, characterized in that the sealer contains a resin and a particulate fatty acid metal salt dispersed in the resin, and the particulate fatty acid metal salt is a particulate fatty acid metal salt in which a fatty acid is coordinated on the surfaces of the metal particles having a mean particle diameter of not more than 1000 nm. The all-solid-state secondary battery is capable of suppressing the generation of the hydrogen sulfide.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: September 10, 2024
    Assignees: TOYO SEIKAN GROUP HOLDINGS, LTD., TOYO SEIKAN CO., LTD.
    Inventors: Tomokazu Kobayashi, Daisuke Imoda, Shuji Nakano
  • Patent number: 12084918
    Abstract: A ladder having a first rail having a bottom. The ladder having a second rail. The ladder having rungs attached to the first rail and second rail upon which a user climbs the ladder. The ladder comprises a ladder foot rotatably attached adjacent to the bottom of the first rail. The ladder foot having three distinct and different surfaces, with the first rail resting on one of the three surfaces at any one time the first rail is up right. The first rail changing to any of the three surfaces for the first rail to be upright upon by rotating the ladder foot. A method for placing a ladder. A ladder foot rotatably attached adjacent to a bottom of a first rail of a ladder. A method for making a ladder.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: September 10, 2024
    Assignee: Werner Co.
    Inventors: Daniel C. Mora, Robert D. Beggs
  • Patent number: 12088935
    Abstract: The disclosure relates to a camera module, a control method and apparatus, an electronic device and a storage medium. The camera module includes a camera, the camera includes a lens and a photosensitive element, and the camera module further includes an optical filter assembly. An optical filter in the optical filter assembly and the lens are parallel and located on different planes, and when the optical filter is in a filtered state, the optical filter is located on one side of the photosensitive element facing the lens for reducing an intensity of light entering the photosensitive element.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: September 10, 2024
    Assignee: WINGTECH TECHNOLOGY (SHENZHEN) CO., LTD.
    Inventors: Mingzhen Lv, Fei Yang
  • Patent number: 12083628
    Abstract: A cable-type welding wire provided in the present application, includes a central welding wire and n peripheral welding wires arranged so as to be spirally wound on the central welding wire, with each of the peripheral welding wires having a diameter of dperipheral, and adjacent peripheral welding wires being arranged to be tangential to each other, wherein, the peripheral welding wires have a lay length of T, which satisfies the equation of T=m×(dperipheral+dcentral)/2, where m is a multiple of the lay length, dperipheral is a diameter of the peripheral welding wire, dcentral is a diameter of the central welding wire, and 3.2?m<20. This application can obtain a smaller penetration depth when the welding parameters remain constant due to a small multiple of the lay length of the cable-type welding wire, and can further reduce welding arcing current.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: September 10, 2024
    Assignee: JIANGSU YINLI WELDING ENGINEERING TECHNOLOGY RESEARCH CO., LTD.
    Inventor: Zhen Shi
  • Patent number: 12087219
    Abstract: A display substrate and manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and a shift register unit and a first clock signal line that are on the base substrate, the first clock signal line extends along a first direction on the base substrate and is configured to provide a first clock signal to the shift register unit, the shift register unit includes an input circuit, an output circuit, a first control circuit and an output control circuit, and the first control circuit includes a first control switch and a second control switch, an active layer of the first control switch and an active layer of the second control switch are a continuous control semiconductor layer, the control semiconductor layer extends along the first direction.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: September 10, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pengfei Yu, Jie Dai, Lu Bai, Linhong Han
  • Patent number: 12088001
    Abstract: An antenna device according to an embodiment of the present invention includes a dielectric layer, a first antenna unit having a bent structure and extending along an upper surface, a lateral surface and a lower surface of the dielectric layer, and a second electrode pattern having a bent structure and extending along the lateral surface and the lower surface of the dielectric layer.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: September 10, 2024
    Assignee: DONGWOO FINE-CHEM CO., LTD.
    Inventors: Ho Dong Yoon, Yun Seok Oh, Han Sub Ryu, Won Hee Lee
  • Patent number: 12089407
    Abstract: A semiconductor device includes a peripheral circuit structure including a lower substrate, a plurality of circuits formed on the lower substrate, and a plurality of wiring layers connected to the plurality of circuits, an upper substrate covering the peripheral circuit structure and including a through opening, a memory stack structure including a plurality of gate lines, a memory cell contact passing through at least one of the plurality of gate lines to contact one gate line from among the plurality of gate lines, the memory cell contact extending to the peripheral circuit structure through the through opening and being configured to be electrically connected to a first wiring layer from among the plurality of wiring layers, and a plurality of dummy channel structures passing through at least one of the plurality of gate lines to extend to the peripheral circuit structure through the through opening.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: September 10, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Donghoon Kwon, Chungki Min
  • Patent number: 12089237
    Abstract: Methods and apparatuses for beam indication channel in a multi-beam system. A method of operating a user equipment includes receiving configuration information for one or more transmission configuration indication (TCI) states, associated TCI state identifiers (IDs), and a channel conveying one or more TCI state IDs and receiving the channel conveying the one or more TCI state IDs. The method also includes determining, based on the one or more TCI state IDs, one or more spatial domain filters for at least one of reception of downlink channels and transmission of uplink channels and determining a time for applying the one or more spatial domain filters. Additionally, the method includes at least one of: receiving, starting at the determined time, the downlink channels using the one or more spatial domain filters; and transmitting, starting at the determined time, the uplink channels using the one or more spatial domain filters.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: September 10, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Emad N. Farag, Eko Onggosanusi, Md. Saifur Rahman
  • Patent number: 12086639
    Abstract: Disclosed is an extended high-performance server integrated management system based on remote server management standard to efficiently manage existing high-performance servers and ultra-high-performance servers capable of supporting extended BMC functions. This system includes multiple modules responsible for each major function, considering a possibility of large-scale expansion, and each module can be run on an independent server depending on the size of the management system. In addition, this system utilizes the Intelligent Platform Management Interface (IPMI) standard, which is widely used for efficient remote hardware management of ultra-high-performance servers, and supports function for collecting hardware monitoring information linked to BMC for various functions such as temperature, power, and fan speed and collectively controlling the hardware on the basis of the collected data. In this case, an out-of-band based agent communication method was used to extend the BMC functionality.
    Type: Grant
    Filed: September 26, 2023
    Date of Patent: September 10, 2024
    Assignee: GeniAI CO.,LTD
    Inventor: Se Kweon Yoo
  • Patent number: 12083745
    Abstract: A 3D printing device and method for integrated manufacturing of functionally gradient materials and three-dimensional structures. The device includes an active and passive mixing and printing module and a constraining and sacrificial layer printing module. An input end of the active mixing module connects to multiple anti-settling feeding modules, and an output end of the active mixing module connects to the passive mixing and printing module. The passive mixing and printing module and the constraining and sacrificial layer printing module are mounted on one side of an XYZ three-axis module. The constraining and sacrificial layer printing module connects to a constraining and sacrificial layer feeding module and prints and forms a functionally gradient three-dimensional structure.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: September 10, 2024
    Assignees: QINGDAO UNIVERSITY OF TECHNOLOGY, QINGDAO 5D INTELLIGENT ADDITIVE MANUFACTURING TECHNOLOGY CO., LTD.
    Inventors: Hongbo Lan, Pengfei Guo, Xin Lin, Guangming Zhang, Xiaoyang Zhu, Jiawei Zhao, Quan Xu, Jianjun Yang
  • Patent number: 12086179
    Abstract: The present disclosure provides a method and apparatus for information display, and a non-volatile computer storage medium. The method includes: displaying search prompt information in response to a trigger operation for review content corresponding to a video; and displaying a search result page in response to a selection operation for the search prompt information.
    Type: Grant
    Filed: August 24, 2023
    Date of Patent: September 10, 2024
    Assignee: Beijing Bytedance Network Technology Co., Ltd.
    Inventors: Ping Wu, Ruiqi Peng, Kai Wu
  • Patent number: 12084273
    Abstract: Disclosed are a barrel cover with an encoder, a garbage bin, a barrel cover control method, a motor driver, and a non-transitory computer-readable storage medium. The barrel cover with the encoder includes a housing, a motor, a buffer, a driving shaft, a cover plate, and a drive circuit; the housing is provided with a cover opening, a first connecting base, and a second connecting base; the motor is connected to the housing and provided with an encoder; a first end of the buffer is rotatably connected to the first connecting base, and a rotary shaft of the motor is connected to the first end of the buffer; an end of the driving shaft is rotatably connected to the second connecting base, and the other end of the driving shaft is connected to a second end of the buffer.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: September 10, 2024
    Assignee: Jiangmen Jinlong High Technology Industrial Co., Ltd.
    Inventors: Jinsheng Liao, Weitang Lu
  • Patent number: 12085506
    Abstract: A method for determining an index-of-refraction profile of an optical object, which has a cylindrical surface and a cylinder longitudinal axis, said method comprising the following method steps: (a) scanning the cylindrical surface of the object at a plurality of scanning locations by means of optical beams; (b) capturing, by means of an optical detector, a location-dependent intensity distribution of the optical beams deflected in the optical object; (c) determining the angles of deflection of the zero-order beams for each scanning location from the captured intensity distribution, comprising eliminating beam intensities, and (d) calculating the index-of-refraction profile of the object on the basis of the angle-of-deflection distribution, wherein method steps (a) and (b) are carried out with light beams having at least two different wavelengths.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: September 10, 2024
    Assignee: Heraeus Quarzglas GmbH & Co. KG
    Inventor: Maximilian Schmitt
  • Patent number: 12084609
    Abstract: To provide a semiconductor light emitting device which is capable of accomplishing a broad color reproducibility for an entire image without losing brightness of the entire image. A light source provided on a backlight for a color image display device has a semiconductor light emitting device comprising a solid light emitting device to emit light in a blue or deep blue region or in an ultraviolet region and phosphors, in combination. The phosphors comprise a green emitting phosphor and a red emitting phosphor. The green emitting phosphor and the red emitting phosphor are ones, of which the rate of change of the emission peak intensity at 100° C. to the emission intensity at 25° C., when the wavelength of the excitation light is 400 nm or 455 nm, is at most 40%.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: September 10, 2024
    Assignees: CITIZEN ELECTRONICS CO., LTD., NICHIA CORPORATION
    Inventors: Byungchul Hong, Naoki Sako, Naoto Kijima, Masahiko Yoshino, Takashi Hase, Fumiko Yoyasu, Kentarou Horibe
  • Patent number: 12087845
    Abstract: A system and methods of manufacturing semiconductor devices is described herein. The method includes forming a recess between fins in a substrate and forming a dielectric layer over the fins and in the recess. Once the dielectric layer has been formed, a bottom seed structure is formed over the dielectric layer within the recess and the dielectric layer is exposed along sidewalls of the recess. A dummy gate material is grown from the bottom seed structure in a bottom-up deposition process without growing the dummy gate material from the dielectric layer exposed along sidewalls of the recess.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: September 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ao Chang, Pei-Ren Jeng, Chii-Horng Li, Yee-Chia Yeo
  • Patent number: 12087657
    Abstract: A semiconductor package includes a package substrate, a semiconductor chip on the package substrate, a heat dissipation structure on the package substrate, the heat dissipation structure including a center portion and an edge portion, a dam structure on a bottom surface of the center portion of the heat dissipation structure, the dam structure on a top surface of the semiconductor chip, and a heat conductive layer between the center portion of the heat dissipation structure and the semiconductor chip. A top surface of the dam structure is located at a same distance from a top surface of the package substrate in a vertical direction as a top surface of the heat conductive layer, wherein the vertical direction is perpendicular to the top surface of the package substrate.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: September 10, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Woojae Kim
  • Patent number: 12087668
    Abstract: A semiconductor device includes a first passivation layer over a circuit and. conductive pad over the first passivation layer, wherein the conductive pad is electrically connected to the circuit. A second passivation layer is disposed over the conductive pad and the first passivation layer, and has a first opening and a second opening. The first opening exposes an upper surface of a layer that extends underneath the conductive pad, and the second opening exposes the conductive pad. A first insulating layer is disposed over the second passivation layer and filling the first and second openings. A through substrate via extends through the insulating layer, second passivation layer, passivation layer, and substrate. A side of the through substrate via and the second passivation layer have a gap that is filled with the first insulating layer. A conductive via extends through the first insulating layer and connecting to the conductive pad.
    Type: Grant
    Filed: April 3, 2023
    Date of Patent: September 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsien-Wei Chen, Jie Chen, Ming-Fa Chen