Abstract: A light-emitting diode manufacturing method, including the successive steps of: a) forming an active layer including a stack of multiple quantum wells, each quantum well including a layer made of a semiconductor alloy; b) forming a trench for singularizing the diode, the trench crossing the active layer; and c) applying to the sides of the active layer, at the level of the lateral walls of the trench, a chemical treatment capable of etching a first component of the semiconductor alloy selectively over at least another component of the semiconductor alloy, wherein the bandgap width of the semiconductor alloy is a function of the concentration of the first component in the alloy.

Abstract: A transistor including a gate region penetrating into a first gallium nitride layer, wherein a second electrically-conductive layer coats at least one of the sides of said gate region.

Abstract: A method of generating training data for transferring knowledge from a trained artificial neural network to a further artificial neural network, the method including: a) injecting a first sample into the trained artificial neural network; b) reinjecting a pseudo sample, generated based on a replicated sample present at the one or more outputs of the trained artificial neural network, into the trained artificial neural network in order to generate a new replicated sample; and c) repeating b) one or more times, wherein the training data for training the further artificial neural network includes at least two of the reinjected pseudo samples originating from the same first sample and corresponding output values generated by the trained artificial neural network.

Abstract: A method of communication between a first electronic circuit and second electronic circuits via a bidirectional bus allowing the full duplex communication. Each second electronic circuit has a single identifier corresponding thereto. The method includes the transmission by the first electronic circuit of first frames over the bus to the second electronic circuits, the bits of each first frame being distributed in successive groups of bits, a first group of bits corresponding to a first identifier among the identifiers, a second group of bits corresponding to orders to be executed by the second electronic circuit corresponding to the first identifier, and a third group of bits corresponding to a second identifier among the identifiers, only the second electronic circuit corresponding to the second identifier being authorized to transmit a second frame to the first electronic circuit over the bus.

Abstract: An electronic device including semiconductor region located on a gallium nitride layer, two electrodes, located on either side of and insulated from the semiconductor region, the electrodes partially penetrating into the gallium nitride layer, and two lateral MOS transistors formed inside and on top of the semiconductor region.

Abstract: A method of manufacturing an optoelectronic device including-light-emitting diodes comprising the forming of three-dimensional semiconductor elements made of a III-V compound, each comprising a lower portion and an upper portion and, for each semiconductor element, the forming of an active area covering the top of the upper portion and the forming of at least one semiconductor area of the III-V compound covering the active area. The upper portions are formed by vapor deposition at a pressure lower than 1.33 mPa.

Abstract: A circuit, intended to be associated in series with a load to be powered including a first field-effect transistor; at least one second field-effect transistor, associated in parallel with the first transistor; and at least one sensor of information representative of a current transmitted to said load, the gate of the second transistor being coupled to an output of the sensor.

Abstract: A blood glucose regulation system including a processing and control unit configured to implement an automated blood glucose regulation method, wherein the regulation method takes into account at least one hyperparameter having a default value, the value of said at least one hyperparameter being adjustable on the fly by the processing and control unit by means of an adjustment function, and wherein the processing and control circuit is configured to, after a regulation period: estimate the performance of the regulation method by means of at least one performance indicator; and adjust on the fly the value of said at least one hyperparameter according to said at least one performance indicator.

Abstract: A method of determining, for each cell of a battery of series-coupled cells, an indicator QCi representative of the charge stored in the cell, this method comprising: a) at the end of a phase of partial discharge or charge of the battery, measuring the voltage Ui across each cell of the battery; b) calculating, for each cell, an interpolation coefficient Xi from a value C_rate representative of the discharge or charge rate of the battery during said partial discharge or charge phase, and from the voltages Ui measured at step a); and c) determining, for each cell, from the interpolation coefficient Xi calculated for the cell at step b) and from a quantity Qcm representative of the charge stored in the battery, said indicator QCi representative of the charge stored in cell.

Abstract: A transistor comprising a gallium nitride layer having a first gate electrode partially penetrating into it, having: a first side coated with a first thickness of a first insulating material and of a second insulating material; and with a second thickness of a conductive material; and a bottom coated with a third thickness, smaller than the first thickness, of the first insulating material.

Abstract: A method for depositing a layer of a nanocomposite material comprising the step of pouring said liquid material onto the surface of a substrate, said substrate being subjected to an oscillating rotary motion.

Abstract: A method of manufacturing an optoelectronic device including light-emitting diodes comprising forming three-dimensional semiconductor elements, extending along parallel axes, made of a III-V compound, with a polarity of the group-III element, the method further including, for each semiconductor element, forming an active area covering the semiconductor element and a stack of semiconductor layers covering the active area, the active area being formed by vapor deposition at low pressure and comprising quantum wells separated by barrier layers, each quantum well including a ternary alloy having at least one first group-III element, the group-V element, and a second group-III element, the ratio of the atomic flux of the group-III elements to the atomic flux of the group-V element is in the range from 1 to 1.8.

Abstract: A selector for a memory cell, intended to change from a resistive state to a conductive state so as to respectively prohibit or authorize access to the memory cell, characterized in that it is made of an alloy consisting of germanium, selenium, arsenic and tellurium.

Abstract: A method of manufacturing an emissive screen comprising LEDs, including the steps of: a) depositing a first metal layer on a surface of a control circuit; b) depositing a second metal layer on a surface of an optoelectronic circuit; c) bonding the optoelectronic circuit to the control circuit by direct bonding of the second metal layer to the first metal layer, by aligning the optoelectronic circuit with respect to the control circuit so that different emission cells of the optoelectronic circuit are arranged opposite different metal connection pads of the control circuit; and d) forming, from the surface of the optoelectronic circuit opposite to the control circuit, trenches laterally delimiting each emission cell.

Abstract: An electromagnetic material for an inductance for operation at cryogenic temperatures including, in an electrically insulating matrix, metal nanoparticles with superparamagnetic behavior of size less than or equal to 30 nm and having a magnetic permeability greater than or equal to 1.5 for a frequency between 5 GHz and 50 GHz.

Abstract: A method of polishing a semiconductor substrate, including: a) a step of multiple implantations of ions from an upper surface of the substrate, to modify the material of an upper portion of the substrate, the multiple implantation step comprising a plurality of successive implantations under different respective implantation orientations; and b) a step of selective removal of the upper portion of the substrate.

Abstract: A capacitive logic cell with complementary control, including a variable-capacitance electromechanical device having a fixed part and a mobile part, the electromechanical device comprising first, second, third and fourth electrodes mounted on the fixed part, and a fifth electrode mounted on the mobile part, the first electrode being connected to a terminal for supplying a first input logic signal, the second electrode being connected to a terminal for supplying a second input logic signal, complementary to the first input logic signal, the third electrode being connected to a terminal for supplying a first output logic signal, and the fourth electrode being connected to a terminal for supplying a second output logic signal, complementary to the first output logic signal.

Abstract: A balun including first and second conductive tracks located vertically in line and at a distance from each other and having a same pattern.

Abstract: An automated system for regulating a patient's blood glucose, including a blood glucose sensor, an insulin injection device, and a processing and control unit.

Abstract: A device including first and second light-emitting cells respectively emitting in first and second wavelength ranges, wherein: each cell includes a stack of a first layer of a first semiconductor material and of a second layer of a second semiconductor material having a different mesh parameter; in the first cell, the first layer is in contact with the second layer across the entire surface of the cell; and in the second cell, a mask provided with a plurality of through nano-openings forms an interface between the first layer and the second layer, the second layer comprising a plurality of nanopillars of the second material arranged in the nano-openings of the mask, and a coalesced layer extending across substantially the entire surface of the cell on the side of the mask opposite to the first layer.