Abstract: A method of controlling first and second switches of a switching cell, including measuring a current flowing through the first switch when the first switch is controlled to the off state, and setting a switching dead time according to the measurement.

Abstract: A photonic device manufacturing method, including a step of transfer, onto a same surface of a photonic circuit previously formed inside and on top of a first substrate, of at least a first die made up of a III-V semiconductor material and of at least a second die made up of silicon nitride, the method further including a step of forming of photonic components in said at least one first and at least one second dies.

Abstract: An automated blood glucose control system, including a processing and control unit capable of predicting, based on a mathematical model, the future trend of the patient's blood glucose G(t), wherein the model takes as inputs: a variable EE(t) representative of the time variation of the patient's energy expenditure; variable IOB(t) representative of the time variation of the patient's quantity of insulin on board; and a variable COB(t) representative of the time variation of the patient's quantity of glucose on board, and wherein the mathematical model is a model of black box type, that is, a non-physiological model only defined by the observation of the effects of input variables EE(t), IOB(t) and COB(t) on output variable G(t), without taking into account the different known physiological mechanisms operating in the patient's body.

Abstract: A current source inverter, including: a first switching cell including at least first and second power switches coupling a same first input node of the inverter respectively to first and second output nodes of the inverter; and a circuit of protection against a placing in open circuit of an input current source of the inverter.

Abstract: An analog-to-digital converter for an adiabatic logic circuit, including at least one variable-capacitance cell, the cell including first and second main terminals and at least one control terminal insulated from its first and second main terminals and capable of receiving a control voltage to vary the capacitance between its first and second main terminals between a low value and a high value, wherein: the cell has its first main terminal coupled to a node of application of a variable periodic converter power supply voltage; the cell has its second main terminal coupled to a node for supplying a binary output signal of the converter; and the cell receives on its first control terminal an analog input voltage of the converter.

Abstract: An image sensor including: a pixel circuit comprising a first transistor having one of its main conducting nodes connected to an output line, the other of its main conducting nodes coupled to a supply voltage rail via a read transistor, and its control node coupled to a sense node of the pixel circuit; a current source coupled to the output line; and a control circuit configured to read a pixel voltage from the pixel circuit by: activating the current source while the read transistor is non-conducting; and deactivating the current source and activating the read transistor of the pixel circuit in order to impose a boosted voltage at the sense node.

Abstract: A battery with switched accumulators, including: a first cell; a plurality of second cells series-connected with the first cell, each first and second cell including: an electric accumulator series-connected with a first switch, a second switch connected in parallel with the accumulator and the first switch, and a first diode, the cathodes of the first diodes being connected to an output node, the anode of the accumulator of the first cell being connected to ground, the anode of the first diode of each second cell being coupled to the cathode of the accumulator by at least one third switch; and a control circuit capable of measuring characteristics of at least certain accumulators and of controlling the first, second, and third switches according to the characteristics.

Abstract: An electronic circuit including a semiconductor substrate having first and second opposite surfaces and electric insulation trenches. Each trench separates first and second portions of the substrate and includes electrically-insulating walls made of a first electrically-insulating material, extending from the first surface to the second surface, and a core made of a filling material, separated from the substrate by the walls. For at least one of the trenches, the trench walls include electrically-insulating portions made of the first electrically-insulating material protruding from the first or second surface outside of the substrate and/or the trench includes an electrically-insulating wall made of the first electrical-insulating material protruding from the first or second surface outside of the substrate and coupling the trench walls.

Abstract: A display device including a first integrated circuit including: an assembly of light-emitting diodes, each diode including a vertical stack of a first semiconductor layer of a first conductivity type and of a second semiconductor layer of a second conductivity type; and on the side of a surface of the first circuit opposite to the first semiconductor layer, a connection structure including a dielectric layer having a plurality of identical or similar connection pads, regularly distributed across the entire surface of the first circuit, arranged therein, each diode having a first electrode in contact with at least one pad of the connection structure, and a second electrode in contact with a plurality of pads of the connection structure at the periphery of the plurality of diodes.

Abstract: A method of controlling a battery including a first control circuit and a plurality of modules arranged in series between first and second terminals. Each module includes, between third and fourth terminals, electric cells and switches and a second switch control circuit. The battery further includes at least one first data transmission bus coupling the first control circuit to each second control circuit, the first control circuit including a memory having chained lists stored therein. Each chained list includes elements each including an identifier of one of the electric cells and at least one first pointer designating another element in the chained list.

Abstract: A battery including a first control circuit and a plurality of modules arranged in series between first and second terminals, each module including electric cells and switches coupling the cells to third and fourth terminals and a second switch control circuit. The battery includes a first data transmission bus coupling the first control circuit to each second control circuit and a second data transmission bus coupling the first control circuit to each second control circuit. The first control circuit is capable of transmitting first data to the second control circuits over the first bus at a first rate and is capable of transmitting second data to the second control circuits over the second bus at a second rate smaller than the first rate.

Abstract: A capacitive power supply circuit including, between first and second terminals of application of an AC input voltage-UN, a distributed capacitive structure including a plurality of elementary capacitive units, each including a current limiter series-connected with a capacitor between first and second terminals of the unit and a voltage limiter connected in parallel with the capacitor, the elementary capacitive units being series-coupled by their first and second terminals.

Abstract: A method of controlling a battery including a first control circuit and a plurality of modules arranged in series between first and second terminals, each module including electric cells and switches coupling the cells and a second switch control circuit, the battery further including at least one first data transmission bus coupling the first control circuit to each second control circuit. The first control circuit includes a memory having, for each electric cell, an identifier of the electric cells and a priority level for the connection of the electric cell among priority levels stored therein.

Abstract: A method of controlling a battery including a first control circuit and a plurality of modules arranged in series between first and second terminals, each module including electric cells and switches and a second switch control circuit, the battery further including at least one first data transmission bus coupling the first control circuit to each second control circuit, the method including the transmission, by the first control circuit to the second control circuits, of first data representative of an electric cell configuration to be obtained to follow a set point for the delivery of a voltage and/or of a current between the first and second terminals, the second control circuits connecting or disconnecting the electric cells based on said first data and on a classification of the priorities of the electric cells.

Abstract: A method of manufacturing an optoelectronic device, including: a) transferring, onto a surface of a control circuit, a diode stack including first and second semiconductor layers of opposite conductivity types, so that the second layer is electrically connected to metal pads of the control circuit; b) forming in the active stack trenches delimiting a plurality of diodes connected to separate metal pads of the control circuit; c) depositing an insulating layer on the lateral walls of the trenches; d) partially removing the insulating layer to expose the sides of the portions of the first layer delimited by the trenches; and e) forming a metallization coating the lateral walls and the bottom of the trenches and contacting the sides of the portions of the first layer delimited by the trenches.

Abstract: A battery including: a power supply bus; an assembly of electric cells and of first switches coupling the cells; second switches forming an H bridge and coupling said assembly to nodes; a first circuit for supplying first control signals to the first and second switches; a second circuit for delivering a first power supply voltage to the first circuit based on the voltage across one of the cells; a third circuit for supplying second control signals to at least two of the second switches and connected to the power supply bus; and first diodes coupling the first circuit to the two second switches and second diodes coupling the third circuit to the two second switches.

Abstract: A method of forming an area of electric contact with a semiconductor region mainly made of germanium, comprising the forming of a first area made of a first intermetallic material where more than 70% of the non-metal atoms are silicon atoms. There is also described a device including such a contacting area.

Abstract: A method of manufacturing an electronic device, including: a) forming a plurality of chips, each including a plurality of connection areas and at least one first pad; b) forming a transfer substrate including, for each chip, a plurality of connection areas and at least one second pad, one of the first and second pads being a permanent magnet and the other one of the first and second pads being either a permanent magnet or made of a ferromagnetic material; and c) affixing the chips to the transfer substrate to connect the connection areas of the chips to the connection areas of the transfer substrate, by using the magnetic force between the pads to align the connection areas of the chips with the corresponding connection areas of the transfer substrate.

Abstract: A radiation sensor including a plurality of pixels formed in and on a semiconductor substrate, each pixel including a microboard suspended above the substrate by thermal insulation arms, the microboard including: a conversion element for converting incident electromagnetic radiation into thermal energy; and a passive optical shutter including a heat-sensitive layer covering one of the faces of the conversion element, the heat-sensitive layer having a reflection coefficient for the radiation to be detected that increases as a function of its temperature.

Abstract: A memory circuit including: a plurality of elementary storage cells arranged in an array of rows and of columns; a data input/output port; an address input port; a mode selection input port; and an internal control circuit configured to: read a mode selection signal applied to the mode selection port; when the mode selection signal is in a first state, read an address of a row from the address input port and implement a read or write operation in this row; and when the mode selection signal is in a second state, read from the data input/output port an instruction signal and implement an operation including the simultaneous activation in read or write mode of at least two rows.