Abstract: A method for decompressing compressed data elements, drawing that decompression operation, the intermediate coefficients are organized in a matrix configuration such that the number of transpose operations are minimized. The organization of that matrix includes storing sequential coefficients, translated from the compressed data, in sequential locations of sequential columns of the matrix. The transpose operation is performed during the inverse discrete cosine operation portion of the decompression operation.

Abstract: A method and computer system according to the disclosed invention comparing from right to left the ISDN device address embedded within an ISDN message with a pre-existing ISDN device number resident in the computer system. The computer system receives data containing the ISDN device address through the ISDN-type data communication device. Upon receiving the data, the computer system compares the ISDN device address with the resident ISDN device number contained in the computer system in a right to left matching scheme. If the ISDN device address and ISDN device number match using the right to left matching scheme, the computer system responds to the ISDN message through the ISDN-type data communication device.

Abstract: A computer system provides a communication link to a display monitor so as to control the display of not only computer signals but of other signals such as television signals. By providing this link the additional power of the computer can be used to provide a storage of preferred settings for the television/display monitor depending upon signal sources, time of day or the like. This provides a more versatile display. Further data contained within a received data stream such as from a web page or the like may inherently control functions of the television display.

Abstract: A computer system is provided which includes features enhancing its serviceability. In a described embodiment, a computer has a chassis which includes option card module latching structures and a drive bay module pivot structure. The latching structures provide convenient access to a system board of the computer. The pivot structure provides convenient access to storage media devices in a drive bay module of the computer.

Abstract: A security methodology and security logic for protecting Plug and Play computer system components from unauthorized access. The security logic prevents modification of the base addresses of specified Plug and Play computer system components by blocking writes to specific index locations programmed into security registers. In the disclosed embodiment of the invention, the base address of a Super I/O chip is protected, as well as the base addresses of specified logical devices in the Super I/O chip. Protecting the base addresses in this manner prevents the security logic from being circumvented by interfering with the address decoding used to track reads and writes to protected index registers. In addition, the security registers are programmed to prevent access to the protected index registers of the logical devices.

Abstract: A computer microprocessor has a housing portion with a recess formed in a top side wall thereof, and a die portion inset within the recess. Operating heat from the die is removed by heat dissipation apparatus which automatically adapts to variations in the microprocessor bond line thickness and includes a sheet metal EMI shield wall overlying the microprocessor and having a condensing end portion of a thermosyphoning heat pipe secured to its bottom side, with an evaporating end portion of the heat pipe overlying the die recess and being resiliently deflectable toward a phase change thermal pad mounted on the top side of the die and inset into the housing die recess. A laterally Enlarged heat sink section is integrally formed on the evaporating end portion and has a flat bottom side and an arcuate top side.

Abstract: Improved techniques for condensing or reducing animated image data streams are disclosed. The improved techniques enable the transmission and storage of animated images in a rapid and efficient manner. Animated images are normally stored as image files that include a series of images which produce an animation effect when sequentially displayed. For example, animated image files are often used by Internet sites to provide animation to their web pages. In the case of a proxy server for a network (e.g., the Internet) that caches images, the condensing or reducing of the animated image files is particularly helpful because it not only to reduces image storage space but also accelerates the delivery of these animated images to end users. The improved techniques are particularly well suited for use in reducing or condensing animated GIF images.

Abstract: A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an operand routing unit (ORU) to perform a maximum number of the multimedia operations within as few instruction cycles as possible. Complex algorithms are readily performed by arranging operands upon the vector ALU in accordance with the desired algorithm flowgraph. The ORU aligns the operands within partitioned slots or sub-slots of the vector registers using vector instructions unique to the MEU. At the output of the ORU, operand pairs from vector source or destination registers can be easily routed and combined at the vector ALU. The vector instructions employ special load/store instructions in combination with numerous operational instructions to carry out concurrent multimedia operations on the aligned operands.

Abstract: A method and apparatus for providing additional memory storage within a local node associated with shared memory system is disclosed. A processor associated with a local node of the shared memory system initially requests a fetch operation to a local memory associated with the processor of a first group of data from the home node location of the first group of data. The processor determines whether sufficient local memory exists for receiving the requested first group of data, and if not, selects a second group of data presently located within the local memory for removal in such a manner that no data will be lost due to the removal of the second group of data from the local memory. The selected second group of data is removed from the local memory and any directory information relating to said second group of data updated to reflect any new location information. The first group of data may then be fetched to the local memory.

Abstract: A method of accessing information in a cache of a multithreaded system comprises providing a virtual address of an instruction to be accessed by a thread. Upon a cache miss, the physical address of the information is compared with the physical address of an instruction stored in the cache, and if they match, the instruction is accessed from the cache. Alternatively, the cache is searched for an entry having a virtual address which matches the instruction's virtual address, and having some indication of being associated with the accessing thread. Upon finding such an entry, the instruction is accessed from the cache. In addition, the instruction may be accessed from the cache upon finding a cache entry whose virtual address matches the instruction's virtual address, and which either has an address space matching the address space of the thread, or has an indication that the entry matches all address spaces.

Abstract: A database query compiler and compilation method has special facilities for compiling a query that includes an Offset sequence function, Offset(argument, index). During execution of the query, while the cursor for a table is pointing to a current row, the Offset function is used to access information from a previously accessed row. The argument of the Offset sequence function is a specified function of information associated with the previously accessed row of the table. The previously accessed row has a position that is index rows before the current row referenced by the cursor for the table. During compilation, the argument of the Offset sequence function is parsed to determine a set of auxiliary fields for each row of the table. Each auxiliary field of a row contains information that may be accessed during execution of the Offset sequence function while the cursor for that table is pointing to a subsequent row.

Abstract: A multi-node computer network includes a plurality of nodes coupled together via a data link. Each of the nodes includes a local memory, which further comprises a shared memory. Certain items of data that are to be shared by the nodes are stored in the shared portion of memory. Associated with each of the shared data items is a data structure. When a node sharing data with other nodes in the system seeks to modify the data, it transmits the modifications over the data link to the other nodes in the network. Each update is received in order by each node in the cluster. As part of the last transmission by the modifying node, an acknowledgement request is sent to the receiving nodes in the cluster. Each node that receives the acknowledgment request returns an acknowledgement to the sending node. The returned acknowledgement is written to the data structure associated with the shared data item.

Abstract: In an coder for producing a bitstream representative of a sequence of video images, a previous image is registered with a current image using spline-based registration to produce estimated motion vectors. The estimated motion vectors are used to match blocks of the previous image and the current image to produce translation vectors. The translation vectors compensate for motion while encoding the sequence as a bitstream.

Abstract: A system positions an image with a plurality of lines on a display device. The system determines the number of black lines required to vertically center the image in a frame of the display device as m+n; displays m black lines using a first horizontal sync period at the start of each frame, the first horizontal sync period being less than the horizontal sync period of the display device; displays each line of the image; and displays n black lines using the second horizontal sync period until the end of the frame.

Abstract: A cascaded removable media data storage system includes a first level enhanced removable media data storage system controller connected to a host or server computer network. Connected in parallel to the enhanced first level removable media data storage system controller are at least two enhanced second level removable media data storage system controllers. Each enhanced second level removable media data storage system controllers is connected to a mirrored group of removable media data storage units.

Abstract: An apparatus and system for providing video processing is disclosed. Within the system and the apparatus there is an analog video signal input means, which is connected to a video signal output means, which are both coupled to a video resolution compensation means. The analog video signal input means provides decoding of a first signal type received by the input means. The first signal type operates at a first refresh rate. The video signal output means receives the decoded first signal type and converts the decoded first signal type into a second signal type, which has a second refresh rate. This second signal type typically is compatible for viewing on a display incompatible with the first signal type. Then, the video resolution compensation means modifies the second refresh rate associated with the decoded second signal type so as to be compatible with the first refresh rate and displayable on the video monitor.

Abstract: A method and apparatus is presented for video image compression using a unique operand decomposition technique combined with an innovative data scatter and retrieve process. This combination of features allows the use of single ported RAM structures where multiported RAMS would normally be used, such as when retrieving two operands in the same time cycle. As applied to the Discrete Cosine Transformation this method and appatatus additionally allows elimination of the usual prior art use of a separate transpose matrix buffer. The elimination of the separate transpose matrix buffer is accomplished by combining the transpose matrix intermediate results memory storage with the memory buffer used for the other intermediate results in a double buffer system.

Abstract: A modem is incorporated into a laptop computer and directly connected to either a cellular phone, a land line, or both. The modem is provided with two connectors, one for connection with a cellular phone or external DAA, the other for connection to a normal land line via an internal DAA. The modem selectively enables either the connector for the cellular phone or external DAA, or the connector for its internal DAA. The modem defaults to selecting the cellular phone or external DAA if it is connected, and only if they are not connected selects the internal DAA. These defaults can be overridden by user commands. Further, the modem can independently power down a connected internal DAA, external DAA, or cellular phone to conserve power.

Abstract: Systems and methods for ensuring that two different subordinate transactions will not be created at any given transaction processing node for the same parent transaction. Upon receiving a work request from a remote transaction processing system, the local transaction manager creates a local subordinate transaction associated with the parent transaction. A local transaction identifier that identifies the local subordinate transaction is also created. The local identifier includes an indicator, such as a one-bit flag, which identifies the local subordinate transaction as an imported transaction. The global identifier for the parent transaction is stored to a map in association with the transaction identifier of the new local subordinate transaction.