Patents Assigned to Core Inc.
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Publication number: 20150301983Abstract: The present invention relates to a method for compiling code for a multi-core processor, comprising: detecting and optimizing a loop, partitioning the loop into partitions executable and mappable on physical hardware with optimal instruction level parallelism, optimizing the loop iterations and/or loop counter for ideal mapping on hardware, chaining the loop partitions generating a list representing the execution sequence of the partitions.Type: ApplicationFiled: April 22, 2015Publication date: October 22, 2015Applicant: HYPERION CORE INC.Inventor: Martin Vorbach
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Patent number: 9152427Abstract: The present invention discloses a single chip sequential processor comprising at least one ALU-Block wherein said sequential processor is capable of maintaining its op-codes while processing data such as to overcome the necessity of requiring a new instruction in every clock cycle.Type: GrantFiled: October 15, 2009Date of Patent: October 6, 2015Assignee: Hyperion Core, Inc.Inventors: Martin Vorbach, Frank May, Markus Weinhardt
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Patent number: 9086973Abstract: The invention relates to a multi-core processor system, in particular a single-package multi-core processor system, comprising at least two processor cores, preferably at least four processor cores, each of said at least two cores, preferably at least four processor cores, having a local LEVEL-1 cache, a tree communication structure combining the multiple LEVEL-1 caches, the tree having at least one node, preferably at least three nodes for a four processor core multi-core processor, and TAG information is associated to data managed within the tree, usable in the treatment of the data.Type: GrantFiled: June 9, 2010Date of Patent: July 21, 2015Assignee: Hyperion Core, Inc.Inventor: Martin Vorbach
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Patent number: 9043769Abstract: The present invention relates to a method for compiling code for a multi-core processor, comprising: detecting and optimizing a loop, partitioning the loop into partitions executable and mappable on physical hardware with optimal instruction level parallelism, optimizing the loop iterations and/or loop counter for ideal mapping on hardware, chaining the loop partitions generating a list representing the execution sequence of the partitions.Type: GrantFiled: December 28, 2010Date of Patent: May 26, 2015Assignee: Hyperion Core Inc.Inventor: Martin Vorbach
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Publication number: 20140351563Abstract: The present invention relates to a processor core having an execution unit comprising an arrangement of Arithmetic-Logic-Units, wherein the operation mode of the execution unit is switchable between an asynchronous operation of the Arithmetic-Logic-Units and interconnection between the Arithmetic-Logic-Units such that a signal. from the register file crosses the execution unit and is receipt by the register file in one clock cycle; and wherein a pipelined operation mode of at least one of the Arithmetic-Logic-Units and the interconnection between the Arithmetic-Logic-Units such that a signal requires from the register file through the execution unit back to the register file more than one clock cycles.Type: ApplicationFiled: December 17, 2012Publication date: November 27, 2014Applicant: HYPERION CORE INC.Inventor: Martin Vorbach
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Publication number: 20140310696Abstract: The present invention relates to a method for compiling high-level software code into hardware, transforming each instruction into a respective hardware block and using an execution control signal representing the program pointer for triggering the execution within each respective hardware block.Type: ApplicationFiled: June 6, 2012Publication date: October 16, 2014Applicant: HYPERION CORE INC.Inventor: Martin Vorbach
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Publication number: 20140174174Abstract: Embodiments disclosed include a system and method for development of core muscles' support, comprising a means for identifying a user qualifying movement, a means for detecting a core muscle contraction in the identified qualifying movement, a means for discriminating between a core muscle contraction and no core muscle contraction in the identified qualifying movement; and a means to provide feedback to the user.Type: ApplicationFiled: December 18, 2013Publication date: June 26, 2014Applicant: Alert Core, Inc.Inventors: Gregory Takeo Uehara, Brian Taylor Brunn
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Patent number: 8550196Abstract: A novel multiple induction electric motor and vehicle that stores electrical power; provides a first and second direct current power input from the stored electrical power; separately produces first and second synchronized variable frequency alternating current control signal from the first and second direct current power inputs, respectively; produces first and second synchronized rotating magnetic fields responsive to the first and second variable frequency alternating current control signals, respectively; induces a first induced magnetic field around a conductor in a first inductive rotor responsive to the first rotating magnetic field; induces a second induced magnetic field around a conductor in a second inductive rotor responsive to the second rotating magnetic field; applies first and second rotational forces between the first and second rotating magnetic fields and the first and second induced magnetic fields to the shaft; and transmits the first and second rotational forces to a drive wheel.Type: GrantFiled: August 27, 2010Date of Patent: October 8, 2013Assignee: New Core, Inc.Inventor: Robert Ross
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Publication number: 20130191817Abstract: The present invention relates to a method for compiling code for a multi-core processor, comprising: detecting and optimizing a loop, partitioning the loop into partitions executable and mappable on physical hardware with optimal instruction level parallelism, optimizing the loop iterations and/or loop counter for ideal mapping on hardware, chaining the loop partitions generating a list representing the execution sequence of the partitions.Type: ApplicationFiled: December 28, 2010Publication date: July 25, 2013Applicant: HYPERION CORE, INC.Inventor: Martin Vorbach
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Patent number: 8453934Abstract: A technique and a light emitting device that can smoothly read out data while tracking a position of the light emitting device (an object). The light emitting device expresses data with “a change in the change of a color (switching of changes)”. The light emitting device specifies an object and the position thereof with a first primary change and thereafter expresses data with, so to speak, a secondary change (switching of the primary change). The primary change means that G and B alternately turn on (indicated by G*B) and so on. The secondary change means a change from the condition (G*B), in which G and B alternately turn on, to the condition (B*R) in which B and R alternately turn on. Thus, since data is expressed by the change of color condition changes, it is easier to freely express data while the position of an object is specified.Type: GrantFiled: February 16, 2011Date of Patent: June 4, 2013Assignee: B-Core Inc.Inventor: Akiteru Kimura
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Publication number: 20130032978Abstract: A burner enclosure for use in locating a burner in an a wall of an electric arc furnace, the burner enclosure includes a plurality of walls wherein each wall includes a serpentine cooling path therein and an inlet located proximal a first edge of each wall and an outlet located proximal a second edge of each wall and wherein the walls are assembled into the burner enclosure so an inlet of one wall can be connected by an elbow to an outlet of an adjoining wall to create a cooling fluid flow path through the entire burner enclosure to improve the performance of the burner in the burner enclosure and to improve the overall efficiency of the electric arc furnace.Type: ApplicationFiled: August 1, 2012Publication date: February 7, 2013Applicant: NU-CORE, INC.Inventor: Joshua W. Glass
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Publication number: 20120216012Abstract: The present invention discloses a single chip sequential processor comprising at least one ALU-Block wherein said sequential processor is capable of maintaining its op-codes while processing data such as to overcome the necessity of requiring a new instruction in every clock cycle.Type: ApplicationFiled: October 15, 2009Publication date: August 23, 2012Applicant: HYPERION CORE, INC.Inventors: Martin Vorbach, Frank May, Markus Weinhardt
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Publication number: 20120186888Abstract: A novel multiple induction electric motor and vehicle that stores electrical power; provides a first and second direct current power input from the stored electrical power; separately produces first and second synchronized variable frequency alternating current control signal from the first and second direct current power inputs, respectively; produces first and second synchronized rotating magnetic fields responsive to the first and second variable frequency alternating current control signals, respectively; induces a first induced magnetic field around a conductor in a first inductive rotor responsive to the first rotating magnetic field; induces a second induced magnetic field around a conductor in a second inductive rotor responsive to the second rotating magnetic field; applies first and second rotational forces between the first and second rotating magnetic fields and the first and second induced magnetic fields to the shaft; and transmits the first and second rotational forces to a drive wheel.Type: ApplicationFiled: August 27, 2010Publication date: July 26, 2012Applicant: New Core, Inc.Inventor: Robert Ross
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Publication number: 20120137075Abstract: The invention relates to a multi-core processor system, in particular a single-package multi-core processor system, comprising at least two processor cores, preferably at least four processor cores, each of said at least two cores, preferably at least four processor cores, having a local LEVEL-1 cache, a tree communication structure combining the multiple LEVEL-1 caches, the tree having at least one node, preferably at least three nodes for a four processor core multi-core processor, and TAG information is associated to data managed within the tree, usable in the treatment of the data.Type: ApplicationFiled: June 9, 2010Publication date: May 31, 2012Applicant: HYPERION CORE, INC.Inventor: Martin Vorbach
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Patent number: 8142711Abstract: A forged copper burner enclosure capable of being mounted within the side wall of a steel melting furnace for the purpose of providing an improved cooling characteristic to a burner lance. The burner enclosure is provided with a central passage adapted to receive a burner lance for injecting oxygen into the batch of molten metal of an electric arc furnace. The forged burner enclosure is positioned such that only a solid forged copper face is on the furnace side when installed. The burner enclosure has an optional through hole which can be used for the purpose of treating the metal melt with particulate supply ranging from slag forming materials to metallurgical materials.Type: GrantFiled: April 2, 2009Date of Patent: March 27, 2012Assignee: Nu-Core, Inc.Inventor: Joshua W. Glass
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Patent number: 8113432Abstract: It is possible to linearly arrange cells and indicate particular data in the order of colors of respective sells. A code system uses an optical symbol decoding method capable of reading the color arrangement if the arrangement continuity and the linear shape are maintained. The data expression method may be other than “the order of colors.” For example, it is possible to employ a method for allocating a numeric value to each of the colors by one-to-one correspondence (R=0, B=1, etc.), a method for allocating data by a color transition (“CM”=“MY”=“YC”=0, “CY”=“YM”=“MC”=1, etc.), a method for allocating data for a combination of colors, and the like.Type: GrantFiled: July 18, 2007Date of Patent: February 14, 2012Assignee: B-Core Inc.Inventors: Akiteru Kimura, Masayuki Matsuda, Kunio Kando
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Publication number: 20110150285Abstract: A technique and a light emitting device that can smoothly read out data while tracking a position of the light emitting device (an object). The light emitting device expresses data with “a change in the change of a color (switching of changes)”. The light emitting device specifies an object and the position thereof with a first primary change and thereafter expresses data with, so to speak, a secondary change (switching of the primary change). The primary change means that G and B alternately turn on (indicated by G*B) and so on. The secondary change means a change from the condition (G*B), in which G and B alternately turn on, to the condition (B*R) in which B and R alternately turn on. Thus, since data is expressed by the change of color condition changes, it is easier to freely express data while the position of an object is specified.Type: ApplicationFiled: February 16, 2011Publication date: June 23, 2011Applicant: B-CORE INC.Inventor: Akiteru KIMURA
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Publication number: 20100301120Abstract: A technology to measure the position of a distant mark object and denote an automatic recognition data by the object. A light-emitting device includes an R (red) light, a G (green) light, and a B (blue) light emitters, and a control device for controlling their light-up states. The light-emitting device is affixed to the mark object and made to emit the lights by a predetermined light-emitting pattern. The light-emitting pattern forms a time-change optical recognition code denoting a desired data by change of the colors along the time axis. This optical recognition code is accomplished with a small area of space. Further, by photographing the light-emitting device with a CCD camera and the like, it is possible to recognize the position of the light-emitting device, that is, the position of the mark object. By carrying out this behavior continuously, it is possible to trace the movement of the mark object.Type: ApplicationFiled: June 24, 2010Publication date: December 2, 2010Applicant: B-CORE INC.Inventor: Akiteru Kimura
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Publication number: 20100252636Abstract: A method that lays a certain restriction on a distance between color areas and carries out “cutting out” and “sequence recognition.” In an optical recognition code which aligns a plurality of cells to predetermined color is affixed and denotes a data by a sequence of colors, distance between the cells is stipulated to allow an easier reading-out of the code. A distance between the cells contiguous to each other is > a predetermined minimum value and < a predetermined maximum value. The distance between one of the cells and another of the contiguous cells is shorter than a distance between the one of the cells and another of the noncontiguous cells. Under these conditions, it is possible to read out the optical recognition code in the sequence of the cells by sequentially tracing the near-positioned cells with the distance as a clue.Type: ApplicationFiled: April 8, 2010Publication date: October 7, 2010Applicant: B-CORE INC.Inventor: Akiteru Kimura
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Publication number: 20100042231Abstract: Tools for the maintenance of complex plants or systems are provided. A master equipment list of components included in a complex plant are organized according to systems. Those components that are critical to the function of the associated system are identified. A template modeling aspects of each critical component is prepared. Information included in applied templates can be reused in association with common or similar components. Particular information included in applied templates may include information related to critical parts within the component, and information regarding maintenance requirements and procedures associated with the component or parts included in the component.Type: ApplicationFiled: October 19, 2009Publication date: February 18, 2010Applicant: Core, Inc.Inventors: James Kermit August, Krishna Vasudevan