Patents Assigned to Covalent Material Corporation
  • Patent number: 7977219
    Abstract: In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: July 12, 2011
    Assignee: Covalent Materials Corporation
    Inventors: Hiromichi Isogai, Takeshi Senda, Eiji Toyoda, Kumiko Murayama, Koji Izunome, Susumu Maeda, Kazuhiko Kashima
  • Patent number: 7909931
    Abstract: The present invention provides a silica glass crucible for manufacturing a silicon single crystal, in which melt vibration can be controlled more certainly and a high yield of single crystal can be realized. A first substantially bubble-free layer 10a having a thickness of 100 ?m-450 ?m is formed on the inner periphery side of an initial melt line zone 10 which has a height of 10 mm-30 mm, of a transparent layer, a bubble-containing layer 10b having a thickness of 100 ?m or more and bubbles with an average diameter of 20 ?m-60 ?m is formed outside the above-mentioned first substantially bubble-free layer 10a, and a second substantially bubble-free layer 10c having a thickness of 300 ?m or more is formed on the inner periphery side in the whole region lower than the above-mentioned initial melt line zone 10.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: March 22, 2011
    Assignee: Covalent Materials Corporation
    Inventors: Ryouhei Saito, Toshiyuki Kikuchi, Kiyoaki Misu, Kazuko Fukutani, Kazuyoshi Kato
  • Publication number: 20110062556
    Abstract: A compound semiconductor substrate which inhibits the generation of a crack or a warp and is preferable for a normally-off type high breakdown voltage device, arranged that a multilayer buffer layer 2 in which AlxGa1-xN single crystal layers (0.6?X?1.0) 21 containing carbon from 1×1018 atoms/cm3 to 1×1021 atoms/cm3 and AlyGa1-yN single crystal layers (0.1?y?0.5) 22 containing carbon from 1×1017 atoms/cm3 to 1×1021 atoms/cm3 are alternately and repeatedly stacked in order, and a nitride active layer 3 provided with an electron transport layer 31 having a carbon concentration of 5×1017 atoms/cm3 or less and an electron supply layer 32 are deposited on a Si single crystal substrate 1 in order. The carbon concentrations of the AlxGa1-xN single crystal layers 21 and that of the AlyGa1-yN single crystal layers 22 respectively decrease from the substrate 1 side towards the above-mentioned active layer 3 side. In this way, the compound semiconductor substrate is produced.
    Type: Application
    Filed: September 10, 2010
    Publication date: March 17, 2011
    Applicant: COVALENT MATERIALS CORPORATION
    Inventors: Jun KOMIYAMA, Kenichi Eriguchi, Hiroshi Oishi, Yoshihisa Abe, Akira Yoshida, Shunichi Suzuki
  • Publication number: 20100244100
    Abstract: The present invention provides a compound semiconductor substrate, including: a single-crystal silicon substrate having a crystal face with (111) orientation; a first buffer layer which is formed on the single-crystal silicon substrate and is constituted of an AlxGa1-xN single crystal (0<x?1); a second buffer layer which is formed on the first buffer layer and is composed of a plurality of first unit layers each having a thickness of from 250 nm to 350 nm and constituted of an AlyGa1-yN single crystal (0?y<0.1) and a plurality of second unit layers each having a thickness of from 5 nm to 20 nm and constituted of an AlzGa1-zN single crystal (0.9<z?1), said pluralities of first and second unit layers having been alternately superposed; and a semiconductor device formation region which is formed on the second buffer layer and includes at least one nitride-based semiconductor single-crystal layer.
    Type: Application
    Filed: March 25, 2010
    Publication date: September 30, 2010
    Applicant: COVALENT MATERIALS CORPORATION
    Inventors: Hiroshi Oishi, Jun Komiyama, Kenichi Eriguchi, Yoshihisa Abe, Akira Yoshida, Shunichi Suzuki
  • Publication number: 20100224620
    Abstract: [Problem to be Solved] To provide a plane heater including a carbon wire heating element which has an arrangement pattern allowing a heating surface to be a substantially uniform heating temperature plane. [Means to Solve Problem] Surface arrangement densities of a carbon wire heating element CW are different in an inner area and an outer area located in the periphery. The surface arrangement density in the above-mentioned outer area is denser than the surface arrangement density in the inner area. A power supply terminal unit 8 having connection wires for supplying electricity to the above-mentioned heating element CW is arranged in the center on the back side of the above-mentioned silica glass plate-like member 2. The connection wires 4a and 4b connected with the carbon wire heating element in the above-mentioned inner area are connected with the carbon wire heating element CW in the inner area in the center of the above-mentioned silica glass plate-like member.
    Type: Application
    Filed: February 7, 2007
    Publication date: September 9, 2010
    Applicants: COVALENT MATERIALS CORPORATION, TOKYO ELECTRON LIMITED
    Inventors: Kazuo Shibata, Hiroo Kawasaki, Teruo Iwata, Manabu Amikura
  • Publication number: 20100197146
    Abstract: In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.
    Type: Application
    Filed: January 21, 2010
    Publication date: August 5, 2010
    Applicant: COVALENT MATERIALS CORPORATION
    Inventors: Takeshi Senda, Hiromichi Isogai, Eiji Toyoda, Kumiko Murayama, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Koji Izunome, Susumu Maeda, Kazuhiko Kashima
  • Publication number: 20100101485
    Abstract: In appropriate setting of magnetic field applied to a molten silicon 12 stored in a cylindrical quartz crucible 11, the maximum value B0 of magnetic flux density on a vertical symmetric axis 17 as a cylindrical axis of the quartz crucible 11 in horizontal magnetic field generated by a pair of exciting coils 13 and 14 calls B0. On circle at which horizontally symmetric plane 18 traversing and perpendicular to a vertically symmetric axis 17 becoming magnetic flux B0 crosses an inner diameter of the quartz crucible 11, the minimum value of magnetic flux density calls Bmin, and the maximum value of magnetic flux density calls Bmax. Those magnetic flux densities B0, Bmin and Bmax are adjusted to be given ranges, and upward flow and temperature of a molten silicon 12 at the lower part of a solid-liquid interface 15a are appropriately controlled.
    Type: Application
    Filed: October 14, 2009
    Publication date: April 29, 2010
    Applicant: Covalent Materials Corporation
    Inventors: Senlin Fu, Toshio Hisaichi
  • Patent number: 7699612
    Abstract: A fixing member for an implant which comprises a tube or a pillar made of an hydroxyapatite ceramics at least one part of which is a ceramics porous article consisting essentially of a hydroxyapatite formed by agitation foaming, in which a number of approximately spherical pores mutually contact having pore structures communicated three-dimensionally opened at the contact area and having an averaged porosity of from 65% to 85%. A method for fixing an implant comprising a step of inserting an implant whose at least one part of the periphery is integrated with a hydroxyapatite ceramics into an implant insertion site of an alveolar bone or a gnathic bone. A method for fixing an implant, a fixing member for the implant and an implant composite in order to reinforce an implant insertion site by compensating or regenerating an alveolar bone or a gnathic bone on an implant treatment in dentistry or in oral surgery is obtained.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: April 20, 2010
    Assignees: Covalent Materials Corporation, MMT Co., Ltd.
    Inventors: Yasumasa Akagawa, Takayasu Kubo, Kazuya Doi
  • Publication number: 20100069227
    Abstract: The present invention provides ceramics for a plasma-treatment apparatus which are excellent in corrosion resistance against a halogen-type corrosive gas, plasma, etc., attain reduction in resistance, and inhibit impurity metal contamination caused by composition materials of these ceramics even in a halogen plasma process, and which can be used suitably for the component of the plasma-treatment apparatus for manufacturing a semiconductor, a liquid crystal, etc. The ceramics are used which are prepared in such a way that 3% by weight to 30% by weight of a cerium oxide relative to yttria and 3% by weight to 50% by weight of niobium pentoxide relative to yttria are added to yttria, which are fired in a reducing atmosphere to have an open porosity of 1.0% or less.
    Type: Application
    Filed: September 11, 2009
    Publication date: March 18, 2010
    Applicant: Covalent Materials Corporation
    Inventors: Keisuke WATANABE, Yukitaka Murata, Shintaro Matsumoto
  • Patent number: 7679730
    Abstract: An image pickup device disposed in a predetermined position relative to a surface of a strained silicon wafer photographs the surface of the strained silicon wafer in a plurality of rotation angle positions on photographing conditions under which bright lines appearing on the surface of the strained silicon wafer can be photographed, in an environment where a light source device illuminates the surface of the strained silicon wafer which is rotating. A composite image in a predetermined angle position is generated from surface images of the strained silicon wafer in a plurality of rotation angle positions obtained by the image pickup device.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: March 16, 2010
    Assignees: Shibaura Mechatronics Corporation, Covalent Materials Corporation
    Inventors: Hideaki Takano, Miyuki Shimizu, Takeshi Senda, Koji Izunome, Yoshinori Hayashi, Kazuhiko Hamatani
  • Patent number: 7608553
    Abstract: The invention intends to obtain a transparent yttrium oxide sintered body of which in-line transmittance in a visible wavelength region of 400 to 800 nm at a thickness of 1 mm is 60% or more, without using aluminum that readily segregates in grain boundaries of yttrium oxide, without using special raw materials in which a silicon content is particularly reduced and without finely pulverizing raw materials. A transparent yttrium oxide sintered body that contains, with yttrium oxide as a main component, at least either one of tantalum or niobium or both thereof and has the in-line transmittance of 60% or more at a thickness of 1 mm in a visible wavelength region in the range of 400 to 800 nm.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: October 27, 2009
    Assignee: Covalent Materials Corporation
    Inventors: Mitsuhiro Fujita, Masaki Irie
  • Patent number: 7588638
    Abstract: A single crystal pulling apparatus having a heater 4 melting material silicon by thermal radiation from a cylindrical exothermic part 4a which surrounds a crucible 3 inside a furnace body 2 and an electromagnet 13 which is prepared to surround the furnace body 2 and applies a transverse magnetic field to the silicon liquid melt in the crucible 3 is provided. A length h in a pull-up axis direction in the exothermic part 4a of the heater 4 is arranged to be 0.5 times to 0.9 times an inner diameter of the crucible 3, a first middle position in the pull-up axis direction in the exothermic part 4a is arranged below a second middle position in the pull-up axis direction in the electromagnet 13, and a distance difference d between the first and second middle positions is 0.15 times to 0.55 times the inner diameter R of the crucible 3.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: September 15, 2009
    Assignee: Covalent Materials Corporation
    Inventor: Toshio Hisaichi
  • Patent number: 7514364
    Abstract: In a hydrophilicity treatment method including the step of rotating, on a polishing cloth, a mirror surface of a silicon wafer subjected to mirror-polishing followed by rinsing treatment while the mirror surface is pushed onto the cloth under the application of a small load with the contact of the mirror surface with a hydrophilicity treatment liquid, thereby making the mirror surface hydrophilic, the hydrophilicity treatment liquid is an aqueous liquid which comprises an organic compound having at least one hydrophilic group and having a molecular weight of 100 or more, a basic nitrogen-containing organic compound and a surfactant, and which has a pH of 9.5 to 10.5.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: April 7, 2009
    Assignee: Covalent Materials Corporation
    Inventor: Takao Sakamoto
  • Publication number: 20090066933
    Abstract: An image pickup device disposed in a predetermined position relative to a surface of a strained silicon wafer photographs the surface of the strained silicon wafer in a plurality of rotation angle positions on photographing conditions under which bright lines appearing on the surface of the strained silicon wafer can be photographed, in an environment where a light source device illuminates the surface of the strained silicon wafer which is rotating. A composite image in a predetermined angle position is generated from surface images of the strained silicon wafer in a plurality of rotation angle positions obtained by the image pickup device.
    Type: Application
    Filed: March 27, 2006
    Publication date: March 12, 2009
    Applicants: SHIBAURA MECHATRONICS CORPORATION, COVALENT MATERIALS CORPORATION
    Inventors: Hideaki Takano, Miyuki Shimizu, Takeshi Sendia, Koji Izunome, Yoshinori Hayashi, Kazuhiko Hamatani
  • Patent number: 7485593
    Abstract: To provide titania-silica glass which is transparent glass of low thermal expansion, in particular, is of a low thermal expansion coefficient over a wide range of temperatures of 0 to 100° C. (an operating temperature range) when it is used as a photomask or a mirror material in extreme ultraviolet ray lithography, and which is excellent in homogeneity within the field and stability. Titania-silica glass is used which has 8 to 10% by weight of titania and 90 to 92% by weight of silica, where a Ti3+ concentration is 10 to 60 ppm by weight.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: February 3, 2009
    Assignee: Covalent Materials Corporation
    Inventors: Masanobu Ezaki, Masashi Kobata, Sachiko Kato
  • Patent number: 7476634
    Abstract: To provide a yttria sintered body having an excellent corrosion resistance to halogen-based corrosive gases and plasma and an excellent thermal shock resistance, and adapted for use as a component member in manufacturing apparatuses for semiconductor and liquid crystal devices, particularly in a plasma process apparatus. A yttria sintered body including tungsten of an average particle size of 3 ?m or less dispersed in the yttria so that a ratio of the tungsten relative to the yttria is ranging from 1 to 50% in terms of weight, and having an open pore rate of 0.2% or less and a thermal shock resistance by water submersion method of 200° C. or larger.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: January 13, 2009
    Assignee: Covalent Materials Corporation
    Inventors: Sachiyuki Nagasaka, Keiji Morita, Keisuke Watanabe
  • Publication number: 20090004825
    Abstract: A method of manufacturing a semiconductor substrate having a DSB structure that enables simplification of a manufacturing process by optimizing a total thickness of oxides on surfaces of two wafers before being bonded together is provided. The method comprises a process of preparing a first semiconductor wafer and a second semiconductor wafer, a process of bonding the first semiconductor wafer and second semiconductor wafer when a total of thickness of an oxide on the surface of the first semiconductor wafer and that of an oxide on the surface of the second semiconductor wafer is 0.4 nm or more and 1.0 nm or less, and a process of providing heat treatment to a semiconductor substrate after the process of the bonding and before a process of thinning one of the wafers.
    Type: Application
    Filed: January 4, 2008
    Publication date: January 1, 2009
    Applicant: Covalent Materials Corporation
    Inventors: Takeshi SENDA, Hiromichi ISOGAI, Eiji TOYODA, Akiko NARITA, Koji IZUNOME
  • Publication number: 20080271490
    Abstract: A three-dimensional (micro-) channel structure with an increased length of internal channel is provided, which can be formed without requiring a boring step for vertical hole formation. The channel structure is formed by providing a polyhedral substrate with a groove over at least two faces thereof, preferably through press molding, and covering the faces provided with the grooves with a covering member or another polyhedral substrate to form a continuous internal channel communicative with an ambience through an opening.
    Type: Application
    Filed: July 3, 2008
    Publication date: November 6, 2008
    Applicants: Covalent Materials Corporation, KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroyuki GOTO, Hajime Sudo
  • Publication number: 20080237190
    Abstract: A surface cleaning method of a semiconductor wafer heat treatment boat that can prevent metallic contamination to semiconductor wafers and keep down a production time and manufacturing costs of semiconductor wafers by efficiently and easily removing metallic impurities in an oxide film on an SiC boat surface is provided. A surface cleaning method of a semiconductor wafer heat treatment boat according to an embodiment of the present invention is a surface cleaning method of a semiconductor wafer heat treatment boat whose surface is formed of SiC, includes oxidizing the surface of the heat treatment boat by thermal oxidation and etching a portion of the oxide film formed after oxidation is removed.
    Type: Application
    Filed: September 26, 2007
    Publication date: October 2, 2008
    Applicant: Covalent Materials Corporation
    Inventors: Tatsuhiko Aoki, Motohiro Sei, Koji Araki
  • Patent number: 7403278
    Abstract: A surface inspection apparatus, for inspecting a plurality of surfaces formed in a peripheral edge portion of a plate-like object, includes a image pickup mechanism, which photographs the peripheral edge portion of the plate-like object having a plurality of surfaces, and an image processing device, which processes an image obtained by the photographing device. The image pickup mechanism includes an optical system which guides images of the plurality of surfaces of the plate-like object in one direction, and a camera unit having an image pickup surface, on which the images of the plurality of surfaces guided by the optical system in the one direction are formed.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: July 22, 2008
    Assignees: Shibaura Mechatronics Corporation, Covalent Materials Corporation
    Inventors: Yoshinori Hayashi, Hiroyuki Naraidate, Makoto Kyoya, Koji Izunome, Hiromi Nagahama, Miyuki Shimizu, Kazuhiko Hamatani