Patents Assigned to Covalent Material Corporation
  • Publication number: 20080164572
    Abstract: A semiconductor substrate whose surface roughness is reduced by optimizing an inclination (off angle) with respect to a {110} surface of the semiconductor substrate surface and a manufacturing method thereof are provided. The surface of the semiconductor substrate has the inclination (off angle) of 0 degree or more and 0.12 degrees or less, or 5 degrees or more and 11 degrees or less, preferably 6 degrees or more and 9 degrees or less with respect to the {110} surface. The manufacturing method of a semiconductor substrate has a process in which a semiconductor single crystal ingot is sliced at an inclination (off angle) of 5 degrees or more and 11 degrees or less, preferably 6 degrees or more and 9 degrees or less with respect to the {110} surface.
    Type: Application
    Filed: December 19, 2007
    Publication date: July 10, 2008
    Applicant: Covalent Materials Corporation
    Inventors: Eiji Toyoda, Takeshi Senda, Akiko Narita, Hiromichi Isogai, Koji Izunome
  • Patent number: 7396409
    Abstract: By uniformly forming an indefinite number of microscopic acicular crystals on a surface of a silicon substrate so as to be perpendicular to the surface of the substrate by plasma CVD method using a catalyst, it is possible to reliably, homogeneously and massively form an ultramicroscopic acicular silicon crystal having a substantial cone shape tapered so as to have a radius of curvature of not less than 1 nm to no more than 20 nm at its tip end and having a diameter of bottom surface of not less than 10 nm, and a height equivalent to or more than the diameter of bottom surface, at a desired location.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: July 8, 2008
    Assignees: Covalent Materials Corporation, Techno Network Shikoku Co., Ltd.
    Inventors: Akitmitsu Hatta, Hiroaki Yoshimura, Keiichi Ishimoto, Hiroaki Kanakusa, Shinichi Kawagoe
  • Patent number: 7393418
    Abstract: A susceptor at least a surface thereof being coated with SiC, includes a recess where an wafer is mounted, the recess having an round portion disposed on a lower portion of an outer circumferential portion of the recess, a ring-shaped SiC crystal growth surface portion provided within the round portion in a range of 0.05 mm or more and 0.3 mm or less defined from an outer circumference vertical portion of the recess and a contact portion, where the susceptor contacts with the wafer on the recess, having a surface roughness Ra in a range of 0.5 ?m or more and 3 ?m or less.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: July 1, 2008
    Assignee: Covalent Materials Corporation
    Inventor: Masanari Yokogawa
  • Patent number: 7381362
    Abstract: To provide a method for producing a ceramic porous material which has a high strength, though it has a high porosity, and which is excellent in permeability without dust generation. In a ceramic porous material having a three-dimensional mesh-like skeleton structure with a large number of substantially spherical adjacent cells communicating with each other via communication holes, the crystal particle size at the rim of each communication hole in the skeleton structure is provided substantially equal to the crystal particle size in the other parts.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: June 3, 2008
    Assignee: Covalent Materials Corporation
    Inventors: Hideo Uemoto, Kazuhide Kawai, Shunzo Shimai, Takashi Matsuyama
  • Patent number: 7374955
    Abstract: The present invention provides a method of manufacturing a silicon wafer where a defect does not exist at a wafer surface layer part on which a device is formed, without affecting productivity and production costs of the wafer. An ingot of a silicon single crystal is grown by way of Czochralski single crystal pulling method, this silicon single crystal ingot is sliced to produce a wafer, then a surface layer of the wafer is annealed for between 0.01 microseconds and 10 seconds (inclusive) by means of a laser spike annealing apparatus such that a temperature of a wafer surface layer part is between 1250° C. and 1400° C. (inclusive).
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: May 20, 2008
    Assignee: Covalent Materials Corporation
    Inventor: Koji Izumome
  • Patent number: 7368757
    Abstract: A back electrode 6 is formed in the back of a Si single crystal substrate 2 of a compound semiconductor in which an n-type 3C-SiC single crystal buffer layer 3 having a thickness of 0.05-2 ?m, a carrier concentration of 1016-1021/cm3, a hexagonal InwGaxAl1-w-xN single crystal buffer layer 4 (0?w<1, 0?x<1, w+x<1) having a thickness of 0.01-0.5 ?m, and an n-type hexagonal InyGazAl1-y-zN single crystal layer 5 (0?y<1, 0<z?1, y+z?1) having a thickness of 0.1-5 ?m and a carrier concentration of 1011-1016/cm3 are stacked in order on an n-type Si single crystal substrate top 2 having a crystal-plane orientation {111}, a carrier concentration of 1016-1021/cm3, and a surface electrode 7 is formed on a surface of a hexagonal InyGazAl1-y-zN single crystal layer 5, so as to provide a compound semiconductor device which causes little energy loss and allows an high efficiency and a high breakdown voltage.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: May 6, 2008
    Assignee: Covalent Materials Corporation
    Inventors: Jun Komiyama, Yoshihisa Abe, Shunichi Suzuki, Hideo Nakanishi
  • Patent number: 7336892
    Abstract: It is provided that a reflection plate of semiconductor heat treatment, which is resistant to cracks or deformations by controlling the adsorption of foreign materials and the production of reaction. Said reflection plate 1 for semiconductor heat treatment is composed of a disk-shaped or ring-shaped plate of optically transmissible material and a plate 2 of inorganic material hermetically enclosed in said disk-shaped or ring-shaped plate, in which said plate of inorganic material has at least one side in contact with said plate of optically transmissible material, said at least one side 2a having a surface roughness of Ra 0.1 to 10.0 ?m, said at least one side 2a formed grooves 2c therein.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: February 26, 2008
    Assignees: Covalent Materials Corporation, Tokyo Electron Limited
    Inventors: Kazuhiko Shimanuki, Hiroyuki Honma, Norihiko Saito, Hideyuki Yokoyama, Takanori Saito, Ken Nakao
  • Patent number: 7291220
    Abstract: A silicon wafer made by the Czochralski method, including a ring-shaped OSF region and having nitrogen concentration ranging from 2.9×1014 to 5.0×1015 atoms/cm3 and oxygen concentration of 1.27×1018 to 3.0×1018 atoms/cm3 is heat-treated in a reducing-gas or inert-gas atmosphere, by increasing the temperature at the rate of 0.5° C./min to 2.0° C./min until the wafer is heated to a heat-treatment temperature of 1000 to 1200° C.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: November 6, 2007
    Assignee: Covalent Materials Corporation
    Inventor: Yumiko Hirano
  • Patent number: 7262485
    Abstract: A substrate 1 for growing an electro-optical single crystal thin film in which two or more layers of buffer layers 3, 4, and 5 for buffering lattice mismatch between Si and BTO are formed on an Si (001) substrate 2 is provided as a substrate for growing an electro-optical single crystal thin film which can obtain an electro-optical single crystal thin film of BTO single crystal thin film 6 etc. with a large size and a very high quality.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: August 28, 2007
    Assignee: Covalent Materials Corporation
    Inventors: Yoshihisa Abe, Shunichi Suzuki, Hideo Nakanishi, Jun Komiyama