Abstract: A system and method for cooling a plurality of electronics cabinets having horizontally positioned electronics assemblies. The system includes at least one blower configured to direct air horizontally across the electronics assemblies, and at least one intercooler configured to extract heat from the air flow such that the system is room neutral, meaning that the ambient temperature remains constant during operation of the system. A plurality of chassis backplanes and power supplies may also include an intercooler, wherein the intercoolers are electronically controlled such that the system is room neutral.

Abstract: An improved method for the prevention of deadlock in a massively parallel processor (MPP) system wherein, prior to a process sending messages to another process running on a remote processor, the process allocates space in a deadlock-avoidance FIFO. The allocated space provides a “landing zone” for requests that the software process (the application software) will subsequently issue using a remote-memory-access function. In some embodiments, the deadlock-avoidance (DLA) function provides two different deadlock-avoidance schemes: controlled discard and persistent reservation. In some embodiments, the software process determines which scheme will be used at the time the space is allocated.

Abstract: A system for allowing dynamic changing of routing information of a network interconnect while avoiding deadlocks and preserving packet ordering. A network resiliency system detects when an error in the network interconnect occurs and dynamically generates new routing information for the routers that factors in the detected error. The network resiliency system then generates new routing information that factors in the failure. The network resiliency system then directs the network interconnect to enter a quiescent state in which no packets are transiting through the network interconnect. After the network interconnect enters the quiescent state, the network resiliency system directs the loading of the new routing information into the routing tables of the network interconnect and then directs the network interconnect to start injecting request packets into the network interconnect.

Abstract: A system for updating an index into a tuple table of tuples is provided. An indexing system updates an index into a tuple table using fine-grain locking of the index. The index includes a values table with an entry for each index value of an index field that references a value-tuple table that includes, for each tuple with the index value, a row that identifies a tuple of the tuple table with that indexed value. After a new tuple is added to the tuple table with a value, the index is updated by locking the entry in the values table, updating the value-tuple table for the value, and then unlocking the entry. When the index is accessed for locating tuples with a value, the accessor locks the entry in the values table for the value, uses the value-tuple table to locate the tuples, and unlocks the entry.

Abstract: A reconnection system re-forms a control tree for an application that is executed in parallel without terminating execution of the application. The reconnection system detects when a node of a control tree has failed and directs the nodes that have not failed to reconnect to effect the re-forming of the control tree without the failed node and without terminating the application. Upon being directed to reconnect, a node identifies new child nodes that are to be its child nodes in the re-formed control tree. The node maintains the existing connection with each of its current child nodes that is also a new child node, terminates the existing connection with each of its current child nodes that is not also a new child node, establishes a new connection with any new child node that is not a current child node, and directs each new child node to reconnect.

Abstract: A system implementing a method for generating code for execution based on a SIMT model with parallel units of threads is provided. The system identifies a loop within a program that includes vector processing. The system generates instructions for a thread that include an instruction to set a predicate based on whether the thread of a parallel unit corresponds to a vector element. The system also generates instructions to perform the vector processing via scalar operations predicated on the predicate. As a result, the system generates instructions to perform the vector processing but to avoid branch divergence within the parallel unit of threads that would be needed to check whether a thread corresponds to a vector element.

Abstract: A parallelization assistant tool system to assist in parallelization of a computer program is disclosed. The system directs the execution of instrumented code of the computer program to collect performance statistics information relating to execution of loops within the computer program. The system provides a user interface for presenting to a programmer the performance statistics information collected for a loop within the computer program so that the programmer can prioritize efforts to parallelize the computer program. The system generates inlined source code of a loop by aggressively inlining functions substantially without regard to compilation performance, execution performance, or both. The system analyzes the inlined source code to determine the data-sharing attributes of the variables of the loop. The system may generate compiler directives to specify the data-sharing attributes of the variables.

Abstract: A method and system for detecting congestion in a network of nodes, abating the network congestion, and identifying the cause of the network congestion is provided. A congestion detection system may comprise a detection system, an abatement system, and a causation system. The detection system monitors the performance of network components such as the network interface controllers and tiles of routers to determine whether the network is congested such that a delay in delivering packets becomes unacceptable. Upon detecting that the network is congested, an abatement system abates the congestion by limiting the rate at which packets are injected into the network from the nodes. Upon detecting that the network is congested, a causation system may identify the job that is executing on a node that is the cause of the network congestion.

Abstract: A method and system for detecting congestion in a network of nodes, abating the network congestion, and identifying the cause of the network congestion is provided. A congestion detection system may comprise a detection system, an abatement system, and a cauzation system. The detection system monitors the performance of network components such as the network interface controllers and tiles of routers to determine whether the network is congested such that a delay in delivering packets becomes unacceptable. Upon detecting that the network is congested, an abatement system abates the congestion by limiting the rate at which packets are injected into the network from the nodes. Upon detecting that the network is congested, a cauzation system may identify the job that is executing on a node that is the cause of the network congestion.

Abstract: A computer system is operable to identify subfields that differ in two data elements using a bit matrix compare function between a first matrix filled with pattern elements and a reference pattern.

Abstract: A method and system in a computer system for dynamically providing a graphical representation of a data store of entries via a matrix interface is disclosed. A dynamic graph system provides a matrix interface that exposes to an application program a graphical representation of data stored in a data store such as a semantic database storing triples. To the application program, the matrix interface represents the graph as a sparse adjacency matrix that is stored in compressed form. Each entry of the data store is considered to represent a link between nodes of the graph. Each entry has a first field and a second field identifying the nodes connected by the link and a third field with a value for the link that connects the identified nodes. The first, second, and third fields represent the rows, column, and elements of the adjacency matrix.

Abstract: A computerized method, apparatus, and executable instructions on a machine readable medium for using multiple processors in parallel to create a pack vector from an array in memory. In some embodiments creating the pack vector includes reading portions of the array into a plurality of processors that each select a subset of elements from the their respective portions of the array based on a predetermined criteria. Some embodiments further include counting each of the selected subsets of elements and storing each count in a commonly accessible storage location, reading into the processors at least some of the count values once all of the processors have stored their count, and storing only the selected subsets of elements in the pack vector based at least in part on the count values.

Abstract: A method and system for detecting congestion in a network of nodes, abating the network congestion, and identifying the cause of the network congestion is provided. A congestion detection system may comprise a detection system, an abatement system, and a causation system. The detection system monitors the performance of network components such as the network interface controllers and tiles of routers to determine whether the network is congested such that a delay in delivering packets becomes unacceptable. Upon detecting that the network is congested, an abatement system abates the congestion by limiting the rate at which packets are injected into the network from the nodes. Upon detecting that the network is congested, a causation system may identify the job that is executing on a node that is the cause of the network congestion.

Abstract: A multi-layer printed circuit board has a number of landing pads that are configured to engage a connector secured thereto. Between the landing pads associated with different signals is at least one micro via that is electrically connected to a ground plane on an outer surface of the multi-layer printed circuit board, and a ground plane on an inner layer of the multi-layer printed circuit board.

Abstract: A system for allowing dynamic changing of routing information of a network interconnect while avoiding deadlocks and preserving packet ordering. A network resiliency system detects when an error in the network interconnect occurs and dynamically generates new routing information for the routers that factors in the detected error. The network resiliency system then generates new routing information that factors in the failure. The network resiliency system then directs the network interconnect to enter a quiescent state in which no packets are transiting through the network interconnect. After the network interconnect enters the quiescent state, the network resiliency system directs the loading of the new routing information into the routing tables of the network interconnect and then directs the network interconnect to start injecting request packets into the network interconnect.

Abstract: A method and system for interfacing SPARQL front ends of SPARQL systems to a non-SPARQL system is provided. A translated SPARQL (“tSPARQL”) system inputs a translated SPARQL query, generates commands for a non-SPARQL system based on the tSPARQL query, and provides those commands to the non-SPARQL system for executing the SPARQL query corresponding to the tSPARQL query. The tSPARQL system translates the tSPARQL query into commands that are provided to a non-SPARQL query engine for executing the SPARQL query represented by the tSPARQL query. When the tSPARQL system receives results of the commands, it provides the results to the SPARQL front end.

Abstract: A reconnection system re-forms a control tree for an application that is executed in parallel without terminating execution of the application. The reconnection system detects when a node of a control tree has failed and directs the nodes that have not failed to reconnect to effect the re-forming of the control tree without the failed node and without terminating the application. Upon being directed to reconnect, a node identifies new child nodes that are to be its child nodes in the re-formed control tree. The node maintains the existing connection with each of its current child nodes that is also a new child node, terminates the existing connection with each of its current child nodes that is not also a new child node, establishes a new connection with any new child node that is not a current child node, and directs each new child node to reconnect.

Abstract: Computer systems having heat exchangers for cooling computer components are disclosed herein. The computer systems include a computer cabinet having an air inlet, an air outlet spaced apart from the air inlet, and a plurality of computer module compartments positioned between the air inlet and the air outlet. The air inlet, the air outlet, and the computer module compartments define an air flow path through the computer cabinet. The computer systems also include a heat exchanger positioned between two adjacent computer module compartments. The heat exchanger includes a plurality of heat exchange elements canted relative to the air flow path.

Abstract: A method and system for inferring facts in parallel in a multiprocessor computing environment is provided. An inference system infers facts by applying rules to a collection of existing facts. For each existing fact, the inference system schedules a thread to apply the rules to that existing fact. As a thread infers a new fact (i.e., one that is not already in the collection of facts), the thread adds that inferred fact to the collection of facts. When a thread adds a new fact to the collection, the thread also applies the rules to that new fact. After the threads complete execution, the inference system may apply the rules to the facts of the collection, including the newly inferred facts, by again launching a thread for each fact to apply the rules to that fact. The inference system performs this processing iteratively until a termination condition is satisfied.

Abstract: A system and method of compiling program code, wherein the program code includes an operation on an array of data elements stored in memory of a computer system. The program code is scanned for an equation which operates on data of lengths other than the limited number of vector supported data lengths. The equation is then replaced with vectorized machine executable code, wherein the machine executable code comprises a nested loop and wherein the nested loop comprises an exterior loop and a virtual interior loop. The exterior loop decomposes the equation into a plurality of loops of length N, wherein N is an integer greater than one. The virtual interior loop executes vector operations corresponding to the N length loop to form a result vector of length N, wherein the virtual interior loop includes one or more vector atomic memory operation (AMO) instructions, used to resolve false conflicts.