Patents Assigned to Cray Inc.
  • Patent number: 8820395
    Abstract: Computer systems having heat exchangers for cooling computer components are disclosed herein. The computer systems include a computer cabinet having an air inlet, an air outlet spaced apart from the air inlet, and a plurality of computer module compartments positioned between the air inlet and the air outlet. The air inlet, the air outlet, and the computer module compartments define an air flow path through the computer cabinet. The computer systems also include a heat exchanger positioned between two adjacent computer module compartments. The heat exchanger includes a plurality of heat exchange elements canted relative to the air flow path.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: September 2, 2014
    Assignee: Cray Inc.
    Inventor: Alexander I. Yatskov
  • Publication number: 20140244657
    Abstract: A method and system in a computer system for dynamically providing a graphical representation of a data store of entries via a matrix interface is disclosed. A dynamic graph system provides a matrix interface that exposes to an application program a graphical representation of data stored in a data store such as a semantic database storing triples. To the application program, the matrix interface represents the graph as a sparse adjacency matrix that is stored in compressed form. Each entry of the data store is considered to represent a link between nodes of the graph. Each entry has a first field and a second field identifying the nodes connected by the link and a third field with a value for the link that connects the identified nodes. The first, second, and third fields represent the rows, column, and elements of the adjacency matrix.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 28, 2014
    Applicant: CRAY INC.
    Inventor: David Mizell
  • Patent number: 8806436
    Abstract: Systems and methods provide a debugger that debugs code using two versions of code, an optimized and a debuggable version of object code for subroutines, methods or functions. The debugger causes the appropriate version of the code to be executed depending on whether debug commands have been applied with respect to particular subroutines, methods or functions.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: August 12, 2014
    Assignee: Cray Inc.
    Inventors: Robert Warren Moench, Robert Cushman Clark
  • Patent number: 8762536
    Abstract: A multiprocessor computer system comprises a plurality of nodes, wherein the nodes are ordered using a snaking dimension-ordered numbering. An application placement module is operable to place an application in nodes with preference given to nodes ordered near one another.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: June 24, 2014
    Assignee: Cray Inc.
    Inventors: Carl Albing, Norman Troullier, Jr.
  • Publication number: 20140140341
    Abstract: A system and algorithm configured to generate diversity at the traffic source so that packets are uniformly distributed over all of the available paths, but to increase the likelihood of taking a minimal path with each hop the packet takes. This is achieved by configuring routing biases so as to prefer non-minimal paths at the injection point, but increasingly prefer minimal paths as the packet proceeds, referred to herein as Increasing Minimal Bias (IMB).
    Type: Application
    Filed: November 19, 2012
    Publication date: May 22, 2014
    Applicant: CRAY INC.
    Inventors: Abdulla Bataineh, Thomas Court, Duncan Roweth
  • Publication number: 20140081934
    Abstract: A system for updating an index into a tuple table of tuples is provided. An indexing system updates an index into a tuple table using fine-grain locking of the index. The index includes a values table with an entry for each index value of an index field that references a value-tuple table that includes, for each tuple with the index value, a row that identifies a tuple of the tuple table with that indexed value. After a new tuple is added to the tuple table with a value, the index is updated by locking the entry in the values table, updating the value-tuple table for the value, and then unlocking the entry. When the index is accessed for locating tuples with a value, the accessor locks the entry in the values table for the value, uses the value-tuple table to locate the tuples, and unlocks the entry.
    Type: Application
    Filed: September 20, 2012
    Publication date: March 20, 2014
    Applicant: CRAY INC.
    Inventor: David Mizell
  • Patent number: 8654489
    Abstract: One embodiment includes an integrated circuit including an input circuit, a first diode including a first anode and a first cathode, with the first cathode coupled to a first voltage, the first anode coupled to the input circuit at a node via a first mechanical switch, a second diode including a second anode and a second cathode, with the second cathode coupled to the node via a second mechanical switch, the second anode coupled to a ground and a resistor coupled to the input circuit between the integrated circuit and the node, wherein in a first mode of operating, the first mechanical switch and the second mechanical switch are conducting, and in a second mode of operating, the first and second mechanical switches are nonconducting.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: February 18, 2014
    Assignee: Cray Inc.
    Inventors: Raymond J. Farbarik, Jeremy Stephens, Gerald J. Twomey
  • Patent number: 8601236
    Abstract: A processor core, comprises one or more vector units operable to change between a fine-grained vector mode having a shorter maximum vector length and a coarse-grained vector mode having a longer maximum vector length. Changing vector modes comprises halting all instruction stream execution in the core, flushing one or more registers in a register space, reconfiguring one or more vector registers in the register space, and restarting instruction execution in the core.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: December 3, 2013
    Assignee: Cray Inc.
    Inventors: Gregory J. Faanes, Eric P. Lundberg, Abdulla Bataineh, Timothy J. Johnson, Michael Parker, James Robert Kohn, Steven L. Scott, Robert Alverson
  • Patent number: 8583898
    Abstract: A system and method of compiling program code, wherein the program code includes an operation on an array of data elements stored in memory of a computer system. The program code is scanned for operations that are vectorizable. The vectorizable operations are examined to determine whether they should be executed at least in part in a vector atomic memory operation (AMO) functional unit attached to memory. If so, the compiled code includes vector AMO instructions.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: November 12, 2013
    Assignee: Cray Inc.
    Inventor: Terry D. Greyzck
  • Patent number: 8537539
    Abstract: Computer systems with air cooling systems and associated methods are disclosed herein. In several embodiments, a computer system can include a computer cabinet holding multiple computer modules, and an air mover positioned in the computer cabinet. The computer system can also include an airflow restrictor positioned proximate to an air outlet of the computer cabinet, and an overhead heat exchanger mated to the computer cabinet proximate to the air outlet.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: September 17, 2013
    Assignee: Cray Inc.
    Inventors: Wade J. Doll, Douglas P. Kelley
  • Publication number: 20130229768
    Abstract: Computer cabinets, such as supercomputer cabinets, having progressive air velocity cooling systems are described herein. In one embodiment, a computer cabinet includes an air mover positioned beneath a plurality of computer module compartments. The computer module compartments can be arranged in tiers with the computer modules in each successive tier being positioned closer together than the computer modules in the tier directly below. The computer cabinet can also include one or more shrouds, flow restrictors, and/or sidewalls that further control the direction and/or speed of the cooling air flow through the cabinet.
    Type: Application
    Filed: April 17, 2013
    Publication date: September 5, 2013
    Applicant: CRAY INC.
    Inventor: Wade J. Doll
  • Patent number: 8472181
    Abstract: Computer cabinets, such as supercomputer cabinets, having progressive air velocity cooling systems are described herein. In one embodiment, a computer cabinet includes an air mover positioned beneath a plurality of computer module compartments. The computer module compartments can be arranged in tiers with the computer modules in each successive tier being positioned closer together than the computer modules in the tier directly below. The computer cabinet can also include one or more shrouds, flow restrictors, and/or sidewalls that further control the direction and/or speed of the cooling air flow through the cabinet.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: June 25, 2013
    Assignee: Cray Inc.
    Inventor: Wade J. Doll
  • Patent number: 8464007
    Abstract: Various embodiments include fault tolerant memory apparatus, methods, and systems, including a memory manager for supplying read and write requests to a memory device having a plurality of addressable memory locations. The memory manager includes a plurality of banks. Each bank includes a bank queue for storing read and write requests. The memory manager also includes a request arbiter connected to the plurality of banks. The request arbiter removes read and write requests from the bank queues for presentation to the memory device. The request arbiter includes a read phase of operation and a write phase of operation, wherein the request arbiter preferentially selects read requests for servicing during the read phase of operation and preferentially selects write requests for servicing during the write phase of operation.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: June 11, 2013
    Assignee: Cray Inc.
    Inventors: Dennis C. Abts, Michael Higgins, Van L. Snyder, Gerald A Schwoerer
  • Patent number: 8458685
    Abstract: A system and method of compiling program code, wherein the program code includes an operation on an array of data elements stored in memory of a computer system. The program code is scanned for an equation which may have recurring data points. The equation is then replaced with vectorized machine executable code, wherein the machine executable code comprises a nested loop and wherein the nested loop comprises an exterior loop and a virtual interior loop. The exterior loop decomposes the equation into a plurality of loops of length N, wherein N is an integer greater than one. The virtual interior loop executes vector operations corresponding to the N length loop to form a result vector resident in memory, wherein the virtual interior loop includes a vector atomic memory operation (AMO) instruction.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: June 4, 2013
    Assignee: Cray Inc.
    Inventor: Terry D. Greyzck
  • Publication number: 20130128459
    Abstract: A system and method for cooling a plurality of electronics cabinets having horizontally positioned electronics assemblies. The system includes at least one blower configured to direct air horizontally across the electronics assemblies, and at least one intercooler configured to extract heat from the air flow such that the system is room neutral, meaning that the ambient temperature remains constant during operation of the system. A plurality of chassis backplanes and power supplies may also include an intercooler, wherein the intercoolers are electronically controlled such that the system is room neutral.
    Type: Application
    Filed: November 19, 2012
    Publication date: May 23, 2013
    Applicant: CRAY INC.
    Inventor: Cray Inc.
  • Patent number: 8433883
    Abstract: A computer system is operable to identify index elements in a vector index array that cannot be processed in parallel by calculating a complement modified bit matrix compare function between a first matrix filled with elements from the vector index array and a second matrix filled with the same elements from the vector index array.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: April 30, 2013
    Assignee: Cray Inc.
    Inventors: Terry D. Greyzck, William F. Long, Peter M. Klausler, Matthew F. Taylor
  • Patent number: 8413126
    Abstract: This document discusses, among other things, a system and method computing the shortest path expression in a loop having a plurality of expressions. Candidate expressions in the loop are identified and partitioned into sets. A cost matrix is computed as a function of the sets. Paths are found through the cost matrix and, if there are cycles in the paths, the cycles are broken. One or more shortest path expressions are generated as a function of the paths and one or more of the expressions in the loop are replaced with the shortest path expressions.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: April 2, 2013
    Assignee: Cray Inc.
    Inventor: James C. Beyer
  • Patent number: 8402465
    Abstract: A multiprocessor computer system comprises a plurality of nodes and an application placement module operable to place an application on a selected group of the compute nodes. The application placement module includes a system tool helper operable to manage operation of a system tool on the selected group of the compute nodes, the system tool operable to monitor execution of the application. Managing system tool operation comprises at least one of distributing, executing, and ending the system tool on one or more compute nodes.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: March 19, 2013
    Assignee: Cray Inc.
    Inventor: Marlys Kohnke
  • Patent number: 8386750
    Abstract: A multiprocessor computer system has a plurality of first processors having a first addressable memory space, and a plurality of second processors having a second addressable memory space. The second addressable memory space is of a different size than the first addressable memory space, and the first addressable memory space and second addressable memory space comprise a part of the same common address space.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: February 26, 2013
    Assignee: Cray Inc.
    Inventors: Michael Parker, Timothy J. Johnson, Laurence S. Kaplan, Steven L. Scott, Robert Alverson, Skef Iterum
  • Patent number: 8380935
    Abstract: An atomic memory operation cache comprises a cache memory operable to cache atomic memory operation data, a write timer, and a cache controller. The cache controller is operable to update main memory with one or more dirty atomic memory operation cache entries stored in the cache memory upon expiration of the write timer, and is further operable to update main memory with one or more dirty atomic memory operation cache entries stored in the cache memory upon eviction of the one or more dirty atomic memory operation cache entries from the cache memory.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: February 19, 2013
    Assignee: Cray Inc.
    Inventors: Dennis C. Abts, Steven L. Scott