Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A storage layer has an anisotropic axis, in which the storage layer is configured to store a state in off axis positions and on axis positions. The off axis positions are not aligned with the anisotropic axis. A tunnel barrier is disposed on top of the storage layer. A ferromagnetic sense layer is disposed on top of the tunnel barrier.

Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A storage layer has an anisotropic axis, in which the storage layer is configured to store a state in off axis positions and on axis positions. The off axis positions are not aligned with the anisotropic axis. A tunnel barrier is disposed on top of the storage layer. A ferromagnetic sense layer is disposed on top of the tunnel barrier.

Abstract: An apparatus includes groups of magnetic tunnel junctions, where the magnetic tunnel junctions in each group are arranged in rows, the magnetic tunnel junctions in each row are connected in series, and the rows are connected in parallel. The apparatus further includes a first conductive layer including conductive interconnects, a second conductive layer including straps, and a third conductive layer including field lines, each field line configured to generate a magnetic field for configuring an operating point of a corresponding subset of the magnetic tunnel junctions in each group based on a current flow through each field line. The magnetic tunnel junctions in each group are disposed between and connected to a corresponding one of the conductive interconnects and a corresponding one of the straps. The second conductive layer is disposed between the first conductive layer and the third conductive layer.

Abstract: Method for writing and reading a plurality of data bits to a magnetic random access memory (MRAM) cell including a magnetic tunnel junction including a reference magnetic layer having a reference magnetization, a tunnel barrier layer, and a SAF storage magnetic layer including a first and second storage magnetization being coupled antiparallel through a storage coupling layer and freely orientable at a high temperature threshold. The method includes: heating the magnetic tunnel junction to the high temperature threshold; and applying a write magnetic field to orient the first and second storage magnetization; wherein the high temperature threshold includes one of a first or third high temperature threshold such as to orient the first storage magnetization respectively antiparallel or parallel to the second storage magnetization; or a second high temperature threshold such as to orient the first storage magnetization with an angle below 180° with respect to the second storage magnetization.

Abstract: MRAM cell including a magnetic tunnel junction including a reference layer, a storage layer having a storage magnetization, a tunnel barrier layer between the reference and the storage layers; and an antiferromagnetic layer exchange-coupling the storage layer such as to pin the storage magnetization at a low temperature threshold and free it at a high temperature threshold. The storage layer includes a first ferromagnetic layer in contact with the tunnel barrier layer, a second ferromagnetic layer in contact with the antiferromagnetic layer, and a low saturation magnetization storage layer including a ferromagnetic material and a non-magnetic material. The MRAM cell can be written with improved reliability.

Abstract: An apparatus has magnetic logic units a logic circuit configured to receive a serial input bit stream at an input node. Individual bits of data from the serial input bit stream are serially written into individual magnetic logic units without buffering the serial input bit stream between the input node and the individual magnetic logic units. Individual bits of data from individual magnetic logic units are serially read to produce a serial output bit stream on an output node without buffering the serial output bit stream between the individual magnetic logic units and the output node.

Abstract: A magnetoresistive memory cell includes a magnetoresistive tunnel junction stack and a dielectric encapsulation layer covering sidewall portions of the stack and being opened over a top of the stack. A conductor is formed in contact with a top portion of the stack and covering the encapsulation layer. A magnetic liner encapsulates the conductor and is gapped apart from the encapsulating layer covering the sidewall portions of the stack.

Abstract: An apparatus includes circuits including a first circuit and a second circuit, each circuit including subarrays of magnetic tunnel junctions, where: (1) the magnetic tunnel junctions in each subarray are arranged in rows, the magnetic tunnel junctions in each row are connected in series, and the rows are connected in parallel; and (2) the subarrays are connected in series. The apparatus further comprises a field line configured to generate a first magnetic field for configuring an operating point of the first circuit based on a current flow through the field line, where the impedance of a subset of the plurality of rows in each subarray of magnetic tunnel junctions included in the first circuit is configured based on the first magnetic field.

Abstract: An apparatus includes circuits and a module configured to determine an external magnetic field based on a parameter of each circuit. Each circuit includes an array of magnetic tunnel junctions partitioned into subarrays. The magnetic tunnel junctions in each subarray are arranged in rows, the magnetic tunnel junctions in each row are connected in series, and the rows are connected in parallel. The subarrays are connected in series. Each magnetic tunnel junction includes a storage layer having a storage magnetization and a sense layer having a sense magnetization. Each magnetic tunnel junction is configured such that the sense magnetization and impedance of each magnetic tunnel junction vary in response to an external magnetic field. The parameter of each circuit varies based on a combined impedance of the multiple magnetic tunnel junctions. The module is implemented in at least one of a memory or a processing device.

Abstract: An apparatus includes circuits including a first circuit and a second circuit, each circuit including subarrays of magnetic tunnel junctions, where: (1) the magnetic tunnel junctions in each subarray are arranged in rows, the magnetic tunnel junctions in each row are connected in series, and the rows are connected in parallel; and the subarrays are connected in series. The apparatus further comprises a field line configured to generate a first magnetic field for configuring an operating point of the first circuit based on a current flow through the field line, wherein impedance of one or more of the magnetic tunnel junctions in each of the plurality of rows of each subarray of magnetic tunnel junctions included in the first circuit is configured based on the first magnetic field.

Abstract: A method for writing a MRAM device, including magnetic tunnel junction with a storage layer, a sense layer, and a spacer layer between the storage and sense layers. At least one of the storage and sense layers has a magnetic anisotropy axis. The method includes an initialization step including: applying an initial heating current pulse for heating the magnetic tunnel junction to a temperature above a threshold temperature at which a storage magnetization is freely orientable, providing an initial resultant magnetic field for adjusting the storage magnetization in an initial direction oriented along the magnetic anisotropy axis. The method allows performing the writing step with improved reproducibly.

Abstract: A magnetic random access memory (MRAM) cell including a magnetic tunnel junction containing: a storage layer including at least one storage ferromagnetic layer, each storage ferromagnetic layer having a storage magnetization; an antiferromagnetic storage layer pinning the storage magnetization at a low threshold temperature and freeing them at a high temperature threshold; a reference layer; and a tunnel barrier layer between the reference layer and the storage layer. The magnetic tunnel junction also includes a free ferromagnetic layer having a free magnetization adapted to induce a magnetic stray field magnetically coupling the free ferromagnetic layer with the storage layer; such that the storage magnetization can be switched by the magnetic stray field when the magnetic tunnel junction is at the high temperature threshold. The disclosed MRAM cell has low power consumption.

Abstract: The present disclosure concerns a magnetic random access memory cell containing a magnetic tunnel junction formed from an insulating layer comprised between a sense layer and a storage layer. The present disclosure also concerns a method for writing and reading the memory cell comprising, during a write operation, switching a magnetization direction of said storage layer to write data to said storage layer and, during a read operation, aligning magnetization direction of said sense layer in a first aligned direction and comparing said write data with said first aligned direction by measuring a first resistance value of said magnetic tunnel junction. The disclosed memory cell and method allow for performing the write and read operations with low power consumption and an increased speed.

Abstract: Self-referenced magnetic random access memory (MRAM) cell including a magnetic tunnel junction including a sense layer; a storage layer having a storage magnetization; a tunnel barrier layer between the sense and the storage layers; and an antiferromagnetic layer exchange-coupling the storage layer such that the storage magnetization can be pinned when the antiferromagnetic layer is below a critical temperature and freely varied when the antiferromagnetic layer is heated at or above the critical temperature. The sense layer includes a first sense layer having a first sense magnetization, a second sense layer having a second sense magnetization and spacer layer between the first and second sense layers. The MRAM cell can be read with low power consumption.

Abstract: A magnetoresistive memory cell includes a magnetoresistive tunnel junction stack and a dielectric encapsulation layer covering sidewall portions of the stack and being opened over a top of the stack. A conductor is formed in contact with a top portion of the stack and covering the encapsulation layer. A magnetic liner encapsulates the conductor and is gapped apart from the encapsulating layer covering the sidewall portions of the stack.

Abstract: A magnetic logic unit (MLU) cell includes a first magnetic tunnel junction and a second magnetic tunnel junction, each magnetic tunnel junction including a first magnetic layer having a first magnetization, a second magnetic layer having a second magnetization, and a tunnel barrier layer between the first and second layer. A field line for passing a field current such as to generate an external magnetic field is adapted to switch the first magnetization. The first magnetic layer is arranged such that the magnetic tunnel junction magnetization varies linearly with the generated external magnetic field. An MLU amplifier includes a plurality of the MLU cells. The MLU amplifier has large gains, extended cut off frequencies and improved linearity.

Abstract: A MRAM cell including a first tunnel barrier layer between a soft ferromagnetic layer having a free magnetization and a first hard ferromagnetic layer having a first storage magnetization. A second tunnel barrier layer is between the soft ferromagnetic layer and a second hard ferromagnetic layer and has a second storage magnetization. The first storage magnetization is freely orientable at a first high predetermined temperature threshold and the second storage magnetization being freely orientable at a second predetermined high temperature threshold. The first high predetermined temperature threshold is higher than the second predetermined high temperature threshold. The MRAM cell can be used as a ternary content addressable memory (TCAM) and store up to three distinct state levels. The MRAM cell has a reduced size and can be made at low cost.

Abstract: A mechanism is provided for fabricating a thermally assisted magnetoresistive random access memory device. A bottom thermal barrier is formed on a bottom contact. A magnetic tunnel junction is formed on the bottom thermal barrier. The magnetic tunnel junction includes a top ferromagnetic layer formed on a tunnel barrier. The tunnel barrier is formed on a bottom ferromagnetic layer. A top thermal barrier is formed on the top ferromagnetic layer. A top contact is formed on the top thermal barrier. The top contact is reduced to a first diameter. The tunnel barrier and the bottom ferromagnetic layer each have a second diameter. The first diameter of the top contact is smaller than the second diameter.

Abstract: A circuit includes a magnetic logic unit including input terminals, output terminals, a field line, and magnetic tunnel junctions (MTJs). The field line electrically connects a first and a second input terminal, and is configured to generate a magnetic field based on an input to at least one of the first and the second input terminal. The input is based on a first analog input to the circuit. Each MTJ is electrically connected to a first and a second output terminal, and is configured such that an output of at least one of the first and the second output terminal varies in response to a combined resistance of the MTJs. The resistance of the MTJs varies based on the magnetic field. The circuit is configured to mix the first analog input and a second analog input to generate an analog output based on the output of the second output terminal.

Abstract: A circuit has a magnetic device to produce a pre-distorted signal from a sinusoidal input signal. The magnetic device has physical attributes selected to produce characteristics of the pre-distorted signal. A power amplifier is coupled to the magnetic device. The power amplifier processes the pre-distorted signal to produce an output signal with reduced nonlinear behavior associated with the power amplifier.