Abstract: A steering device. The steering device includes an n-type impurity region comprising a zinc oxide material and a p-type impurity region comprising a silicon germanium material. A pn junction region formed from the zinc oxide material and the silicon germanium material. The steering device is a serially coupled to a resistive switching device to provide rectification for the resistive switching device to form a non-volatile memory device.

Abstract: A switching device includes a substrate; a first electrode formed over the substrate; a second electrode formed over the first electrode; a switching medium disposed between the first and second electrode; and a nonlinear element disposed between the first and second electrodes and electrically coupled in series to the first electrode and the switching medium. The nonlinear element is configured to change from a first resistance state to a second resistance state on application of a voltage greater than a threshold.

Abstract: A method for forming a vertically stacked memory device includes forming a first dielectric material overlying a surface region of a semiconductor substrate, forming first memory cells overlying the first dielectric material including a first top metal wiring spatially extending in a first direction, a first bottom metal wiring spatially extending in a second direction orthogonal to the first direction, and first switching elements sandwiched in intersection regions between the first top metal wiring and the first bottom metal wiring, forming a second dielectric material overlying the first top metal wiring, forming second memory cells overlying the second dielectric material including a second top metal wiring extending in the first direction, a second bottom wiring spatially extending in the second direction, and second switching elements sandwiched in intersection regions of the second top metal wiring and the second bottom metal wiring.

Abstract: A method of forming a memory device includes providing a substrate having a surface region, defining a cell region and first and second peripheral regions, sequentially forming a first dielectric material, a first wiring structure for a first array of devices, and a second dielectric material over the surface region, forming an opening region in the first peripheral region, the opening region extending in a portion of at least the first and second dielectric materials to expose portions of the first wiring structure and the substrate, forming a second wiring material that is overlying the second dielectric material and fills the opening region to form a vertical interconnect structure in the first peripheral region, and forming a second wiring structure from the second wiring material for a second array of devices, the first and second wiring structures being separated from each other and electrically connected by the vertical interconnect structure.

Abstract: A non-volatile memory device includes a first electrode, a resistive switching material stack overlying the first electrode. The resistive switching material stack comprising a first resistive switching material and a second resistive switching material. The second resistive switching material overlies the first electrode and the first resistive switching material overlying the second resistive switching material. The first resistive switching material is characterized by a first switching voltage having a first amplitude. The second resistive switching material is characterized by a second switching voltage having a second amplitude no greater than the first switching voltage. A second electrode comprising at least a metal material physically and electrically in contact with the first resistive switching material overlies the first resistive switching material.

Abstract: A non-volatile variable capacitive device includes a capacitor defined over a substrate, the capacitor having an upper electrode and a resistive memory cell having a first electrode, a second electrode, and a switching layer provided between the first and second electrodes. The resistive memory cell is configured to be placed in a plurality of resistive states according to an electrical signal received. The upper electrode of the capacitive device is coupled to the second electrode of the resistive memory cell. The resistive memory cell is a two-terminal device.

Abstract: A resistive memory device includes a first electrode; a second electrode having a polycrystalline semiconductor layer that includes silicon; a non-crystalline silicon structure provided between the first electrode and the second electrode. The first electrode, second electrode and non-crystalline silicon structure define a two-terminal resistive memory cell.

Abstract: A steering device. The steering device includes an n-type impurity region comprising a zinc oxide material and a p-type impurity region comprising a silicon germanium material. A pn junction region formed from the zinc oxide material and the silicon germanium material. The steering device is a serially coupled to a resistive switching device to provide rectification for the resistive switching device to form a non-volatile memory device.

Abstract: A method of forming a non-volatile memory device includes providing a substrate having a surface and forming a first dielectric overlying the surface, forming a first wiring comprising aluminum material over the first dielectric, forming a silicon material over the aluminum material to form an intermix region consuming a portion of the silicon material and aluminum material, annealing to formation a first alloy from the intermix region, forming a p+ impurity polycrystalline silicon over the first alloy material, forming a first wiring structure from at least a portion of the first wiring, forming a resistive switching element comprising an amorphous silicon material formed over the p+ polycrystalline silicon, and forming a second wiring structure comprising at least a metal material over the resistive switching element.

Abstract: A method for forming a non-volatile memory device includes forming a dielectric material overlying a semiconductor substrate, forming a first wiring structure overlying the first dielectric material, depositing an undoped amorphous silicon layer, depositing an aluminum layer over the amorphous silicon layer at a temperature of about 450 Degrees Celsius or lower, annealing the amorphous silicon and aluminum at a temperature of about 450 Degrees Celsius or lower to form a p+ polycrystalline layer, depositing a resistive switching material comprising an amorphous silicon material overlying the polycrystalline silicon material, forming a second wiring structure comprising a metal material overlying the resistive switching material.

Abstract: A non-volatile resistive switching memory device. The device includes a first electrode, a second electrode, a switching material in direct contact with a metal region of the second electrode, and a resistive material disposed between the second electrode and the switching material. The resistive material has an ohmic characteristic and a resistance substantially the same as an on state resistance of the switching device. The resistive material allows for a change in a resistance of the switching material upon application of voltage pulse without time delay and free of a reverse bias after the voltage pulse. The first voltage pulse causes a programming current to flow from the second electrode to the first electrode. The resistive material further causes the programming current to be no greater than a predetermined value.

Abstract: A memory device has a crossbar array including a first array of first electrodes extending along a first direction. A second array of second electrodes extends along a second direction. A non-crystalline silicon structure provided between the first electrode and the second electrode at an intersection defined by the first array and the second array. The non-crystalline silicon structure has a first layer having a first defect density and a second layer having a second defect density different from the first defect density. Each intersection of the first array and the second array defines a two-terminal memory cell.

Abstract: A method of forming a non-volatile memory device. The method forms a vertical stack of first polysilicon material and a second polysilicon material layer isolated by a dielectric material. The polysilicon material layers and the dielectric material are subjected to a first pattern and etch process to form a first wordline associated with a first switching device and a second wordline associated with a second switching device from the first polysilicon material layer, and a third wordline associated with a third switching device and a fourth wordline associated with a fourth switching device from the second polysilicon material. A via opening is formed to separate the first wordline from the second wordline and to separate the third wordline from the fourth wordline. An amorphous silicon switching material is deposited conformably overlying the via opening. A metal material fills the via opening and connects to a common bitline.

Abstract: A non-volatile variable capacitive device includes a capacitor defined over a substrate, the capacitor having an upper electrode and a resistive memory cell having a first electrode, a second electrode, and a switching layer provided between the first and second electrodes. The resistive memory cell is configured to be placed in a plurality of resistive states according to an electrical signal received. The upper electrode of the capacitive device is coupled to the second electrode of the resistive memory cell. The resistive memory cell is a two-terminal device.

Abstract: A memory device includes a first plurality of memory cells arranged in a first crossbar array, a first thickness of dielectric material overlying the first plurality of memory cells, and a second plurality of memory cells arranged in a second crossbar array overlying the first thickness of dielectric material. The memory device further includes a second thickness of dielectric material overlying the second plurality of memory cells. In a specific embodiment, the memory device further includes a Nth thickness of dielectric material overlying an Nth plurality of memory cells, where N is an integer ranging from 3 to 8.

Abstract: A method of forming a disturb-resistant non volatile memory device. The method includes providing a semiconductor substrate having a surface region and forming a first dielectric material overlying the surface region. A first wiring material overlies the first dielectric material, a doped polysilicon material overlies the first wiring material, and an amorphous silicon switching material overlies the said polysilicon material. The switching material is subjected to a first patterning and etching process to separating a first strip of switching material from a second strip of switching spatially oriented in a first direction.

Abstract: A method of forming a memory device includes providing a substrate having a surface region, defining a cell region and first and second peripheral regions, sequentially forming a first dielectric material, a first wiring structure for a first array of devices, and a second dielectric material over the surface region, forming an opening region in the first peripheral region, the opening region extending in a portion of at least the first and second dielectric materials to expose portions of the first wiring structure and the substrate, forming a second wiring material that is overlying the second dielectric material and fills the opening region to form a vertical interconnect structure in the first peripheral region, and forming a second wiring structure from the second wiring material for a second array of devices, the first and second wiring structures being separated from each other and electrically connected by the vertical interconnect structure.

Abstract: A steering device. The steering device includes an n-type impurity region comprising a zinc oxide material and a p-type impurity region comprising a silicon germanium material. A pn junction region formed from the zinc oxide material and the silicon germanium material. The steering device is a serially coupled to a resistive switching device to provide rectification for the resistive switching device to form a non-volatile memory device.

Abstract: A non-volatile resistive switching memory device. The device includes a first electrode, a second electrode, a switching material in direct contact with a metal region of the second electrode, and a resistive material disposed between the second electrode and the switching material. The resistive material has an ohmic characteristic and a resistance substantially the same as an on state resistance of the switching device. The resistive material allows for a change in a resistance of the switching material upon application of voltage pulse without time delay and free of a reverse bias after the voltage pulse. The first voltage pulse causes a programming current to flow from the second electrode to the first electrode. The resistive material further causes the programming current to be no greater than a predetermined value.

Abstract: A resistive memory device includes a first electrode; a second electrode having a polycrystalline semiconductor layer that includes silicon; a non-crystalline silicon structure provided between the first electrode and the second electrode. The first electrode, second electrode and non-crystalline silicon structure define a two-terminal resistive memory cell.