Patents Assigned to D2S, Inc.
  • Patent number: 9091946
    Abstract: A method and system for fracturing or mask data preparation or proximity effect correction is disclosed in which a series of charged particle beam shots is determined, where the series of shots is capable of forming a continuous non-manhattan track on a surface, such that the non-manhattan track has a line width roughness (LWR) which nearly equals a target LWR. A method and system for fracturing or mask data preparation or proximity effect correction is also disclosed in which at least two series of shots are determined, where each series of shots is capable of forming a continuous non-manhattan track on a surface, and where the space between tracks has space width roughness (SWR) which nearly equals a target SWR.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: July 28, 2015
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Ingo Bork, Etienne Jacques
  • Patent number: 9057956
    Abstract: A method and system for fracturing or mask data preparation are presented in which overlapping shots are generated to increase dosage in selected portions of a pattern, thus improving the fidelity and/or the critical dimension variation of the transferred pattern. In various embodiments, the improvements may affect the ends of paths or lines, or square or nearly-square patterns. Simulation is used to determine the pattern that will be produced on the surface.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: June 16, 2015
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Kazuyuki Hagiwara, Stephen F. Meier, Ingo Bork
  • Patent number: 9043734
    Abstract: A method and system for optical proximity correction (OPC) is disclosed in which a set of shaped beam shots is determined which, when used in a shaped beam charged particle beam writer, will form a pattern on a reticle, where some of the shots overlap, where the pattern on the reticle is an OPC-corrected version of an input pattern, and where the sensitivity of the pattern on the reticle to manufacturing variation is reduced. A method for fracturing or mask data preparation is also disclosed.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: May 26, 2015
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Kazuyuki Hagiwara, Stephen F. Meier, Ingo Bork
  • Patent number: 9038003
    Abstract: A method for mask data preparation or mask process correction is disclosed in which a set of charged particle beam shots is determined which is capable of forming a pattern on a surface, wherein critical dimension uniformity (CDU) of the pattern is optimized. In some embodiments the CDU is optimized by varying at least two factors. In other embodiments, model-based techniques are used. In yet other embodiments, the surface is a reticle to be used in an optical lithographic process to form a pattern on a wafer, and CDU on the wafer is optimized.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: May 19, 2015
    Assignee: D2S, Inc.
    Inventors: Ryan Pearman, Robert C. Pack, Akira Fujimura
  • Patent number: 9034542
    Abstract: In a method for fracturing or mask data preparation or mask process correction for charged particle beam lithography, a plurality of shots are determined that will form a pattern on a surface, where shots are determined so as to reduce sensitivity of the resulting pattern to changes in beam blur (?f). In some embodiments, the sensitivity to changes in ?f is reduced by varying the charged particle surface dosage for a portion of the pattern. Methods for forming patterns on a surface, and for manufacturing an integrated circuit are also disclosed, in which pattern sensitivity to changes in ?f is reduced.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: May 19, 2015
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Ingo Bork
  • Patent number: 8959463
    Abstract: A method for mask process correction or forming a pattern on a resist-coated reticle using charged particle beam lithography is disclosed, where the reticle is to be used in an optical lithographic process to form a pattern on a wafer, where the sensitivity of the wafer pattern is calculated with respect to changes in resist exposure of the reticle, and where the pattern exposure information is modified to lower the calculated sensitivity. A method for fracturing or mask data preparation is also disclosed, where pattern exposure information is determined that can form a pattern on a resist-coated reticle using charged particle beam lithography, where the reticle is to be used in an optical lithographic process to form a pattern on a wafer, and where the sensitivity of the wafer pattern is calculated with respect to changes in resist exposure of the reticle.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: February 17, 2015
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Kazuyuki Hagiwara, Robert C. Pack, Anatoly Aadamov
  • Patent number: 8952546
    Abstract: An integrated circuit comprising a plurality of standard cell circuit elements is disclosed, wherein for at least one layer of the integrated circuit, a majority of minimum-width patterns are in a preferred diagonal orientation.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: February 10, 2015
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Larry Lam Chau, Tam Dinh Thanh Nguyen
  • Patent number: 8949750
    Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. A pattern determined by the transition region shots is then compared to a reticle pattern created using conventional non-overlapping VSB shots. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: February 3, 2015
    Assignee: D2S, Inc.
    Inventors: Etienne Jacques, Jin Choi, Kazuyuki Hagiwara
  • Patent number: 8938696
    Abstract: Computationally intensive electronic design automation operations are accelerated with algorithms utilizing one or more graphics processing units. The optical proximity correction (OPC) process calculates, improves, and optimizes one or more features on an exposure mask (used in semiconductor or other processing) so that a resulting structure realized on an integrated circuit or chip meets desired design and performance requirements. When a chip has billions of transistors or more, each with many fine structures, the computational requirements for OPC can be very large. This processing can be accelerated using one or more graphics processing units.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: January 20, 2015
    Assignee: D2S, Inc.
    Inventors: Ilhami H. Torunoglu, Ahmet Karakas, Erich E. Elsen
  • Patent number: 8916315
    Abstract: In the field of semiconductor production using shaped charged particle beam lithography, a method and system for fracturing or mask data preparation or proximity effect correction is disclosed, wherein a plurality of circular or nearly-circular shaped beam shots can form a non-circular pattern on a surface. Methods for manufacturing a reticle and for manufacturing a substrate such as a silicon wafer by forming non-circular patterns on a surface using a plurality of circular or nearly-circular shaped beam shots is also disclosed.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: December 23, 2014
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Michael Tucker
  • Publication number: 20140353526
    Abstract: A method and system for fracturing or mask data preparation for charged particle beam lithography are disclosed in which a plurality of charged particle beam shots is determined that will form a pattern on a surface using a multi-beam charged particle beam writer, where the sensitivity of the pattern on the surface to manufacturing variation is reduced by increasing edge slope.
    Type: Application
    Filed: August 7, 2014
    Publication date: December 4, 2014
    Applicant: D2S, INC.
    Inventor: Akira Fujimura
  • Patent number: 8900778
    Abstract: A method for forming patterns on a surface using charged particle beam lithography is disclosed, in which a stencil is provided comprising first and second apertures, where circular or nearly-circular patterns in a first plurality of sizes are formed on the surface using the first aperture by varying shot dosage, and where circular or nearly-circular patterns in a second plurality of sizes are formed on the surface using the second aperture by varying shot dosage. A similar method for fracturing or mask data preparation is also disclosed. A stencil for charged particle beam lithography is also disclosed, where the stencil comprises first aperture and second apertures capable of forming, in one shot, patterns in a first and a second range of sizes on a surface by varying the shot dosage, where the first range of sizes is discontinuous with the second range of sizes.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: December 2, 2014
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Michael Tucker
  • Patent number: 8895212
    Abstract: In the field of semiconductor production using charged particle beam lithography, a method and system for fracturing or mask data preparation or proximity effect correction is disclosed, wherein base dosages for a plurality of exposure passes are different from each other. Methods for manufacturing a reticle and manufacturing an integrated circuit are also disclosed, wherein a plurality of charged particle beam exposure passes are used, with base dosage levels being different for different exposure passes.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: November 25, 2014
    Assignee: D2S, Inc.
    Inventors: Harold Robert Zable, Akira Fujimura
  • Patent number: 8883375
    Abstract: In the field of semiconductor production using charged particle beam lithography, a method and system for fracturing or mask data preparation or proximity effect correction is disclosed, wherein a plurality of exposure passes are used, and where the sum of the base dosage levels for all of the exposure passes does not equal a normal dosage. Methods for manufacturing a reticle and manufacturing an integrated circuit are also disclosed, wherein a plurality of charged particle beam exposure passes are used, and where the sum of the base dosage levels for all of the exposure passes is different than a normal dosage.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: November 11, 2014
    Assignee: D2S, Inc.
    Inventors: Harold Robert Zable, Akira Fujimura
  • Patent number: 8865377
    Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: October 21, 2014
    Assignee: D2S, Inc.
    Inventors: Etienne Jacques, Jin Choi, Kazuyuki Hagiwara
  • Patent number: 8852831
    Abstract: A device for charged particle beam lithography is disclosed which includes an inputting device, a character projection stencil and a reducing lens. The inputting device reads a set of shots, where each shot has a magnification. The character projection stencil contains a character pattern. The reducing lens introduces magnification variation of the stencil character pattern when writing the pattern onto a surface, where the magnification of the reducing lens can be varied from shot to shot.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: October 7, 2014
    Assignee: D2S, Inc.
    Inventor: Akira Fujimura
  • Publication number: 20140272675
    Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: D2S, INC.
    Inventors: Etienne Jacques, Jin Choi, Kazuyuki Hagiwara
  • Publication number: 20140282304
    Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. A pattern determined by the transition region shots is then compared to a reticle pattern created using conventional non-overlapping VSB shots. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: D2S, INC.
    Inventors: Etienne Jacques, Jin Choi, Kazuyuki Hagiwara
  • Patent number: 8828628
    Abstract: A method for optical proximity correction (OPC) is disclosed, in which a set of VSB shots is determined, where the set of shots can approximately form a target reticle pattern that is an OPC-compensated version of an input pattern. The set of shots is simulated to create a simulated reticle pattern. A substrate image is calculated, based on using the simulated reticle pattern in an optical lithographic process to form the substrate image. A system for OPC is also disclosed.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: September 9, 2014
    Assignee: D2S, Inc.
    Inventor: Akira Fujimura
  • Publication number: 20140245247
    Abstract: An integrated circuit comprising a plurality of standard cell circuit elements is disclosed, wherein for at least one layer of the integrated circuit, a majority of minimum-width patterns are in a preferred diagonal orientation.
    Type: Application
    Filed: May 5, 2014
    Publication date: August 28, 2014
    Applicant: D2S, INC.
    Inventors: Akira Fujimura, Larry Lam Chau, Tam Dinh Thanh Nguyen