Abstract: An apparatus for manufacturing a semiconductor device having two leads (3) lying in the same axis, a prefabricated plastic can (1) which is filled with a plastic compound and having one of the leads passed through its bottom (1a), and a prefabricated die (4) attached between the sides of the inner ends (60, 70) of the leads (3) facing each other, the leads being inserted into, and having an offset within, the can. The manufacture of the leads starts with a wire (30) which unwinds from a spool (39), passes through a major part of the manufacturing stages unseparated, and is separated into the individual semiconductor devices only after the mounting of the cans (1).

Abstract: A remote-control system with position control includes a spread-spectrum where at least three independent spread-spectrum signals are transmitted. At the receiving end, these signals are separated into their individual components by means of at least three correlators and form the diode signals. Synchronizing means at the receiving end, including further correlators, synchronize the received spread-spectrum signals with associated reference signals with the aid of a phase-locked loop and a control unit.

Abstract: A method and a circuit arrangement for two-line comb filtering a sampled and digitized composite color signal are disclosed wherein, depending on the similarity status determined by means of a display area (27) via a local and temporal gradient analysis, the respective type of luma/chroma separation, namely two-line combing, combing up, combing down, or simple decoding, and the respective proportion of combing and simple decoding in the luma and chroma output signals (LO-21, CO-21) are determined for each pixel.

Abstract: A signal separator, particularly a teletext-signal separator, includes an integrating unit which delivers a center-of-bit-indicating (i.e., center-crossing) signal and a residual-value signal. A residual-value-signal-evaluating device evaluates the respective residual value and uses a selection control signal to determine how the value of the current signal bit is to be estimated. This is accomplished by using a selection facility which derives from the current sample value and the preceding and subsequent sample values the respective preaverage value and postaverage value and selects the value best suited for the estimation using the selection control signal. A phase corrector evaluates a signal pattern from an edge logic which indicates whether the current sample value is approaching an edge of the signal, and controls a change of the integration period if the residual-value signal lies within a predetermined residual value signal range.

Abstract: A circuit capable of handling all television sound transmission standards, including the "NICAM" standard. The circuit contains an analog antialiasing low-pass filter which is fed by the analog sound and video signal and followed by an analog-to-digital converter. The output of the latter is freed from the video signal by a filter circuit. The digital sound signal is applied to a phase splitter having a 0.degree. output and a 90.degree. output which are connected to a phase discriminator. An absolute-value output of the phase discriminator provides the amplitude-demodulated sound signal, while a phase-angle output feeds the DQPSK portion of a "NICAM" decoder and a differentiating stage, which delivers the frequency-modulated sound signal.

Abstract: A CMOS transconductance amplifier with a floating operating point which has low quiescent-current consumption for a voltage-to-current converter. On the other hand, the current yield of the output transistor in an output current mirror for a load current is high. The low quiescent-current consumption is achieved by connecting a coupling transistor used as a low-impedance diode in parallel with an active load in the current output stage of the voltage-to-current converter. The high current yield is achieved by means of a positive-feedback circuit which adds to the quiescent current of the voltage-to-current converter an auxiliary current proportional to the load current, thus forming a floating operating point.

Abstract: A digital phase-locked loop has a periodically overflowing digital oscillator (DCO), implemented as a modulo adder, and a processor device. The processor device adjusts the period T of the digital oscillator to a nominal period, determined from periodically occurring synchronizing pulses, by comparing the actual phase of the digital oscillator with a set phase at the control clock rate of the periodic synchronizing pulses. After the digital oscillator has been locked to the nominal period, the processor device compares the phases by using a double-frequency signal sequence of one-half line period derived from the digital oscillator output signal. The DCO output signal is fed to a correction device where an address-phase signal, locked to the DCO output signal, is generated so that when a non-periodic synchronizing pulse occurs, the address-phase signal is shifted by one period of the signal sequence of one-half line period with respect to the digital oscillator output signal.

Abstract: A projection television system includes a projection unit having an optical element through which infrared television signals are received. The received signals are processed to provide a television image display which is projected for viewing. Received television signals from a TV station or cable are converted to infrared signals and transmitted along a given axis of an infrared transmission link extending between an infrared transmitter, remotely positioned from the projection unit, to an infrared detector, located in the projection unit. The detector converts the infrared TV signal into a video signal which signal is processed by the projection receiver to provide the image for display. The infrared transmitter, the optical element and the detector are aligned along a given axis which is also the optical axis of the system.

Abstract: This semiconductor device has two leads (3) lying in the same axis, a prefabricated plastic can (1) which is filled with a plastic compound and has one of the leads passed through its bottom (1a), and a prefabricated die (4) attached between those sides of the inner ends (60, 70) of the leads (3) facing each other, the leads being inserted into, and having an offset within, the can. The manufacture of the leads starts with a wire (30) which unwinds from a spool (39), passes through a major part of the manufacturing stages unseparated, and is separated into the individual semiconductor devices only after the mounting of the cans (1).

Abstract: A digital television-signal-processing circuit for a composite color signal is sampled with a first clock signal. The digitized composite color signal is reconverted with a line-locked second clock signal. The two clock signals have the same frequency. A second phase-locked loop for controlling the phase of the horizontal pulse includes a locked oscillator and is loosely coupled to a first phase-locked loop which generates a horizontal reference clock. The decoupling of the data, which is referred to the two clock signals, takes place in a dual-port read/write memory which is written into synchronously with the first clock signal and read from synchronously with the second clock signal.

Abstract: A CMOS circuit for averaging digital-to-analog converters includes a shift register of series-connected master and slave cells controlled by a shift clock. The input of the shift register is supplied with a pulse-density-modulated data signal, and the outputs of each of the master and slave cells are connected to a data-dependent control input of a multistage gate circuit. The gate circuits are controlled by a gate clock and cause constant currents to be switched via two buses to the input and output of a p-channel current mirror in accordance with the state of the master or slave cell. The input of a current mirror is constantly supplied with one-half the sum current of the constant-current sources, and the current mirror provides current scaling, preferably by a factor of 0.5.

Abstract: Line flicker is detected by comparing luminance values provided by a video signal in vertically successive lines of two temporally successive fields. If there is a step change in adjacent lines, indicative of line flicker, the line flicker is corrected by adaptively delaying or accelerating corresponding lines within the field that experienced the step change.

Abstract: A system for remotely controlling a television receiver has a position-dependant transmitter and an electrooptical arrangement which controls the motion of a cursor on a television screen. The electrooptical arrangement also generates menu entries to facilitate the selection of functions for tuning and operating the television receiver. The menu entries are selected by means of the cursor. The electrooptical arrangement includes adaptive filters which stabilize the position of the cursor on the screen and thereby allow for an increased number of control functions to be implemented.

Abstract: In a median filter, signals received at the input are fed to a cascade of delay elements whose number is equal to the degree N of the median filter. The signals at the outputs of the delay elements which preceded the signal received at the input are fed to N subtracters which form the differences between the signal at the input and the N preceding signals. The signs of the differences are stored in shift registers, and upon receipt of a new signal at the input, they are shifted by one place. From the signs of the differences, the selection unit determines the median as the signal for which N/2 differences have negative signs and N/2 differences have positive signs.

Abstract: A parallel adder has a carry between adjacent adding stages. Each of the adding stages includes a carry-generating circuit which generates a carry output signal from carry input signals to be added by the adding stage and a carry input signal applied to it. The carry-generating circuit includes a complementary stage which is built with complementary transistors connected between the two terminals of a supply-voltage source. The carry-generating circuit has a center node which is connected to the carry output terminal and which, if the data input signals applied to the adding stage have the same binary state value, is at a potential corresponding to the binary state value. The carry-generating cricuit further includes a coupling circuit. One end of the coupling circuit is connected to one terminal of the supply-voltage source, and the other end of the coupling circuit is at the potential of the one terminal if the data input signals have unequal binary state values.

Abstract: Automatic gain control apparatus comprises a digitally adjustable amplifier, two threshold detectors with adjustable hysteresis, a latch and a control stage with an up/down counter. The latch stores only the logic states of the two threshold detectors. The digital output of the up/down counter is changed in value at the frequency of a first or second clock signal. The output of the up/down counter controls the gain of the amplifier.

Abstract: A class-AB push-pull CMOS output stage is driven over a control line with a drive potential from an input stage. The control line feeds the gate terminals of a complementary transistor pair whose first transistor serves as a first push-pull output transistor and whose second transistor is connected to the gate terminal of a second push-pull output transistor via a current-mirror arrangement. The source terminals of the first and second transistors are tied to a first fixed potential and a second fixed potential, respectively, the latter being stabilized by a low-impedance active compensation circuit.

Abstract: By using a basic cell (g), an overall array (ga) for forming n products from pairs of multidigit binary numbers Amn, Bkn and for adding these n products is formed, with the formation and summation of all partial products being interleaved row by row. Each basic cell contains a delay unit for the A-coefficient inputs controlled by a half clock signal, an undelayed through connection for the B-coefficient input, an added fed via respective delay units with a sum input, a carry input, and a summation input, and a logic gate which combines the B-coefficient with the undelayed A-coefficients to form the partial product thereof and provides the partial product to the summation input of the adder.

Abstract: A "smooth" fine classification of varactor diodes according to their electrical parameters is achieved in the manufacturing process to provide groups of matched varactor diodes. The diodes are matched within a predetermined tolerance limit. The dice are picked up from the silicon wafer along a meander path generally perpendicular to the temperature gradient of the diffusion process steps applied to the wafer when the diodes were formed, mounted on a lead frame, bonded, encapsulated, removed from the lead frame, and measured.

Abstract: A digital limiter for processing a digital video signal includes a limiter stage whose output is subtracted from the input to the stage in a subtracting stage. The resulting difference signal is accumulated by means of an accumulating device. The accumulated signal is added to the digital video signal to be processed. The accumulator provides a memory function for the signal component clipped in the limiter. It also includes a leakage device, so that the accumulated signal can decrease again after the start of limiting action.