Abstract: A voltage regulator and a method for regulating an output voltage are presented. The voltage regulator includes a frequency compensation circuit having a first capacitor coupled to a capacitance multiplier. The capacitance multiplier has a second capacitor coupled to a voltage amplifier. The voltage amplifier amplifies a first voltage that is a function of the output voltage. The advantage of this regulator and method is that it allows increasing the total capacitance of the frequency compensation circuit without unduly increasing the size of the regulator. Another advantage is the allowance of changing the amplification factor without affecting the DC gain.

Abstract: The present document describes a control circuit and a method for controlling a power transistor, wherein the power transistor has a drain, a gate and a source. The power transistor has a body diode. The control circuit is configured to predict a time instant at which a drain potential at the drain falls below a source potential at the source of the power transistor by more than a diode threshold voltage of the body diode. Furthermore, the control circuit is configured to apply a pre-bias potential and/or provide a pre-bias current to the gate of the power transistor in dependence the predicted time instant, such that a conducting channel between the drain and the source is provided, which at least partially takes over current which would otherwise flow through the body diode.

Abstract: An integrated circuit package having excellent heat dissipation is described. An integrated circuit die is attached to a substrate and the substrate is mounted on a printed circuit board (PCB) wherein there is a gap between a surface of the die facing the PCB and the PCB. A thermal enhanced layer is formed within the gap wherein heat travels from the die through the thermal enhanced layer to the PCB.

Abstract: A power converter and method are presented. The converter provides a ground terminal, an input terminal and an output terminal. The power converter includes first, second and third flying capacitor coupled to a network of switches and a driver. The network of switches has a first switch coupled to the input terminal; a second switch to couple the first flying capacitor to the third flying capacitor; and a third switch to couple the second flying capacitor to the third flying capacitor; The driver is adapted to drive the network of switches with a sequence of states during a drive period. The sequence of states includes a first state and a second state. In the first state the ground terminal is coupled to the output terminal via a first path with the first flying capacitor and the third flying capacitor, and via a second path with the second flying capacitor.

Abstract: A solution is provided for a current balance feedback method to improve stability in a multi-phase DC-DC switching converter, where the current balance feedback signal is added to the PWM duty signal, after the PWM comparator. Using this feedback method, current balance oscillation issues caused by the non-linearity of the main control loop can be solved, and provide better current balance stability in the switching converter. Advantages include improving the stability of the current balance feedback loop by introducing the correction post PW modulation in the time domain, effectively bypassing interaction with the PW modulator. The current balance feedback loop stability improvement reduces PCB design effort and iteration.

Abstract: A switched-mode power converter and a method for operation is presented. The switched-mode power converter has a high side switching element, a low side switching element, and an inductor. Both the high side switching element and the low side switching element are coupled to an input terminal of the inductor. A zero cross comparator generates a trigger signal for opening the low side switching element. A sampling unit samples, at a time when the low side switching element is switching, an inductor voltage at the input terminal of the inductor. An integrating unit determines an offset voltage by integrating the sampled inductor voltage. Finally, an input voltage of the zero cross comparator is adjusted by subtracting the determined offset voltage from the inductor voltage. As a result, the switching behavior of the switched-mode power converter is optimized.

Abstract: A switching circuit and a method for providing a switch array having an on resistance is presented. The switch array has a plurality of switches, where each switch is arranged to be in different configuration states. The states include an enabled configuration and a disabled configuration. The switching states include an on state and an off state. Each switch is held in the off state when in the disabled configuration. Control circuitry sets the switches to either the enabled configuration or the disabled configuration, and a memory element coupled to the control circuitry and arranged to store configuration data for setting the configuration state of each of the switches. The control circuitry sets the configuration state of the switches based on a signal received from the memory element. The on resistance of the switch array depends on the switching state of the switches and their individual on resistances.

Abstract: A power converter such as e.g. a buck converter operated in pulse frequency modulation PFM mode and a method are presented. The power converter has an inductor, a switching element, threshold current generator, resistive element, threshold current comparator, a current sensing means, and a current injecting means. The switching element controls an inductor current flowing through the inductor. The threshold current generator generates a threshold current based on a comparison between a reference voltage and an output voltage. The resistive element generates a threshold voltage at a reference node. The threshold current comparator generates, by comparing said threshold voltage with an inductor voltage, a control signal for turning off or on the switching element. The current sensing means senses a current indicative of the inductor current. The current injecting means generates an injection current based on the current sensed by the sensing means.

Abstract: A driver circuit and a method for driving a load. The driver circuit has a power supply to provide electrical power at a supply voltage and a PWM control switch to enable and to disable a load current through the load in an alternating manner. In addition, the driver circuit has a storage unit to be charged using the load current through the load. The driver circuit has a sensing unit to provide a charge indication. There is a recycling switch to couple and to decouple the storage unit to or from the power supply. There is a control unit to, repeatedly control the PWM control switch and the recycling switch based on the charge indication and based on a target charge value for the cumulated load current through the load within a cycle.

Abstract: A method for forming a wafer level chip scale package begins with providing an integrated circuit wafer. Applying a dielectric material to the surface of the integrated circuit wafer. A redistribution conductive layer is formed upon the dielectric material to make contact with the input/output contacts of the integrated circuit. A polymer-based film is applied to the surface of the integrated circuit wafer and is subjected to a compression molding process. Alignment marks are placed on the edge of the integrated circuit wafer. A laser ablation process is implemented to prepare through mold via (TMV) in the cured thermoset plastic material. The solder ball or copper pillar input/output connector is placed in the through mold via (TMV). A reflow process is instigated to connect the input/output connector to the redistribution conductive layer's pad surface.

Abstract: A dual rail power supply system and a method for providing a first voltage and a second voltage to a load are presented. The power supply system draws a load current from the dual rail power supply system. The system has a first voltage rail for coupling to a first terminal of the load, a second voltage rail for coupling to a second terminal of the load, a first power converter to provide the first voltage at the first voltage rail, a second power converter to provide the second voltage at the second voltage rail, a third power converter comprising a first output coupled to the first voltage rail and a second output coupled to the second voltage rail. The third power converter generates a slave current and provides the slave current to the load such that the load current comprises the slave current, during a first mode.

Abstract: A power converter and a method to convert between a first voltage at a first node and a second voltage at a second node is presented. The power converter has a flying capacitor, an inductor, a first switch, a second switch, a third switch, a fourth switch, and a fifth switch. Furthermore, the power converter has a control unit to control the first, second, third, fourth and fifth switches in a first sequence of operation phases to provide step-up conversion between the first voltage and the second voltage; and in a second sequence of operation phases to provide step-down conversion between the first voltage and the second voltage.

Abstract: Relax oscillation circuits have at least one comparison circuit that is structured with a flipped gate transistor and a normal MOS transistor wherein the two transistors having different threshold voltages. The relaxation oscillators are configured for charging and discharging capacitances between the threshold voltages of the flipped gate transistor and the normal MOS transistor by toggling the state of a latching circuit to control the charging and discharging of the capacitances.

Abstract: A switching converter and a method for providing an output voltage is presented. The switching converter includes an inductor coupled to a pair of power switches, a signal generator and a controller. The first power switch is used to magnetize the inductor, while the second power switch is used to de-magnetize it. The signal generator is adapted to generate a modulated signal having a pulse width variable between a minimum value and a maximum value and to drive the first and second power switches based on the modulated signal. Upon identifying that the modulated signal has the minimum pulse width value, the controller increases a reverse current flowing from the inductor through the second power switch to prevent the output voltage from increasing above a target value.

Abstract: A single inductor multiple output SIMO power converter and method are presented. The converter has a single inductor and at least two output terminals which are denoted as first output terminal and second output terminal. The SIMO power converter also has a first switching element and a second switching element. The first switching element is coupled between an output terminal of the inductor and the first output terminal of the SIMO power converter. The second switching element is coupled between the output terminal of the inductor and the second output terminal of the SIMO power converter. The SIMO power converter also has a control circuit to detect an overload condition at the first output terminal, and to generate control signals for controlling the switching of the first switching element and the second switching element based on the detected overload condition.

Abstract: A power converter comprising an error amplifier, a reference current circuit branch and load current circuit branch is presented. The error amplifier is configured to generate an error signal based on a reference value and an output signal at an output of the power converter. The reference current circuit branch comprises a modulation device configured to modulate, based on the error signal, a reference current in the reference current circuit branch. The load current circuit branch comprises a first output transistor configured to adjust, based on the reference current, an output current at the output of the power converter. In addition, the power converter may comprise a slave current circuit branch with a second output transistor configured to adjust, based on the reference current, a slave current in the slave current circuit branch for controlling an external slave power converter.

Abstract: A multi-level power converter and a method using first, second, third and fourth switching elements, an inductor, and a flying capacitor are presented. A first terminal of the inductor may be connected to a switching terminal connecting the second and third switching elements. A first terminal of the flying capacitor may be connected to a terminal connecting the first and second elements. A second terminal of the flying capacitor may be connected to a terminal connecting the third and fourth switching elements. The multi-level power converter may have a first feedback circuit to generate control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current. The converter may have a second feedback circuit to generate control signals to allow the flying capacitor to be charged or discharged using an inductor current flowing through the inductor.

Abstract: A power supply has a multi-level DC-DC converter and a battery pack with two or more cells provided in series. The switching DC-DC converter provides a regulated voltage at an output. The converter has an energy storage element. The switching regulator is designed to selectively operate in two or more different modes. It switches between a first mode where one cell is connected (between battery and inductor of the converter), and the converter functions like a single cell buck converter and a second mode where two cells are connected in series and the converter functions like a two series cell buck converter. In general, any number of cells and modes can be provided, with successive cells being connected in series in each mode.

Abstract: A power converter and method using a flying capacitor, a first transistor, a second transistor, a third transistor, a fourth transistor, and a driver circuit are presented. The first transistor is coupled between an input terminal and a first terminal of the flying capacitor. The second transistor is coupled between the first terminal of the flying capacitor and an output terminal. The third transistor is coupled between the output terminal and a second terminal of the flying capacitor. The fourth transistor is coupled between the second terminal of the flying capacitor and a reference potential. The driver circuit is coupled between a high side power rail and a low side power rail. There is a regulation circuit to regulate a high side voltage of the high side power rail such that the regulated high side voltage is independent of an input voltage at the input terminal.

Abstract: A memory element is provided in which a logical state can be securely stored in all conditions even when input set and reset signals are overlapping. This is achieved through provision of an array of persistence latches with an asynchronous circuit that ensures correct operation. The persistence latches provide a persistent output for each of the first and second edges of each input. The memory element is arranged to receive a plurality of inputs including a first and second input. Each first and second inputs include a digital signal that can transition between a first state via a first edge which triggers transition from the first state to the second state and a second edge which triggers transition from the second state to the first state.