Abstract: A switching power converter with a hysteretic current-mode controller switches at a fixed frequency responsive to a pulse generator that pulses a set signal and a reset signal at the fixed frequency. A power switch in the switching power converter is configured to close responsive to the pulsing of the set signal and to open responsive to the pulsing of the reset signal.

Abstract: History-based valley mode switching techniques and systems are provided to reduce the frequency spreading of switching noise in a switching power converter.

Abstract: A sequential driving method for driving a switch circuit of a power converter is presented. The method has the steps of driving a switch circuit which contains a power switch, defining a driving sequence; and applying sequentially an electrical parameter to the power switch, based on the driving sequence. Defining a driving sequence includes defining a plurality of different driving levels associated with the electrical parameter and defining a plurality of time windows within a switching time period. Each time window is associated with a driving level among the plurality of driving levels.

Abstract: An once a channel voltage exceeds a threshold, when the transistor is in an OFF state. This is over-voltage protection circuit for a transistor is presented. This circuit acts to switch on the transistor achieved with internal components which are integrated with the transistor, avoiding the need for external diodes or Zener structures. The circuit has a transistor with a control terminal, a first current carrying terminal and a second current carrying terminal. The over-voltage protection circuit has a level shifter arranged to feed back a level-shifted version of a channel voltage between said first and second current carrying terminals to the control terminal. The level shifter allows the switching threshold voltage of the transistor to be crossed when a predetermined value of the channel voltage is crossed.

Abstract: An impedance detector for measuring an impedance of a circuit comprises a frequency source, a resistor connected in between the frequency source and the circuit to be measured, a phase shift circuit for applying a phase shift to a signal from the frequency source, a first multiplier for mixing the signal from the frequency source with a signal from the circuit to be measured, a second multiplier for mixing the phase shifted signal with the signal from the circuit to be measured, and a processing circuit for determining an indication of an impedance of the circuit to be measured in dependence on the first mixed signal and the second mixed signal.

Abstract: A circuit and a method for sensing a current flowing through a pass device of a voltage converter. The pass device is switchable between a conducting state and a non-conducting state. The circuit contains an output node for providing an indication of the current flowing through the pass device, a capacitive element, connected between the pass device and the output node. A first switching element is connected between the first terminal of the capacitive element and ground. A second switching element is connected between the second terminal of the capacitive element and ground. A control circuit controls the first and second switching elements to isolate the output node from the terminal of the pass device through the capacitive element while the pass device is in the non-conducting state.

Abstract: A converter and a method of operating a switching converter in a low power mode are presented. The invention relates to a III/V semiconductor switching converter. A switching converter contains a first power switch coupled to a second power switch via a switching node. There is an inductor coupled to the switching node, and a clamp circuit containing a third power switch is coupled in parallel to the first power switch. The switching converter is adapted to turn the first power switch off and to enable control of the third power switch upon identifying that the switching converter provides a low level of power.

Abstract: The present document relates to the measurement of the current through a transistor. In particular, the present document relates to a circuit arrangement which allows an accurate measurement of the current through a power transistor. A circuit arrangement is described. The circuit arrangement is configured to provide an indication of a current flowing through a pass switch, when the pass switch is arranged in parallel to the circuit arrangement. The circuit arrangement comprises a matching unit which comprises a switch bank comprising a plurality of parallel reference switches; a resistor bank comprising a plurality of serial reference resistors; and a reference current source configured to provide a reference current flowing through the switch bank and the resistor bank. The resistor bank and the switch bank are arranged in series.

Abstract: Systems, methods, and apparatus for a circuit with power factor correction (PFC) are disclosed. In one or more embodiments, the disclosed method comprises providing, by a single-stage power converter, a delay in phase between a peak current command and a rectified input voltage such that a phase of a transformer current intentionally lags behind a phase of the rectified input voltage to maintain a power factor (PF) level and a total harmonic distortion (THD) level for the single-stage power converter. In one or more analog embodiments, a resistor and a capacitor are implemented into a conventional single-stage power converter to provide the delay in phase between the peak current command and the rectified input voltage. In one or more digital embodiments, a controller within a conventional single-stage power converter exclusively provides the delay in phase between the peak current command and the rectified input voltage.

Abstract: A buck converter device with minimum off-time operation, the device comprising a comparator providing an output signal of a minimum off time, a first amplifier, a p-channel MOSFET whose gate is connected to the output of a first amplifier providing a signal threshold voltage to a positive terminal of a comparator, a second amplifier; and, a second p-channel MOSFET whose gate is connected to the output of a second amplifier providing a signal to a negative terminal of a comparator, and a capacitor element. A capacitor establishes a voltage whose rate of change is proportional to power supply Vdd, establishing a time to charge the capacitor to a threshold voltage proportional to (Vdd?Vref)/Vdd, and establishing a minimum off time on the output of a comparator.

Abstract: A multi-level buck converter is provided with multiple control loops to regulate the output voltage across a wide duty cycle range while also regulating the flying capacitor voltage. The regulated flying capacitor voltage is exploited to drive the switch transistors that float with respect to ground.

Abstract: A switching power converter is provided with an overvoltage protection circuit that softly switches on a power bus switch during a soft-start period responsive to a device connecting to a data cable for receiving power over a power bus coupled to the power bus switch.

Abstract: A charge pump circuit suitable for low input voltages is presented. The charge pump circuit has a first clock signal generator, a second clock signal generator, and n voltage doubler circuits. The voltage doubler has an input, an output, a first capacitor connected to the first clock signal generator, a second capacitor connected to the second clock signal generator, a first NMOST having the source connected to the input and the drain connected to the first capacitor, a second NMOST having the connected to the source of the first NMOST and the drain connected to second capacitor, a first PMOST having the drain connected to the first capacitor and the source connected to the output, a second PMOST having the source connected to the source of the first PMOST and the drain connected to the second capacitor.

Abstract: A wafer level chip scale package is described. At least one redistribution layer is connected to a wafer through an opening through a first polymer layer to a metal pad on a top surface of the wafer wherein the redistribution layer has a roughened top surface and wherein holes are formed through the at least one redistribution layer in an area where the redistribution layer has an area exceeding 0.2 mm2. At least one UBM layer contacts the at least one redistribution layer through an opening in a second polymer layer wherein the second polymer layer contacts the first polymer layer within the holes promoting cohesion between the first and second polymer layers and wherein the roughened top surface promotes adhesion between the at least one redistribution layer and the second polymer layer.

Abstract: An adaptive valley mode switching power converter is provided that switches on a power switch within valley periods of a resonant voltage oscillation for the power switch. Each valley period is determined with regard to a valley threshold voltage.

Abstract: A power switch transistor for a switching power converter is maintained on during a re-startup period by a zener breakdown voltage following a fault condition for the switching power converter. A source voltage from the power switch transistor is used to charge a VCC capacitor that stores a power supply voltage for a controller for the switching power converter.

Abstract: A protection circuit and a method for a high voltage switching regulator is presented. A power supply comprising a switching converter for providing an output voltage is provided. The switching converter is comprised of a first power switch coupled to a second power switch via a switching node, and a driver coupled to the first and second power switches. There is a protection circuit comprised of a first isolation switch coupled to a second isolation switch and a first driver for driving the first isolation switch, and a second driver for driving the second isolation switch. The circuit and method may comprise turning off both the first isolation switch and the second isolation switch when the first power switch and the second power switch are both turned off. This isolates a low voltage domain from a high voltage domain. This prevents current leakages from occurring during switching dead times.

Abstract: A switching power converter may include a power switch coupled to a primary winding of a transformer, and a primary controller configured to turn on and off the power switch, a synchronous rectifier switch coupled to a secondary winding of a transformer, and a synchronous rectifier controller configured to turn on and off the synchronous rectifier switch. The synchronous rectifier controller may monitor a voltage across the synchronous rectifier switch. The synchronous rectifier controller may determine a period of a resonant oscillation of the voltage across the synchronous rectifier switch following at least one cycling off of the synchronous rectifier switch. The synchronous rectifier controller may adjust the minimum off-time period for the synchronous rectifier switch based on the period of the resonant oscillation. The synchronous rectifier controller may adaptively adjust a minimum off-time period for the synchronous rectifier switch.

Abstract: A driver circuit for generating a sequence of pulses of a drive voltage from a supply voltage is described. The drive voltage is used for operating an electrical actuator, such as an electrical engine or machine. The driver circuit comprises means for providing an amplitude indication of an amplitude of the supply voltage, which is used for generating a first pulse of the sequence of pulses. Furthermore, the driver circuit comprises an integration unit configured to integrate the amplitude indication for a duration of the first pulse, thereby generating an integrated voltage. In addition, the driver circuit comprises a comparator configured to compare the integrated voltage with a reference voltage, thereby generating a comparator signal. Furthermore, the driver circuit comprises a control unit configured to terminate the first pulse in dependence of the comparator signal.

Abstract: A startup circuit is provided for establishing the Vcc voltage level of a switching power converter. The startup circuit uses a switch controller and path switching transistor to provide a two-stage Vcc capacitor charging that reduces startup time while avoiding short circuit damage through the alternate usage of a high impedance charging path and a low-impedance charging path.