Patents Assigned to Digit
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Patent number: 12222831Abstract: A method for testing a data-transferring arrangement includes (c) acquiring a channel output-side data set, (d)(e) evaluating the channel output-side data set to determine an error distribution and a bit error ratio in the channel output-side data set, (f) determining at least one test subsequence, (g) forming a further test data set with at least the determined test subsequence, (h) applying the further test data set to the data-transferring arrangement, (i) acquiring a present channel output-side data set based on the further test data set, (j)(k) evaluating the present channel output-side data set to determine a present error distribution and to determine a present bit error ratio in the present channel output-side data set, comparing the present bit error ratio with a predetermined threshold value and, if the comparison reveals that the bit error ratio is larger than the predetermined threshold value, repeatedly carrying out steps (f) to (k).Type: GrantFiled: February 21, 2023Date of Patent: February 11, 2025Assignee: BitifEye Digital Test Solutions GmbHInventors: Anton Unakafov, Wolfgang Koebele, Valentina Unakafova, Victor-Rico Sanchez-Guerra, Ransom Stephens, Hermann Stehling
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Patent number: 12224989Abstract: Traffic proxy-based Internet of Things terminal key information leakage monitoring methods and systems, electronic devices, storage media, and computer programs. An example method includes: receiving a proxy request sent by an Internet of Things terminal, the proxy request including protocol related information of the Internet of Things terminal, and the protocol related information including part or all of device model information, service type information, and data packet information; according to the protocol related information of the Internet of Things terminal, determining a target protocol corresponding to the Internet of Things terminal; and allocating a target proxy service to the Internet of Things terminal according to the target protocol, and a usage state and an online state of each proxy service in a full traffic proxy pool, and performing key information monitoring on the traffic of the Internet of Things terminal by the target proxy service.Type: GrantFiled: December 1, 2022Date of Patent: February 11, 2025Assignee: Hangzhou Hikvision Digital Technology Co., Ltd.Inventors: Bin Wang, Shaopeng Zhou, Xu Wang, Feng Zhang, Zhicheng Bi, Li Wan, Jun Li, Chonghua Wang, Haitao Zhao
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Patent number: 12223014Abstract: A digital video camera architecture for updating an object identification and tracking model deployed with the camera is disclosed. The invention comprises optics, a processor, a memory, and an artificial intelligence logic which may further comprise artificial neural networks. The architecture identifies objects according to a first confidence threshold of the model and identifies candidate objects according to the first confidence threshold and a second confidence threshold. The model may track the motion of the candidate objects within a visual field, separate the candidate objects into false positive candidate objects and false negative candidate objects according to their tracked motions, and present at least a portion of the false positive candidate objects and false negative candidate objects for further annotation.Type: GrantFiled: November 1, 2021Date of Patent: February 11, 2025Assignee: Western Digital Technologies, Inc.Inventors: Shaomin Xiong, Toshiki Hirano, Damien Kah, Rajeev Nagabhirava
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Patent number: 12224682Abstract: A common-mode voltage injection control method and apparatus for an inverter. For the method and apparatus, a common-mode voltage for a DPWM mode is calculated based on three-phase port voltages and an output power command; a common-mode voltage for an MPC modulation mode is calculated based on the direct current bus voltage, the three-phase port voltages, and the output power command; a modulation proportion is determined based on a maximum phase voltage peak value of the three-phase port voltages, the direct current bus voltage, and a power factor of the output power command; and a common-mode injection voltage is generated based on the common-mode voltage for the DPWM mode, the modulation proportion, and the common-mode voltage for the MPC modulation mode.Type: GrantFiled: January 13, 2023Date of Patent: February 11, 2025Assignee: Huawei Digital Power Technologies Co., Ltd.Inventors: Xinyu Yu, Kai Xin, Peng Dong, Junjie Li
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Patent number: 12223982Abstract: A Data Storage Device (DSD) includes a disk to store data, at least one head to read and write data on the disk, and a Voice Coil Motor (VCM) to move the at least one head over the disk. An upper velocity limit is reduced for moving the at least one head to perform a command to read or write data at a target location on the disk as a precautionary measure against damaging the at least one head during an Emergency Power Off (EPO) state. The upper velocity limit is reduced in response to the target location being in an Outer Diameter (OD) region of the disk, a direction needed to move the at least one head being in an Inner Diameter (ID) to OD direction, and a starting position being at least as radially far from an OD region position as a predetermined threshold.Type: GrantFiled: December 24, 2023Date of Patent: February 11, 2025Assignee: Western Digital Technologies, Inc.Inventors: Hiroshi Uchida, Hidehiko Numasato, Akira Yokozuka, Shrey Khanna, Peyman Niazi
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Patent number: 12225224Abstract: Provided is a method for decoding a prediction mode. In response to determining that a merge mode is enabled for a current block and a current candidate prediction mode is allowed for the current block, the method includes: acquiring enablement states of one or more to-be-traversed prediction modes; decoding indication information of the current candidate prediction mode from a code stream in response to determining that a candidate prediction mode being allowed is present in the to-be-traversed prediction modes; and directly determining that the current candidate prediction mode is used for the current block without decoding the indication information of the current candidate prediction mode from the code stream in response to determining that none of the to-be-traversed prediction modes is allowed.Type: GrantFiled: June 19, 2020Date of Patent: February 11, 2025Assignee: Hangzhou Hikvision Digital Technology Co., Ltd.Inventor: Fangdong Chen
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Patent number: 12224888Abstract: Systems, methods, and apparatus are provided for automated identification of open space in a wireless communications spectrum, by identifying sources of signal emission in the spectrum by automatically detecting signals, analyzing signals, comparing signal data to historical and reference data, creating corresponding signal profiles, and determining information about the open space based upon the measured and analyzed data in near real-time.Type: GrantFiled: September 5, 2024Date of Patent: February 11, 2025Assignee: Digital Global Systems, Inc.Inventor: Daniel Carbajal
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Publication number: 20250047400Abstract: A method comprising: at an importer of an IBOC digital radio broadcasting system: establishing a data link to an audio client configured to buffer audio from an audio source over a buffering duration, to produce buffered audio; receiving, from the audio client, an indication of the buffering duration; identifying a logical channel of an IBOC waveform assigned to the audio client and configured to transmit PDUs of the audio at a PDU rate; computing a quantized number of PDUs that is greater than one into which the buffered audio is to be divided at the audio client based on the buffering duration and the PDU rate; sending, to the audio client, an indication of the quantized number of the PDUs; and upon sending importer data requests to the audio client over the data link, receiving, from the audio client, client data responses each including the quantized number of the PDUs.Type: ApplicationFiled: October 25, 2022Publication date: February 6, 2025Applicant: iBiquity Digital CorporationInventors: Janet Peyla, Russell Iannuzzelli
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Publication number: 20250045211Abstract: Instead of using a bandwidth limiter for bandwidth allocation in an SSD, a dummy virtual function (VF) is used to transfer internal operations. A centralized logic such as the bandwidth limiter is incorporated in the device controller. This logic is responsible for controlling the bandwidth between the hosts. The logic is not just responsible for data transfers triggered by the hosts, but also for data transfers triggered by the device in internal operations such as garbage collection. In order to control the traffic trigged by internal operations, a dummy VF is created along with dummy submission queues. The internal operations are queued in the dummy submission queues, while the bandwidth limiter is responsible for the performance rate. Using this approach, bandwidth allocation is balanced between the hosts and SSD.Type: ApplicationFiled: August 1, 2023Publication date: February 6, 2025Applicant: Western Digital Technologies, Inc.Inventors: Shay BENISTY, Amir SEGEV
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Publication number: 20250048115Abstract: Systems, methods, and apparatuses for providing optimization of network resources. The system is operable to monitor the electromagnetic environment, analyze the electromagnetic environment, and extract environmental awareness of the electromagnetic environment. The system extracts the environmental awareness of the electromagnetic environment by including customer goals. The system is operable to use the environmental awareness with the customer goals and/or user defined policies and rules to extract actionable information to help the customer optimize the network resources.Type: ApplicationFiled: October 23, 2024Publication date: February 6, 2025Applicant: Digital Global Systems, Inc.Inventor: Armando Montalvo
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Publication number: 20250048147Abstract: Systems, methods and apparatus are disclosed for automatic signal detection in an RF environment. An apparatus comprises at least one receiver and at least one processor coupled with at least one memory. The apparatus is at the edge of a communication network. The apparatus sweeps and learns the RF environment in a predetermined period based on statistical learning techniques, thereby creating learning data. The apparatus forms a knowledge map based on the learning data, scrubs a real-time spectral sweep against the knowledge map, and creates impressions on the RF environment based on a machine learning algorithm. The apparatus is operable to detect at least one signal in the RF environment.Type: ApplicationFiled: October 18, 2024Publication date: February 6, 2025Applicant: Digital Global Systems, Inc.Inventors: David William Kleinbeck, Ronald C. Dzierwa, Daniel Carbajal
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Publication number: 20250046351Abstract: To reduce power consumption and circuitry requirements, the following presents an “unmatched” data output architecture, in which the clock path does not mimic the data path. To provide proper data transfers in the data output path, the clock signal is tuned at points of the clock path, such as for data transfers from internal data buses to FIFOs and from the FIFO though the multiplexers to the input/output pads. An amount of timing offset is introduced in the generation of internal transfer clocks, which can be determined as part of a valid data window training process that can be performed by the controller, such as part of the power up process.Type: ApplicationFiled: January 16, 2024Publication date: February 6, 2025Applicant: Western Digital Technologies, Inc.Inventors: Abhishek Singhania, Sajal Mittal
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Publication number: 20250046380Abstract: Technology is disclosed herein for a shallow erase for erase pool management. The memory system performs a shallow erase of a block of memory cells prior to placing the block in a shallow erase pool. The block may remain in the shallow erase pool for a substantial time with little to no risk of damage to the memory cells. The memory system completes the erase of the block at a later time. The memory system may select the block from the shallow erase pool when the system determines there is a need for another fully erased block. The erase voltage used for the shallow erase may be substantially lower in magnitude than the erase voltage used to complete the erase.Type: ApplicationFiled: August 1, 2023Publication date: February 6, 2025Applicant: Western Digital Technologies, Inc.Inventors: Albert Bor Kai Chen, Jiahui Yuan, Ken Oowada
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Publication number: 20250048146Abstract: Systems, methods and apparatus are disclosed for automatic signal detection in an RF environment. An apparatus comprises at least one receiver and at least one processor coupled with at least one memory. The apparatus is at the edge of a communication network. The apparatus sweeps and learns the RF environment in a predetermined period based on statistical learning techniques, thereby creating learning data. The apparatus forms a knowledge map based on the learning data, scrubs a real-time spectral sweep against the knowledge map, and creates impressions on the RF environment based on a machine learning algorithm. The apparatus is operable to detect at least one signal in the RF environment.Type: ApplicationFiled: October 17, 2024Publication date: February 6, 2025Applicant: Digital Global Systems, Inc.Inventors: David William Kleinbeck, Ronald C. Dzierwa, Daniel Carbajal
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Publication number: 20250046386Abstract: When performing a read process, a non-volatile memory first performs a pre-read sensing of the condition of memory cells connected to neighbor word lines. While applying a first word line voltage associated with a first programmed data state to the selected word line, the memory system performs two sensing operations for the first programmed data state on selected memory cells that have neighbor memory cells on the neighbor word lines in a first condition and perform two sensing operations for the first programmed data state on selected memory cells that have neighbor memory cells on the neighbor word lines in a second condition. Based on that sensing, the data being stored in the set of selected memory cells is determined. In some embodiments, at least one of the two sensing operations for each condition includes sensing soft bit information that improves the data decoding process.Type: ApplicationFiled: July 31, 2023Publication date: February 6, 2025Applicant: Western Digital Technologies, Inc.Inventors: Jiahui Yuan, Jiacen Guo, Deepanshu Dutta
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Publication number: 20250046387Abstract: A non-volatile storage apparatus comprises a non-volatile memory divided into blocks, with each block divided into regions. Each region of a same block includes a plurality of non-volatile memory cells controlled by a separate drain side (or different type of) select line for the region such that different regions of a same block are controlled by different drain side (or different type of) select lines. The non-volatile storage apparatus is configured to concurrently program memory cells in multiple regions.Type: ApplicationFiled: July 31, 2023Publication date: February 6, 2025Applicant: Western Digital Technologies, Inc.Inventors: Yichen Wang, Wei Li, Ming Wang, Liang Li
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Publication number: 20250046471Abstract: A system that analyzes alarms from patient monitoring devices and calculates modified alarm thresholds that reduce the number of alarms to a desired level. This capability addresses the common problem of alarm overload and fatigue, where alarms occur so frequently that clinicians cannot respond effectively. The system supports highly efficient calculation of changes in alarm frequency, by storing summaries of alarm data that record maximum and minimum values during an alarm. New thresholds may be selected manually or automatically and may be transmitted directly to the patient monitoring devices as updates to their alarm thresholds. The system may also classify alarms as high (above an upper threshold) or low (below a lower threshold) when devices do not provide this data. The system may also estimate the number of additional alarms that would occur if an upper threshold were reduced, or a lower threshold were increased.Type: ApplicationFiled: August 1, 2023Publication date: February 6, 2025Applicant: Nihon Kohden Digital Health Solutions, Inc.Inventors: Elizabeth BUDI, Allison AUSTIN, Harsh DHARWAD, Abel LIN, Timothy RUCHTI, Brian TU, Arthur WEBB
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Publication number: 20250045462Abstract: The present application discloses a method for processing sequence data, a storage device, and a storage system. The method is applied to a storage device, which processes data in the form of sequence data streams, and includes: the storage device receiving sequence data sent by the host terminal; the storage device storing the sequence data in the form of sequence data streams and setting up corresponding sequence data indexes; the storage device receiving data operation commands for the sequence data from the host terminal, and processing the corresponding sequence data based on the sequence data indexes. Through this method, it is possible to significantly simplify the software stack on the host terminal and reduce the storage access load on the host terminal's processor and memory.Type: ApplicationFiled: October 24, 2024Publication date: February 6, 2025Applicant: Shanghai Longsys Digital Technology Co., LimitedInventor: Yanbin KONG
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Publication number: 20250042306Abstract: A method for pulse heating a power battery of an electric vehicle and an electric vehicle. A powertrain includes a first power circuit and a second power circuit. The method is used to control the second power circuit or a motor power circuit to generate a pulse alternating current on a direct current bus, and the pulse alternating current is used to heat the power battery. A phase value of a pulse alternating current output by at least one of the first power circuit and the second power circuit is adjusted, to reduce a phase difference between a pulse alternating current generated by the first power circuit and a pulse alternating current generated by the second power circuit, thereby improving heating efficiency of the power battery.Type: ApplicationFiled: July 23, 2024Publication date: February 6, 2025Applicant: Huawei Digital Power Technologies Co., Ltd.Inventors: Yankun XU, Sen Cao, Yang Cheng
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Publication number: 20250046388Abstract: Technology is disclosed herein for simultaneous lower tail program verify with upper tail verify. The memory system may apply a reference voltage to a word line following applying a program voltage to the word line. The memory system senses the first set of memory cells targeted for a first data state and the second set of memory cells targeted for a second data state. The memory system determines whether memory cells in the first set have a Vt greater than a maximum target Vt for the first data state based on the sensing of the first set of memory cells. The memory system also determines whether memory cells in the second set have a Vt less than a minimum target Vt for the second data state based on the sensing of the second set of memory cells.Type: ApplicationFiled: August 4, 2023Publication date: February 6, 2025Applicant: Western Digital Technologies, Inc.Inventors: Yingying Zhu, Chao Xu, Ming Wang, Liang Li