Abstract: Disclosed is a half-power buffer/amplifier. The half-power buffer/amplifier includes first and second amplifying blocks respectively corresponding to first and second channels, a first output buffer unit controlled by an output from the first amplifying block, and a second output buffer unit controlled by an output from the second amplifying block. Each of the first and second amplifying blocks includes an input unit configured to amplify a first input signal, thereby outputting first and second currents, and an amplifying unit including a first current mirror, a second current mirror, and a bias unit connected between the first current mirror and the second mirror. Nodes in the first and second amplifying blocks are selectively connected to source/drain terminals of transistors in the first and second amplifying blocks in response to a control signal.

Abstract: Disclosed is an image sensor. The disclosed image sensor includes a pixel array including a plurality of unit pixels arranged in a matrix form having rows and columns, a binning sampling unit configured to output a binning sampling signal according to an average of signals from two or more unit pixels selected from among the unit pixels of each of the columns, and an analog-to-digital converter configured to convert the binning sampling signal to a digital signal. The selected unit pixels have different exposure times.

Abstract: A touch sensor includes a touch panel, a driver for supplying a driving signal to each of driving lines of the touch panel, and a sensor electrically connected to sensing lines of the touch panel, for detecting capacitance of a node capacitor of the touch panel, wherein the sensor includes a first amplifier including a first input terminal, a second input terminal, and an output terminal, the first input terminal being connected to the corresponding sensing line, a feedback capacitor connected between the output terminal and the first input terminal of the first amplifier, and an inverting amplifier for invert-amplifying an output signal of the output terminal of the first amplifier and supplying the invert-amplified output signal to the second input terminal of the first amplifier.

Abstract: A data driver is disclosed. The data driver includes a first latch unit including a plurality of first latches configured to store data, a selector configured to select and/or output data in two or more first latches, a level shifter unit configured to convert a voltage level of the data in the two or more selected first latches and output the voltage level-converted data, and a second latch unit including a plurality of second latches configured to store the voltage level-converted data.

Abstract: Provided is a chip on film (COF) type semiconductor package. The COF type semiconductor device includes a flexible film, an electrode pattern formed on the flexible film, a semiconductor device disposed on the electrode pattern, a conductive pad disposed between the electrode pattern and the semiconductor device to electrically connect the semiconductor device with the electrode pattern, and a first protective layer which seals the conductive pad and the semiconductor device and is formed on a portion of the electrode pattern and the semiconductor device. The first protective layer includes a heat conductive material for dissipating heat generated from the semiconductor device.

Abstract: A gate driver is disclosed. The disclosed gate driver includes a shift register configured to generate a shift signal. The shift signal is based on a gate start signal and a gate clock signal. The gate driver further includes a gate drive signal generator configured to generate a gate drive signal. The gate drive signal is based on a gate control signal and the shift signal. The rising edge of the gate control signal precedes the falling edge of the shift signal, and the falling edge of the gate control signal follows the falling edge of the shift signal. The gate drive signal falls from a second voltage to a third voltage in response to the falling edge of the shift signal and rises from the third voltage to a first voltage in response to the falling edge of the gate control signal. The first voltage is higher than the third voltage but lower than the second voltage.

Abstract: A signal processing circuit of a touch screen panel is provided. A signal processing circuit can include a plurality of driving lines and sensing lines intersecting on the touch screen panel, a plurality of sensing channels connected to the sensing lines respectively and configured to detect whether a touch is performed by sensing mutual capacitance on intersecting nodes of the driving lines and the sensing lines, a distortion detection unit configured to detect whether distortion due to noise occurs on the basis of output voltages of the sensing channels, and a control unit configured to operate switches to alternate the circuit between a distortion mode and a normal mode, depending on whether noise is detected.

Abstract: Disclosed is a display driver including an input pad configured to receive a supply voltage, a wiring line connected to the input pad, a digital-to-analog converter configured to output analog signals based on digital-to-analog conversion results of data, a plurality of output buffer units configured to buffer the analog signals, and a plurality of bias controllers connected to different positions of the wiring line. Each of the bias controllers independently controls a bias voltage of a corresponding one of the output buffer units based on the supply voltage supplied through the wiring line.

Abstract: A bipolar junction transistor (BJT) is provided. The BJT can include a semiconductor substrate, a first well disposed in the substrate and implanted with a first impurity, a second well disposed at one side of the first well and implanted with a second impurity, a first device isolation layer disposed in the first well and defining an emitter area, and a second device isolation layer disposed in the second well and defining a collector area, The BJT can also include an emitter having a second impurity, a base having a first impurity, a collector having a second impurity, and a high concentration doping area having a second impurity at high concentration. The high concentration doping area can be provided at one side of the collector in the second well.

Abstract: Disclosed is an output buffer. The output buffer includes a first amplifier configured to amplify an input signal, and output first to fourth amplified signals according to results of the amplification, a first transistor to receive the first amplified signal, a second transistor to receive the second amplified signal, a third transistor to receive the third amplified signal, a fourth transistor to receive the fourth amplified signal, a first node, connected to drains of the first and second transistors, a second node, connected to drains of the third and fourth transistors, an output node connected to the first and second nodes, and a first controller configured to selectively supply a control voltage to the gates of the first to fourth transistors in response to a control signal.

Abstract: A semiconductor package includes a semiconductor substrate which includes a first connection terminal electrically connected to a wiring for signal transfer. The semiconductor package may include a semiconductor support substrate which may be bonded to the semiconductor substrate such that a second connection terminal and the first connection terminal are connected to face each other, and has a through via exposing the second connection terminal.

Abstract: A touch panel includes a transparent substrate, a first pattern/layer on the transparent substrate, and an second pattern/layer on or under the first pattern/layer. The first pattern/layer includes first electrodes detecting a first coordinate value and first metal interconnections connecting the first electrodes to a flexible printed circuit board (FPCB). The second pattern/layer includes second electrodes detecting a second coordinate value and second metal interconnections connecting the second electrodes to the FPCB. The first and second metal interconnections extend on side and back surfaces of the transparent electrode. Therefore, the metal interconnections connect the first and second patterns/layers to the FPCB by being formed on the side and back surfaces of the transparent substrate, which reduces the length and/or width of the bezel (a non-active region).

Abstract: Disclosed is an image sensor that includes a pixel array including a plurality of unit pixels in a matrix having rows and columns, a binning sampling unit configured to (i) amplify with different gains signals from unit pixels selected from the unit pixels in each of the columns, and (ii) output a binning sampling signal according to an average of the amplified signals, and an analog-to-digital converter configured to convert the binning sampling signal to a digital signal.

Abstract: Disclosed is an image sensor. The disclosed image sensor includes a pixel array including a plurality of unit pixels arranged in a matrix form having rows and columns, a binning sampling unit configured to output a binning sampling signal according to an average of signals from two or more unit pixels selected from among the unit pixels of each of the columns, and an analog-to-digital converter configured to convert the binning sampling signal to a digital signal. The selected unit pixels have different exposure times.

Abstract: An LED driving apparatus controls a light emitting unit including first to k-th LED arrays, a rectifier for rectifying an AC signal, and first to (k?1)-th driving units respectively corresponding to the first to (k?1)-th LED arrays. Each driving unit includes an input terminal connected to a first terminal of the LED array, a sensing terminal connected to a second terminal of the LED array, an output terminal connected to a next driving unit, a transistor between the input terminal and the sensing terminal, and a sensing resistor between the sensing terminal and the output terminal. The rectified signal or voltage is applied to the first driving unit.

Abstract: A data driver includes a data storage unit configured to store a data signal therein, a level shifting block configured to shift a level of the data signal and output a level shifted data signal based on the result of the level shifting, a waveform conversion block configured to convert a waveform of the level shifted data signal and generate a conversion data signal (e.g., based on the waveform conversion), and a digital-analog conversion unit configured to output an analog signal based on the conversion data signal, wherein the conversion data signal has a rising time and a descending time that are different from each other.

Abstract: Disclosed is a light emitting device driving apparatus configured to control a light emitting unit including light emitting devices or array(s) thereof connected in series. The light emitting device driving apparatus includes a rectifier configured to rectify an AC signal and supply to the light emitting unit a ripple current signal, and a sequential driving controller configured to generate a reference current, compare the reference current with a channel current from the light emitting unit, and selectively connect one of channel lines connected to respective output terminals of the light emitting devices or array(s) thereof. The sequential driving controller adjusts a level and/or value of the reference current based on the ripple current signal. The reference current is a current flowing between the first node and a ground potential.

Abstract: Disclosed is a light emitting device driving apparatus for controlling a light emitting unit including series-connected light emitting device arrays. The apparatus includes a rectifier for rectifying an AC signal, and outputting a ripple current signal according to a result of the rectification, a current adjuster for outputting a selection voltage, and a sequential driving controller connected to channel lines connected to respective output terminals of the light emitting device arrays, the sequential driving controller selectively establishing current paths between the light emitting device arrays and the channel lines, based on a voltage level of the ripple current signal, and adjusting an intensity of current flowing through the channel lines, based on the selection voltage.

Abstract: A data driver includes a data storage unit configured to store a data signal therein, a level shifting block configured to shift a level of the data signal and output a level shifted data signal based on the result of the level shifting, a waveform conversion block configured to convert a waveform of the level shifted data signal and generate a conversion data signal (e.g., based on the waveform conversion), and a digital-analog conversion unit configured to output an analog signal based on the conversion data signal, wherein the conversion data signal has a rising time and a descending time that are different from each other.

Abstract: An isolated flyback converter for an LED driver may include: (1) A snubber circuit configured to be connected to the primary side of a transformer. (2) A switching unit configured to have a source terminal and a drain terminal and configured to be turned on or off. (3) A control unit configured to detect a first input signal proportional to a fluctuation in the power supply voltage, detect a second input signal when the switching unit is turned off, generate a signal inversely proportional to the maximum value of the first input signal and multiply the generated signal to the second input signal, and control a peak current of the switching unit to be proportional to the multiplication result of the signal inversely proportional to the maximum value of the first input signal and the second input signal such that a secondary-side current of the transformer is maintained constant.