Patents Assigned to dspace digital signal processing and control engineering GmbH
  • Publication number: 20140088932
    Abstract: A method for editing a computer-aided design model for developing electronic control units in a design environment, whereby the design model comprises at least one model object with first data. The method begins with the reading of all model objects of the design model and the reading of an allocation list, which assigns a particular globally unique key to each model object. If the first data are available, the reading of the first data from a first memory location follows. Then, assignment of the first data to the model object based on the globally unique key occurs, so that the first data are available during editing of the design model. If the first data are not available, assignment of the globally unique key to the model object occurs, so that the globally unique key is available during tediting of the design model.
    Type: Application
    Filed: September 24, 2013
    Publication date: March 27, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: Torsten PIETZSCH
  • Publication number: 20140075409
    Abstract: A method for the computer-aided generation of at least one part of an executable control program, particularly a measuring, control, regulating, and/or calibration program, for controlling a control system having at least one electronic processor unit is provided. The functionality of the control program is described at least partially in at least one graphical model and the graphical model is divided in hierarchical levels into submodels. A submodel can be divided nested into submodels of a lower hierarchical level, whereby values for options for the compiling of the graphical model to program code are preset and program code is generated from the model co-compiled to the executable control program. Values for options for the compiling of the graphical model to program code and to the executable control program can be preset thereby granularly with the automatic avoidance of conflicting presettings of values for these options.
    Type: Application
    Filed: September 11, 2013
    Publication date: March 13, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Karsten FISCHER, Torsten PIETZSCH, Michael MAIR, Wolfgang TRAUTMANN
  • Publication number: 20140055899
    Abstract: An electronic protection device for protecting at least one electrical load, connectable to the protection device, whereby the electronic protection device has an input terminal and an output terminal, and whereby the protection device includes a fuse element, which is thermally self-resetting, and whereby the fuse element is provided and set up to conduct or limit a first current as a function of a fuse element temperature, whereby a limiting component is provided to limit the first current, and whereby the limiting component has a first transistor that is connected in series to the fuse element and a monitoring circuit that influences the first transistor. The monitoring circuit blocks the first transistor when the first current reaches or exceeds a predefined maximum current value and unblocks it when the first current reaches or falls below a predefined reset current value.
    Type: Application
    Filed: August 23, 2013
    Publication date: February 27, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: Paul GRUBER
  • Patent number: 8656762
    Abstract: A method for detecting a first rotation angle of a first shaft of an engine is provided, whereby a first marking carrier with sensor-readable markings is provided, whereby the markings form a first marking pattern that has marking sections having at least one first and a second marking section. The first marking carrier is scanned by a first sensor and a first sensor signal is generated. The first sensor signal is modulated by the markings on the marking carrier. A correlation between a time course of the first sensor signal and a time signal is made by a computing unit. A first marking section is recovered from the first sensor signal by the computing unit, and then, a first exclusion criterion for excluding the first stored marking section is determined from the recovered first marking section. The first stored marking section is then excluded by the first exclusion criteria.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: February 25, 2014
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Wolfgang Hoetzel
  • Patent number: 8645918
    Abstract: An adjustment device for adjusting at least one control device with at least one control device microcontroller and with at least one control device debug interface, where the adjustment device comprises at least one programmable unit, at least one data transmission interface for connecting the adjustment device to an operating unit, and at least one adjustment device debug interface for connecting the adjustment device to the control device debug interface of the control device. The adjustment device according to the invention accomplishes the objective of reducing the load on the control device due to control device application by at least one address list and at least one data list, which are provided in a memory of the adjustment device.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: February 4, 2014
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Robert Leinfellner, Ortwin Ludger Franzen, Hans-Guenter Limberg, Marc Dressler, Paul Gruber
  • Publication number: 20130304448
    Abstract: A configuration tool includes a tangible, non-transitory computer-readable medium having computer-executable instructions for configuring a model of a technical system and displaying the model on a display connected to a computer. The model includes at least two model components. Each model component has at least one port. Each model component is displayable in an expanded component representation on the display. The at least one port of each model component is connectable to at least one port of another model component by port association lines. Each model component is displayable in an expanded line representation on the display along with the at least one port and the port association lines of each model component. At least for one selected model component the port association lines connected to ports of the selected model component can be selected to be displayed in a reduced line representation.
    Type: Application
    Filed: May 8, 2012
    Publication date: November 14, 2013
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Martin Ruehl, Karsten Kruegel, Bjoern Mueller
  • Patent number: 8555405
    Abstract: A method is provided for the authorization management of digital contents between at least one owner of authorizations with a first electronic work environment and at least one user of the contents with a second electronic work environment. The owner of the authorizations provides the digital contents to the user of the contents by means of the first electronic work environment at a defined scope of authorizations and the user of the contents is entitled to use the provided digital contents on the second electronic work environment only at the defined scope of authorization. The digital contents are encoded with encryption, the encoded contents are exchanged between the first electronic work environment and the second electronic work environment and the encoded contents are subsequently decoded by means of decryption pertaining to the digital contents.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: October 8, 2013
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Alexander Jeschke, Ulrich Louis
  • Publication number: 20130262911
    Abstract: A method for providing a timestamp in a real-time system, whereby the real-time system has an FPGA and a CPU, which cooperate with one another, and at least one register, which contains a system time, is implemented in the FPGA. The method includes the steps of providing a CPU counter for the system time, which is driven by a clock signal of the CPU, providing a synchronization counter in the CPU, whereby the synchronization counter is driven by a clock signal of the CPU, reading of the counter for providing the system time by a real-time application, querying the synchronization counter in the real-time application, and synchronizing the counter with the system time in the real-time application, when the synchronization counter outputs a value that corresponds to more than a predefined time period since the last synchronization of the CPU counter with the system time.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 3, 2013
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: dSPACE digital signal processing and control engineering GmbH
  • Publication number: 20130253672
    Abstract: A development system for creating a control unit program, in which a control unit program is configured to control an electronic control unit in a vehicle. The development system includes an electronic computer unit, which is configured to generate the control unit program. The development system includes an input unit assigned to the electronic computer unit and a display unit assigned to the electronic computer unit. The display unit has a first display area and a second display area. At least one build process step can be executed by means of the development system.
    Type: Application
    Filed: March 20, 2013
    Publication date: September 26, 2013
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: dSPACE digital signal processing and control engineering GmbH
  • Patent number: 8543879
    Abstract: A method and correct apparatus for correction of at least one digital information item which is transmitted by at least one information source to at least one information sink is provided. The information source can be connected both to an information sink and also to a correction apparatus by means of a data transmission medium.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: September 24, 2013
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Steffen Schuette
  • Patent number: 8527948
    Abstract: The invention relates to a process for the automatic matching of a control software component to a control unit network in order to permit communication between control software components of the control unit network, whereby the control unit network-independent communication commands of a control software component in the program code are replaced by control unit network-dependent communication commands.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: September 3, 2013
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Oliver Niggemann, Joachim Stroop, Rainer Otterbach, Herbert Hanselmann
  • Patent number: 8510708
    Abstract: Method for optimizing a control program for actuators, wherein by means of the control program, at least one first function comprising the allocated program lines is executed to control a first actuator, the control program being in the form of an executable model in a first step, and, based on the model, an instrumented program code being generated by a code generator for a test control program, and a first parameter being allocated to the first function, and wherein by means of a test unit, the test control program is processed repeatedly with predefined input values and, based on the result of this processing, a value is allocated to the first parameter, and the value allocated to the first parameter is stored in a memory area allocated to the model, and in a second step, the optimized control program is generated by the code generator, the value allocated to the first parameter being read out of the allocated memory area by an optimization unit of the code generator and compared with a predefined threshol
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: August 13, 2013
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Wolfgang Trautmann
  • Patent number: 8504996
    Abstract: The invention relates to a method for detecting memory leaks produced by a program running on a computer, wherein during a program run, for each allocation of a memory region at least one information item concerning the performed allocation is entered in an allocation list and a check is made as to whether the allocation list contains a stored reference pattern of information that is typical for one or more memory leaks, and after a stored reference pattern is found the program run is paused, or a memory leak thus detected is associated with the region of the running program whose processing resulted in the most recent entry in the allocation list. The invention further relates to a computer programming product which carries out the method when the computer program is executed on a computer.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: August 6, 2013
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Gunther Zagatta
  • Patent number: 8494803
    Abstract: A device for testing an electrical component is provided, having a simulation device for generating a simulation signal, a testing device for connecting the electrical component, at least two connecting devices, and a selection device for selecting the connecting device, wherein the simulation device and the testing device can be connected in an electrically conducting manner to at least one of the connecting devices by the selection device and the individual connecting devices differ from one another in at least one electrical property. Thus, a device for testing an electrical component is provided with which in a simple manner the testing accuracy can be increased by minimizing the signal corruption due to a parasitic property of the connecting device.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: July 23, 2013
    Assignee: DSpace Digital Signal Processing and Control Engineering GmbH
    Inventors: Dirk Hasse, Peter Scheibelhut, Dirk Bittner, Robert Polnau
  • Patent number: 8446208
    Abstract: A circuit arrangement having at least one analog switch, which is operated by a supply voltage and which comprises a switching signal contact and a pair of switch contacts, whereby applied to the switching signal contact is an electrical switching signal depending on which an electrical connection can be switched between the switch contacts whose internal on-resistance is temperature dependent, whereby the circuit arrangement has in the vicinity of the at least one analog switch at least one additional similar reference analog switch, which is operated with the same common supply voltage and which is controlled such that the switch contacts thereof are/can be connected continuously via the internal temperature-dependent on-resistance thereof, whereby at least one comparison circuit is provided by means of which depending on the comparison of the internal on-resistance of the at least one reference analog switch with at least one external reference resistance or an otherwise setpoint setting of the reference a
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: May 21, 2013
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Paul Gruber
  • Publication number: 20130104635
    Abstract: A method for detecting a first rotation angle of a first shaft of an engine is provided, whereby a first marking carrier with sensor-readable markings is provided, whereby the markings form a first marking pattern that has marking sections having at least one first and a second marking section. The first marking carrier is scanned by a first sensor and a first sensor signal is generated. The first sensor signal is modulated by the markings on the marking carrier. A correlation between a time course of the first sensor signal and a time signal is made by a computing unit. A first marking section is recovered from the first sensor signal by the computing unit, and then, a first exclusion criterion for excluding the first stored marking section is determined from the recovered first marking section. The first stored marking section is then excluded by the first exclusion criteria.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 2, 2013
    Applicant: dSpace digital signal processing and control engineering GmbH
    Inventor: dSpace digital signal processing and control engineering GmbH
  • Patent number: 8428914
    Abstract: A method for real-time calculation of state variables (xM) of a process model on a process computer with a first calculating unit and a process interface, wherein the computer is designed so that at least one state variable of a physical process can be received by the computer using the interface and/or at least one output variable for controlling the process can be issued by the computer, wherein the model is calculated by the first calculating unit with an explicit integration method for determining the state variables. According to this method, a second calculating unit is provided, the model is carried out with the second calculating unit using an implicit integration method essentially simultaneously with the calculation of the model with the first calculating unit and the state variables (xM,i) calculated with the second calculating unit and the implicit method are used as state variables (xM) of the model.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: April 23, 2013
    Assignee: dSPACE Digital Signal Processing and Control Engineering GmbH
    Inventor: Jorg Frochte
  • Publication number: 20130090886
    Abstract: A method for real-time testing of a control unit for an internal combustion engine using a simulator is provided. The control unit and the simulator are connected to one another by a first data channel. The control unit transmits engine control data to the simulator through the first data channel and the simulator calculates engine state variables in real time on its first simulator processor with a first sampling step size and transmits at least some of the engine state variables to the control unit. Thus, selected engine state variables can be made available at a different frequency, and in particular at a higher frequency, than is possible by the first sampling step size of the first simulator processor, in that the simulator calculates at least one specific engine state variable using a partial engine model and with a second sampling step size different from the first sampling step size.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 11, 2013
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: dSPACE digital signal processing and control engineering GmbH
  • Patent number: 8303316
    Abstract: The patent deals with a contact fixture for a PCB with one first plug-in connector and one second plug-in connector, whereby the first plug-in connector has a number of first contact elements, the second plug-in connector has a number of second contact elements, the first plug-in connector is arranged on the first side of the PCB, the second plug-in connector is arranged on the second side of the PCB opposite to the first side, the first contact element and/or the second contact element is/are designed as a connector to establish a detachable electrically conductive connection with at least the second contact element or the first contact element, and the first contact element and the second contact element are connected through an opening in the PCB.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: November 6, 2012
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Peter Scheibelhut, Andreas Hostmann
  • Patent number: 8290755
    Abstract: The present invention relates to a test device for testing a control system and an associated method for operating the test device. The test device includes an addressable memory. The test device is configured to calculate at least one environment model and to execute at least one test model. The environment model is described by environment model variables whose values are filed at fixed physical addresses in memory locations of the memory. The test device further comprises an allocation unit, in which the allocation of all or a part of the environment model variable to the allocated physical addresses of the memory is filed such that the test model can read the allocation of the environment model variables to their specific memory addresses so as to modify the environment model variable values in the environment model during its execution.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: October 16, 2012
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Nicola Bruski, Ralf G Boerger, Robert Leinfellner, Eduard Miller, Thomas Woelfer