Patents Assigned to dspace digital signal processing and control engineering GmbH
  • Publication number: 20140330401
    Abstract: A test device for testing at least a portion of a virtual control unit with a simulation environment in a simulator, having the virtual control unit and the simulation environment. The virtual control unit has at least one software component with an external data interface. The simulation environment has a data interface for indirect data exchange with the virtual electronic control unit. A reduced dependency between the virtual control unit and the simulation environment with the result that electrical fault simulation with virtual electronic control units is possible in a simpler way, is achieved in that a virtual control unit pin module and a virtual manipulation unit are additionally provided between the virtual control unit and the simulation environment, the two units transmit a virtual physical control unit signal through a virtual control unit pin of the virtual electronic control unit pin module. The virtual manipulation unit outputs a manipulated virtual physical control unit signal.
    Type: Application
    Filed: May 6, 2014
    Publication date: November 6, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Ortwin Ludger FRANZEN, Karsten KRUEGEL
  • Patent number: 8850386
    Abstract: A method for estimating a resource consumption of storage space and/or of required runtime of a control device program code to be generated for a control program, whereby the functionality of the control program is given in an executable model. The model has a function with first functional magnitudes and first information associated with the first functional magnitudes and optimization parameters for optimizing a code generator. A program code representation is generated for part of the model comprising the function by the code generator taking into account first values of the optimization parameters. An estimation unit comprises a resource model with hardware parameters. An estimated value for the storage space requirement is determined for the control device program code and/or a runtime estimated value is determined for the control device program code by the estimation unit taking into account the hardware parameters and based on the program code representation.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: September 30, 2014
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Wolfgang Trautmann
  • Publication number: 20140244231
    Abstract: A method for performing configuration of a control unit test system with hardware components connected thereto, wherein control units can be tested with the test system in an environment simulated by the test system by means of a model, and wherein the test system comprises at least one computer, in particular a computer executing the model, as well as hardware components, connected to one another by means of at least one network, in which at least a portion of the hardware components comprises a dedicated server (MIS) that, by means of communication, provides access to the configuration data associated with the hardware component, in particular stored in the hardware component, and the model and/or the hardware component is adapted, in particular configured, as a function of the configuration data that are made accessible.
    Type: Application
    Filed: February 24, 2014
    Publication date: August 28, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Juergen PAULE, Juergen KLAHOLD
  • Patent number: 8818615
    Abstract: A method is provided for processing data in an influencing device, whereby the influencing device is connected to a vehicle control unit and to a data processing unit. The vehicle control unit and the influencing device are disposed in a motor vehicle or, for example, on a test bench in a laboratory. A first program runs in the vehicle control unit. Data are exchanged according to an XCP protocol and/or a CCP protocol between the data processing unit and the influencing device. The influencing device has a second execution unit, which executes predetermined data processing steps more rapidly than the first execution unit. The data exchanged by the XCP protocol or the CCP protocol are checked for a predetermined criterion and, based on the result of the check, the data are processed either in the first execution unit or in the second execution unit.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: August 26, 2014
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Marc Dressler, Bastian Kellers, Daniel Hofmann, Thorsten Hufnagel
  • Publication number: 20140236560
    Abstract: A method for performing an inventory of the hardware components connected to a control unit test system, wherein control units can be tested with the test system in an environment simulated by the test system by means of a model, and wherein the test system comprises at least one computer) and hardware components that are connected to one another by means of at least one network. For at least a portion of the hardware components, in particular of all simulation-specific hardware components, at least one item of component information that uniquely and digitally identifies the hardware component is read therefrom, and all identifying component information that has been read out is stored.
    Type: Application
    Filed: February 21, 2014
    Publication date: August 21, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Thorsten BREHM, Susanne KOEHL, Juergen PAULE, Juergen KLAHOLD, Claus DIENER
  • Publication number: 20140229723
    Abstract: A method for accessing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration into the FPGA, executing the FPGA hardware configuration in the FPGA, requesting a signal value of the FPGA, sending status data from a functional level of the FPGA to a configuration memory in its configuration level, reading the status data from the configuration memory as readback data, and determining the signal value of the readback data. A method is also provided for making an FPGA build, based on an FPGA model, using a hardware description language, including the steps of creating an FPGA hardware configuration, identifying memory locations of a configuration memory for status data of at least one signal value based on the FPGA hardware configuration, and creating a list with signal values accessible at runtime and the memory locations corresponding thereto.
    Type: Application
    Filed: February 11, 2014
    Publication date: August 14, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: Heiko KALTE
  • Publication number: 20140215270
    Abstract: A method for manipulating a memory operation of a control unit program on a memory of a virtual or real electronic control unit (ECU), such as is used in vehicles, for example. The manipulation of the memory operation is accomplished by a memory manipulation program component, via which a set of manipulation functions is provided, from which at least one manipulation function is selected, so that this function, by activating the memory manipulation program component, changes a memory access initiated by the control unit program in accordance with the selected manipulation function during execution of the control unit program.
    Type: Application
    Filed: January 29, 2014
    Publication date: July 31, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Ulrich KIFFMEIER, Tobias SIELHORST
  • Publication number: 20140214783
    Abstract: A computer-implemented method for data management of product variants in control unit development is provided. Consistent data management is ensured by initially specification of product features in a variant model, specification of components in at least one domain, and definition of feature/component dependencies by associating components with at least one product feature, and subsequently specification of at least one product variant of interest by selecting product features, specification of at least one domain of interest, automated identification of the components pertaining to the product variant of interest through automated evaluation of the feature/component dependencies, and automated output of the identified components.
    Type: Application
    Filed: January 29, 2014
    Publication date: July 31, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Dirk STICHLING, Ansgar KUHLMANN, Andreas BOMERT, Daniel BECKE, Jobst RICHERT
  • Publication number: 20140207994
    Abstract: A circuit arrangement for connecting a bus participant to at least one bus, having an interface for connecting the bus participant to the circuit arrangement, a first bus input, and a first bus output between which the bus participant is switchable via the interface. The circuit arrangement includes a second bus input and output for connecting the bus to the circuit arrangement in a ring topology in such a way that the first bus output is connected at least indirectly to the second bus input and the second bus output is connected at least indirectly to the first bus input via the bus. The bus in the circuit arrangement can be separated to obtain a line topology and can be configured as bus-terminating at one of the bus inputs or bus outputs. A system for the functional testing of bus participants on a bus in a simulation environment is provided.
    Type: Application
    Filed: January 22, 2014
    Publication date: July 24, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Abdallah CHERKAOUI, Christian DIERKES, Lars KOPKA
  • Patent number: 8707255
    Abstract: The invention relates to a method for testing the compatibility between two software components of a control device network, a technical interface description being assigned to each software component, this interface description having a specified description standard, and each description standard having a hierarchical position in an hereditary hierarchy of all possible description standards. The common description standard, which is nearest in the hereditary hierarchy, of the software components to be compared is determined based on the hereditary hierarchy, and the common portion of the respective interface descriptions is determined based on the common description standard of the common portion of the respective interface descriptions and compared with one another.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: April 22, 2014
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Oliver Niggemann, Joachim Stroop, Rainer Otterbach, Herbert Hanselmann
  • Patent number: 8701079
    Abstract: A procedure for generating an executable overall control program such as a measurement, control, regulation and/or calibration is illustrated and described for controlling a control system having at least one electronic processor unit, whereby multiple functional model components of one of the functional models describing the functionality of the overall control program are compiled in data code, the data elements used in the functional model components are listed at least partially in one of the various data element sets of the functional model. References between data elements in the data element set and those functional model components of the functional model in which the data elements are used are registered, and these references are saved as additional reference information.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: April 15, 2014
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Jörg Niere, Carsten Schmidt, Wolfgang Trautmann
  • Publication number: 20140088932
    Abstract: A method for editing a computer-aided design model for developing electronic control units in a design environment, whereby the design model comprises at least one model object with first data. The method begins with the reading of all model objects of the design model and the reading of an allocation list, which assigns a particular globally unique key to each model object. If the first data are available, the reading of the first data from a first memory location follows. Then, assignment of the first data to the model object based on the globally unique key occurs, so that the first data are available during editing of the design model. If the first data are not available, assignment of the globally unique key to the model object occurs, so that the globally unique key is available during tediting of the design model.
    Type: Application
    Filed: September 24, 2013
    Publication date: March 27, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: Torsten PIETZSCH
  • Publication number: 20140075409
    Abstract: A method for the computer-aided generation of at least one part of an executable control program, particularly a measuring, control, regulating, and/or calibration program, for controlling a control system having at least one electronic processor unit is provided. The functionality of the control program is described at least partially in at least one graphical model and the graphical model is divided in hierarchical levels into submodels. A submodel can be divided nested into submodels of a lower hierarchical level, whereby values for options for the compiling of the graphical model to program code are preset and program code is generated from the model co-compiled to the executable control program. Values for options for the compiling of the graphical model to program code and to the executable control program can be preset thereby granularly with the automatic avoidance of conflicting presettings of values for these options.
    Type: Application
    Filed: September 11, 2013
    Publication date: March 13, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Karsten FISCHER, Torsten PIETZSCH, Michael MAIR, Wolfgang TRAUTMANN
  • Publication number: 20140055899
    Abstract: An electronic protection device for protecting at least one electrical load, connectable to the protection device, whereby the electronic protection device has an input terminal and an output terminal, and whereby the protection device includes a fuse element, which is thermally self-resetting, and whereby the fuse element is provided and set up to conduct or limit a first current as a function of a fuse element temperature, whereby a limiting component is provided to limit the first current, and whereby the limiting component has a first transistor that is connected in series to the fuse element and a monitoring circuit that influences the first transistor. The monitoring circuit blocks the first transistor when the first current reaches or exceeds a predefined maximum current value and unblocks it when the first current reaches or falls below a predefined reset current value.
    Type: Application
    Filed: August 23, 2013
    Publication date: February 27, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: Paul GRUBER
  • Patent number: 8656762
    Abstract: A method for detecting a first rotation angle of a first shaft of an engine is provided, whereby a first marking carrier with sensor-readable markings is provided, whereby the markings form a first marking pattern that has marking sections having at least one first and a second marking section. The first marking carrier is scanned by a first sensor and a first sensor signal is generated. The first sensor signal is modulated by the markings on the marking carrier. A correlation between a time course of the first sensor signal and a time signal is made by a computing unit. A first marking section is recovered from the first sensor signal by the computing unit, and then, a first exclusion criterion for excluding the first stored marking section is determined from the recovered first marking section. The first stored marking section is then excluded by the first exclusion criteria.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: February 25, 2014
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Wolfgang Hoetzel
  • Patent number: 8645918
    Abstract: An adjustment device for adjusting at least one control device with at least one control device microcontroller and with at least one control device debug interface, where the adjustment device comprises at least one programmable unit, at least one data transmission interface for connecting the adjustment device to an operating unit, and at least one adjustment device debug interface for connecting the adjustment device to the control device debug interface of the control device. The adjustment device according to the invention accomplishes the objective of reducing the load on the control device due to control device application by at least one address list and at least one data list, which are provided in a memory of the adjustment device.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: February 4, 2014
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Robert Leinfellner, Ortwin Ludger Franzen, Hans-Guenter Limberg, Marc Dressler, Paul Gruber
  • Publication number: 20130304448
    Abstract: A configuration tool includes a tangible, non-transitory computer-readable medium having computer-executable instructions for configuring a model of a technical system and displaying the model on a display connected to a computer. The model includes at least two model components. Each model component has at least one port. Each model component is displayable in an expanded component representation on the display. The at least one port of each model component is connectable to at least one port of another model component by port association lines. Each model component is displayable in an expanded line representation on the display along with the at least one port and the port association lines of each model component. At least for one selected model component the port association lines connected to ports of the selected model component can be selected to be displayed in a reduced line representation.
    Type: Application
    Filed: May 8, 2012
    Publication date: November 14, 2013
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Martin Ruehl, Karsten Kruegel, Bjoern Mueller
  • Patent number: 8555405
    Abstract: A method is provided for the authorization management of digital contents between at least one owner of authorizations with a first electronic work environment and at least one user of the contents with a second electronic work environment. The owner of the authorizations provides the digital contents to the user of the contents by means of the first electronic work environment at a defined scope of authorizations and the user of the contents is entitled to use the provided digital contents on the second electronic work environment only at the defined scope of authorization. The digital contents are encoded with encryption, the encoded contents are exchanged between the first electronic work environment and the second electronic work environment and the encoded contents are subsequently decoded by means of decryption pertaining to the digital contents.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: October 8, 2013
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Alexander Jeschke, Ulrich Louis
  • Publication number: 20130262911
    Abstract: A method for providing a timestamp in a real-time system, whereby the real-time system has an FPGA and a CPU, which cooperate with one another, and at least one register, which contains a system time, is implemented in the FPGA. The method includes the steps of providing a CPU counter for the system time, which is driven by a clock signal of the CPU, providing a synchronization counter in the CPU, whereby the synchronization counter is driven by a clock signal of the CPU, reading of the counter for providing the system time by a real-time application, querying the synchronization counter in the real-time application, and synchronizing the counter with the system time in the real-time application, when the synchronization counter outputs a value that corresponds to more than a predefined time period since the last synchronization of the CPU counter with the system time.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 3, 2013
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: dSPACE digital signal processing and control engineering GmbH
  • Publication number: 20130253672
    Abstract: A development system for creating a control unit program, in which a control unit program is configured to control an electronic control unit in a vehicle. The development system includes an electronic computer unit, which is configured to generate the control unit program. The development system includes an input unit assigned to the electronic computer unit and a display unit assigned to the electronic computer unit. The display unit has a first display area and a second display area. At least one build process step can be executed by means of the development system.
    Type: Application
    Filed: March 20, 2013
    Publication date: September 26, 2013
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: dSPACE digital signal processing and control engineering GmbH