Patents Assigned to dSPACE digital signal processing and control engineering
  • Publication number: 20200145486
    Abstract: Computer network having a plurality of clocks that are synchronized with one another, that are distributed among multiple participants in the computer network, and from which a global system time of the computer network can be read out. The computer network includes a first synchronizing signal transmitter for a first synchronizing signal and a second synchronizing signal transmitter for a second synchronizing signal, and every participant can be equipped to synchronize the value of a locally stored variable quantity with a global value on the basis of the first synchronizing signal or the second synchronizing signal, and in doing so to take into account a time lag of the synchronizing signal.
    Type: Application
    Filed: November 5, 2019
    Publication date: May 7, 2020
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Peter AREND, Heiko KALTE, Dominik LUBELEY, Jochen SAUER
  • Patent number: 10628540
    Abstract: A method for simulating a peripheral circuit arrangement that can be connected to a control device is provided. A simulation device is electrically connected to the control device and has a first control element with which a first simulation current that can be passed from a first load terminal of the control device to a first control element output of the first control element can be influenced. The first control element includes a first multistage converter, and the simulation device also includes a first semiconductor switch control and a computing unit that executes model code. A first switch control signal is computed and provided for forwarding to the first semiconductor switch control, which has at least one first comparator. A pulse-width-modulated first gate-source voltage is generated and applied to a first control terminal and a first simulation current is influenced by the first gate-source voltage.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: April 21, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Gerrit Meyer
  • Patent number: 10620265
    Abstract: A method for real-time testing of a control unit with a simulator is provided. The simulator calculates a load current and a load voltage as electrical load state variables via converter control data and via an electrical load model that does not take into account current discontinuities caused by the converter, and transmits at least a portion of the load state variables to the control unit. A control observer is additionally implemented on the simulator that calculates at least the load current as a load state variable taking into account the converter control data and an observer load model. The observer detects a zero-crossing of the load current and a current discontinuity caused thereby from the calculated load current, and upon detection of a current discontinuity the observer calculates an electrical compensating quantity.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: April 14, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Quang Ha, Martin Aust, Frank Puschmann
  • Patent number: 10622932
    Abstract: A method for emulating a three-phase, brushless DC motor using a load emulator that is connected in a three-phase manner via load terminals to supply terminals of a motor control unit. The load emulator has emulator power electronics and an emulator control unit for controlling the emulator power electronics. The emulator control unit determines the supply terminals that are actuated by the motor control unit and the supply terminals that are not actuated, and the emulator power electronics are actuated by the emulator control unit in such a way that phase currents calculated by the emulator control unit on the basis of a motor model flow in the supply terminals that are actuated by the motor control unit and a phase voltage calculated by the emulator control unit on the basis of a motor model is applied to the supply terminal that is not actuated by the motor control unit.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: April 14, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Nils Holthaus
  • Patent number: 10601357
    Abstract: A method for emulating a three-phase electric motor using a load emulator, wherein the load emulator is connected in a three-phase manner via its load terminals to the supply terminals of a motor controller. The load emulator has emulator power electronics and an emulator controller for controlling the emulator power electronics. The emulator controller determines the supply terminals that are driven by the motor controller and the supply terminals that are not driven. The emulator power electronics are driven by the emulator controller in such a manner that phase currents calculated by the emulator controller on the basis of a motor model flow in the supply terminals that are driven by the motor controller. A phase voltage calculated by the emulator controller on the basis of a motor model is applied to the supply terminal that is not driven by the motor controller.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: March 24, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Nils Holthaus
  • Patent number: 10591453
    Abstract: A test bench for a control system for controlling a wideband lambda sensor, which is configured to calculate an actual value, which represents an oxygen concentration in a measuring gap of a wideband lambda sensor or an indicator value from which the oxygen concentration can be derived, with consideration of a current generated by a pump voltage in an electrical circuit. In order to simulate the electrical response of a pump cell of the wideband lambda sensor, a first diode and a second diode are connected in parallel in the electrical circuit such that a current flows through the first diode at a first polarity of the pump voltage and a current flows through the second diode at a second polarity of the pump voltage.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: March 17, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Dirk Hasse, Michael Wartig
  • Patent number: 10585650
    Abstract: A computer-implemented method for generating program code based on one or more blocks of a block diagram in a technical computing environment including a model editor and a code generator. The method comprises opening the block diagram in the model editor, the block diagram comprising a delay block that delays a signal received by an input port for a number of periods before being emitted at an output port, determining that a composite signal is connected to the input port, and generating definitions for variables, the variables including a state buffer, a pointer and an index. The method further comprises generating loop code, the loop code comprising instructions for setting the pointer to a position in the state buffer with an offset of index, instructions for outputting elements from the state buffer, instructions for inputting the composite signal to the state buffer, and instructions for adjusting the index.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: March 10, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Zein Dowe, Michael Mair
  • Publication number: 20200074375
    Abstract: A method to determine a product maturity by means of tests, wherein a test comprises executing a test case by means of a test environment applied to a system under test, and for at least one test there is no result; and the method comprises the steps of predetermining rules for calculating a probability that a test that does not currently have a result will be successful or unsuccessful, wherein available or expected results of tests are used as input variables for the rules, and probabilities are returned as output variables; and calculating the probability that a test with no available result will be successful by means of at least some of the predetermined rules; and presenting the product maturity as a function of the probabilities calculated in the previous step.
    Type: Application
    Filed: November 8, 2019
    Publication date: March 5, 2020
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventor: Holger NAUNDORF
  • Publication number: 20200064803
    Abstract: An adapter for connecting an embedded system to a control computer having a standard interface, in particular a network interface, a first subcircuit, and a second subcircuit, the first subcircuit being designed to communicate with the control computer via the standard interface by means of a standard protocol, preferably XCP. The first subcircuit is designed to convert a protocol functionality requested in the standard protocol via the standard interface, out of a set of supported protocol functionalities into the call for one or more elementary functions out of a defined overall set of elementary functions. The first subcircuit is connected to the second subcircuit via an internal interface, wherein the second subcircuit has a programmable computing module which is configured to provide at least one elementary function out of the overall set of elementary functions which can be called up via the internal interface by means of a call.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 27, 2020
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Marc DRESSLER, Thomas SANDER, Guenter MENKE
  • Patent number: 10551281
    Abstract: A computer-implemented method for testing an real and/or virtual automotive system through a test by a test environment interacting with the real and/or virtual part, which includes a test series with different test cases of the test for different execution conditions that are specified in test configurations. Each combination of test case and test configuration is assigned a test status value from a group of predefined test status values in accordance with an evaluation of the function of the system in the corresponding test. For further planning, execution, and/or evaluation of the test series at least once a relative test coverage of at least one of the status values is determined in the resulting test case configuration matrix and/or a relative potential for improvement of the test coverage of at least one of the status values with regard to a test case and/or with regard to a configuration is determined.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: February 4, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Matthias Senf
  • Patent number: 10554404
    Abstract: An encryption method is provided that has a software model of a technical system, the model including software components is encrypted by a public key and a decryption structure, wherein the latter includes definitions of component groups of the software model. The decryption structure is integrated at least partially into the encrypted software model. Correspondingly, in a decryption method according to the invention, via a secret key that likewise comprises definitions of component groups, only the particular component groups are decrypted whose definitions the secret key includes in agreement with the definitions of the encrypted software model. The definitions of the secret key can be extended after the fact by a key extension, so that additional component groups can be decrypted with an extended secret key.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: February 4, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Janek Jochheim, Karsten Kruegel, Johannes Bloemer, Gennadij Liske
  • Patent number: 10551807
    Abstract: A method is provided for connecting an input/output interface of a tester equipped for control unit development to a model of a technical system present in the tester using an already-existing basic test model of a control unit. The input/output interface is designed for connecting a hardware implementation of the control unit or for connecting a technical system to be controlled, and the model to be connected to the input/output interface is a test model of the technical system to be controlled or a test model of the control unit. The already-existing basic test model of the control unit is accessed, and at least one communication requirement is extracted from the basic test model of the control unit.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: February 4, 2020
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Holger Naundorf
  • Publication number: 20200001888
    Abstract: A simulator and a method for testing a control device function of a control device of a vehicle. The vehicle includes various environmental sensors, such as radar, a camera, and a radio receiver, which serve as inputs to the control device function of the control device. A corresponding simulation utilizing a vehicle model, sensor models, and an environmental model is executed in a distributed fashion via a plurality of computing units and a memory of a simulator. The simulation utilizing the vehicle model, the sensor models, and the environmental model provides inputs to the control device function. Moreover, the simulation utilizing these models is started synchronously on the computing units, wherein data exchange occurs amongst the memory and the multiple computing units.
    Type: Application
    Filed: January 22, 2018
    Publication date: January 2, 2020
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Christian PRETSCH, Hendrik AMELUNXEN
  • Patent number: 10521534
    Abstract: A simulation device for simulating a peripheral circuit arrangement that can be connected to a control device, wherein the simulation device can be electrically connected to the control device, and the simulation device has a first control element for influencing a first simulation current that can be passed from a first load terminal of the control device to a first control element output of the first control element. The first control element contains a first multistage converter that includes a first converter output, which is electrically connected to a terminal on the converter side of a first inductive component at whose terminal on the control device side the first control element output is implemented. A direction of flow of the first simulation current is reversible, and the simulation device also includes a computing unit for execution of model code.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: December 31, 2019
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Gerrit Meyer
  • Patent number: 10503485
    Abstract: A method for generating program code based on one or more blocks of a block diagram in a technical computing environment, an identifier being assigned to at least one, preferably each, of the one or more blocks of the block diagram. A processor opens the block diagram in the model editor, converts the block diagram to an intermediate representation using the code generator, wherein the conversion comprises checking if a replacement condition is fulfilled for a current block in the block diagram. Checking the replacement condition includes verifying that a predefined functional code unit is assigned to the identifier of the current block, in that case changing the block to a placeholder containing input/output-definitions but no functionality. The processor then converts the intermediate representation to program code, the conversion comprising adding a predefined functional code unit from the data definition tool to the definition code corresponding to the placeholder block.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: December 10, 2019
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Andreas Hoffmann, Wolfgang Trautmann, Frank Luenstroth, Volker Straetgen
  • Patent number: 10488835
    Abstract: A method for configuring a tester equipped for testing an electronic control unit, wherein a software model of a technical system is executed on the tester and communicates electronically through an input/output interface of the tester with a device connected to the tester. A configuration system is coupled to a modeling system, and a software model characterized by function blocks that are connected to one another is present in the modeling system. The tester is configured in the configuration system by interconnected configuration elements such that physical characteristics of the input/output interface and/or the connection of the input/output interface with the software model are defined via the configuration elements. The configuration system is coupled to the modeling system such that the software model is provided to the configuration system via a coupling interface at the run time of the modeling system.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: November 26, 2019
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Joerg Hagendorf
  • Patent number: 10452389
    Abstract: A computer-implemented method for editing data object variants of at least one software tool is described and presented, whereby the data object variants have at least one common software/hardware attribute and in each case a configuration of the attribute. It is possible to react to changing configurations of hardware attributes of different data object variants and thereby to changing matching groups during the editing of a data object variant in that for at least one attribute matching configurations of the attribute in different data object variants are captured and that for the attribute information on matching groups of data object variants is stored with the matching configurations of the attribute.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: October 22, 2019
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Martin Kronmueller
  • Patent number: 10445071
    Abstract: A computer-implemented method for computer-aided generation of an executable control program for controlling a control system with an electronic computing unit, wherein the functionality of the control program is at least partially described in a graphical model, and the graphical model includes at least one sub-model with at least one sub-functionality, wherein the graphical model is first translated into model code in a high-level programming language, and the model code is subsequently compiled into the control program that is executable on the control system. Manageability of sub-model functions of sub-models within a graphical model is improved by the means that the sub-model is translated into a sub-model code function in the high-level programming language, that the model is translated into comprehensive model code in the high-level programming language, and that the sub-model code function is called from the comprehensive model code by a pointer to the sub-model code function.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: October 15, 2019
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Karsten Fischer
  • Patent number: 10444745
    Abstract: A method for automated configuration of a tester equipped for testing a control unit. A first and second model of technical systems being executed in the tester. The execution of the models taking place periodically with defined sampling rates. An FPGA executes the first and/or the second model and a CPU executes the first or the second model. A first individual sampling rate is allocated for the first model and a second individual sampling rate is allocated for the second model. The first model is assigned for execution on either the CPU or the FPGA and the second model is assigned for execution on either the CPU or the FPGA. The tester is automatically configured for execution of the first model with the first allocated sampling rate on the FPGA or the CPU and of the second model with the second allocated sampling rate on the FPGA or the CPU.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: October 15, 2019
    Assignee: dSPACE digital signal processing and control engineering Gmbh
    Inventors: László Juhász, Jesse Lakemeier
  • Publication number: 20190294421
    Abstract: A computer-implemented method for editing one or more properties of one or more model elements in a block diagram of a technical computing environment. The model elements include blocks and variables in blocks, wherein one or more properties are assigned to each model element. The technical computing environment has a model editor, a data definition tool and a code generator. A processor of a host computer opens a block diagram in the model editor, displays a list of model elements present in the block diagram, receives a selection of one or more model elements, highlights the selected model elements, receives an edit command to set a new value for a chosen property of the selected model elements, and sets the chosen property to the new value. A non-transitory computer readable medium and a computer system is also provided.
    Type: Application
    Filed: November 6, 2018
    Publication date: September 26, 2019
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Torsten PIETZSCH, Wolfgang TRAUTMANN, Christian WITTE