Abstract: A method for creating an FPGA netlist generated from an FPGA source code and at least one shadow register. The FPGA source code defines at least one function and at least one signal. The shadow register is assigned to the at least one signal, and is arranged and provided to store the value of the assigned signal at runtime. An option for reading out the stored signal value at runtime is provided. The function defined in the FPGA source code is not changed by the shadow register. The function described by the FPGA source code is executed by the FPGA, and a functional decoupling of the shadow register from the function described in the FPGA source code is provided. Via the decoupling, the shadow register maintains the signal value stored at the time of the decoupling while the function described in the FPGA source code is being executed.

Abstract: A method for generating software for a hardware component of a measuring, control, or regulating system having a processor, an FPGA, and a plurality of I/O channels. The I/O channels are connected to the FPGA and the FPGA is connected to the processor via a communications interface. The method includes the steps of selecting a first subset of the I/O channels for operation by the FPGA, generating a first application for execution in the FPGA, selecting a second subset of the I/O channels for operation by the processor, and generating a second application for execution on the processor. The step of generating a first application comprises generating code for connecting the second subset of I/O channels to the communications interface. The invention relates in addition to a method for operating a hardware component.

Abstract: A method for configuring a tester equipped for testing an electronic control unit, wherein a software model of a technical system is executed on the tester and communicates electronically through an input/output interface of the tester with a device connected to the tester. A configuration system is coupled to a modeling system, and a software model characterized by function blocks that are connected to one another is present in the modeling system. The tester is configured in the configuration system by interconnected configuration elements such that physical characteristics of the input/output interface and/or the connection of the input/output interface with the software model are defined via the configuration elements. The configuration system is coupled to the modeling system such that the software model is provided to the configuration system via a coupling interface at the run time of the modeling system.

Abstract: A method for monitoring the power consumption of an electrical consumer that has a capacitive load and the controllable circuit element and the consumer are connected in series. The amplitude of the current flowing through the consumer, the voltage dropping across the consumer, and the change over time of the voltage dropping across the consumer are sensed. An allowed operating current amplitude is calculated from the voltage dropping across the consumer and from a predefined power. A charging current amplitude of the capacitive load is calculated from the change over time of the voltage dropping across the consumer. An allowed instantaneous current amplitude is calculated. The allowed instantaneous current amplitude is compared with the amplitude of the current flowing through the consumer and the electrical resistance of the circuit element is increased if the amplitude of the current flowing through the consumer is greater than the allowed instantaneous current amplitude.

Abstract: An arrangement for disabling a configuration of a first programmable hardware component, having the first programmable hardware component, a second programmable hardware component, and a switching element. The first programmable hardware component has a configuration interface for configuring a logic of the first programmable hardware component, a data interface for communication of the logic with the second programmable hardware component, a debugging interface for debugging and configuring the logic, and a configuration monitoring interface for signaling a configuration process of the logic. The switching element is designed and connected to the debugging interface such that access to the debugging interface during a configuration process of the logic can be disabled.

Abstract: A method for influencing a control program having a plurality of first functions and at least one of the first functions is configured to control an actuator, and a memory is provided and the memory has memory regions occupied by subprograms assigned to the first functions, whereby there is a branch address in the program code of the control program when one of the first functions is called up that points to a memory address of the subprogram associated with the function call. The control program is analyzed for the occurrence of function calls, and the branch addresses, associated with the function calls, and addresses of the return commands are ascertained. One of the first functions is selected to be deleted. The first function is replaced by a second function, in which the program code of the selected first function is overwritten by the program code of the second function.

Abstract: A circuit arrangement for connecting a bus participant to at least one bus, having an interface for connecting the bus participant to the circuit arrangement, a first bus input, and a first bus output between which the bus participant is switchable via the interface. The circuit arrangement includes a second bus input and output for connecting the bus to the circuit arrangement in a ring topology in such a way that the first bus output is connected at least indirectly to the second bus input and the second bus output is connected at least indirectly to the first bus input via the bus. The bus in the circuit arrangement can be separated to obtain a line topology and can be configured as bus-terminating at one of the bus inputs or bus outputs. A system for the functional testing of bus participants on a bus in a simulation environment is provided.

Abstract: A method for connecting an input/output interface of a testing device equipped for testing a control unit to a model of a technical system present in the testing device. The interface connects the control unit to be tested or connects a technical system to be controlled; the model to be connected to the input/output interface is a model of the technical system to be controlled or a model of the control unit to be tested. The testing device has a plurality of input/output functions connected to the model and provides an interface hierarchy structure and a function hierarchy structure. The method has an automatic configuration of compatible connections between the interface hierarchy structure and the function hierarchy structure so that the model present in the testing device communicates through the compatible connections with the control unit to be tested or the technical system to be controlled.

Abstract: A computer-implemented method for editing data object variants of at least one software tool is described and presented, whereby the data object variants have at least one common software/hardware attribute and in each case a configuration of the attribute. It is possible to react to changing configurations of hardware attributes of different data object variants and thereby to changing matching groups during the editing of a data object variant in that for at least one attribute matching configurations of the attribute in different data object variants are captured and that for the attribute information on matching groups of data object variants is stored with the matching configurations of the attribute.

Abstract: A test device for testing at least a portion of a virtual electronic control unit with a simulation environment in a simulator, having the virtual electronic control unit and the simulation environment. The virtual electronic control unit has a software component with an external data interface. The simulation environment has a data interface for direct data exchange with the virtual electronic control unit. A test device with reduced adaptation effort is implemented via a virtual electronic control unit pin module that has at least one virtual electronic control unit interface and is connected via the virtual electronic control unit interface to the external data interface of the software component of the virtual electronic control unit.

Abstract: An arrangement for the partial release of a debug interface of a programmable hardware component, whereby a first logic for the programmable hardware component can be stored in a configuration memory and a configuration device is designed to program the programmable hardware component via a configuration interface of the programmable hardware component according to the first logic. The configuration device is further designed to register a programming process of the programmable hardware component which occurs via the debug interface according to a second logic and, upon termination of the programming process occurring via the debug interface, reprograms the programmable hardware component according to the first logic.

Abstract: A method for configuring a test device set up for testing an electronic control unit by a configuration system, whereby a software model of a technical system is executed in the test device and the software model communicates via an input/output interface of the test device with a device connected to the test device, whereby the configuration system has a first configuration element of a first element type and a second configuration element of a second element type, whereby the configuration elements are assigned properties of the test device with which the communication between the connected device and the software model is configured, wherein sorting of the properties occurs in the configuration system, and the sorting is switchable between the sorting types, namely, a union set sort, intersection sort, and condensing sort.

Abstract: A method for supporting a configuration of an interface is provided, wherein the configuration environment has an overview region that has several subregions. At least one item of information concerning a part of the configuration is displayed in each subregion. For each subregion, an item of information concerning the part of the configuration associated with the subregion is displayed. In the case of a warning and/or error message, a configuration option is displayed so as to be selectable, via which the warning/error message is resolved. The selection of the displayed configuration option causes a functionality to be started via which the displayed configuration option is made possible. In the case of a change in the status of a subregion, the display of the status and/or warning and/or error message and a configuration option derived therefrom in one subregion or several subregions is automatically updated and adapted to the changed status.

Abstract: A computer-implemented method for simulating a restbus control unit network that includes at least two restbus control units connected through a bus system. The restbus control unit network is connected to at least one additional control unit through the bus system. The communication relationships of the restbus control units are described, program code for simulating the restbus control units is generated based on the communication relationships. The restbus control unit network is simulated on a simulation computer via an executable version of the program code. Simplified and flexible simulation of the restbus control unit network is made possible in that a single, joint restbus control unit model is generated for the restbus control units as program code for simulating the restbus control units.

Abstract: A computer-implemented method for implementing a V2X application on target hardware having a radio adapter is provided. The V2X application is modeled in the form of a block diagram, wherein received telematics data of surrounding objects are recorded in an LDM object list. Detected telematics data of surrounding objects are recorded in a sensor object list, and, by comparing the LDM object list with the sensor object list, a telematics data comparison block determines differential surrounding objects that are recorded only in the sensor object list. For at least one differential surrounding object, a proxy V2X message with the telematics data of this differential surrounding object is created, and the block diagram is translated into a program that can be executed on the target hardware. The program is transferred to the target hardware and executed there, and the proxy message is sent by the target hardware over the radio adapter.

Abstract: A method for automated configuration of a tester equipped for testing a control unit. A first and second model of technical systems being executed in the tester. The execution of the models taking place periodically with defined sampling rates. An FPGA executes the first and/or the second model and a CPU executes the first or the second model. A first individual sampling rate is allocated for the first model and a second individual sampling rate is allocated for the second model. The first model is assigned for execution on either the CPU or the FPGA and the second model is assigned for execution on either the CPU or the FPGA. The tester is automatically configured for execution of the first model with the first allocated sampling rate on the FPGA or the CPU and of the second model with the second allocated sampling rate on the FPGA or the CPU.

Abstract: A method for simulating a peripheral circuit arrangement that can be connected to a control device is provided. A simulation device is electrically connected to the control device and has a first control element with which a first simulation current that can be passed from a first load terminal of the control device to a first control element output of the first control element can be influenced. The first control element includes a first multistage converter, and the simulation device also includes a first semiconductor switch control and a computing unit that executes model code. A first switch control signal is computed and provided for forwarding to the first semiconductor switch control, which has at least one first comparator. A pulse-width-modulated first gate-source voltage is generated and applied to a first control terminal and a first simulation current is influenced by the first gate-source voltage.

Abstract: A simulation device for simulating a peripheral circuit arrangement that can be connected to a control device, wherein the simulation device can be electrically connected to the control device, and the simulation device has a first control element for influencing a first simulation current that can be passed from a first load terminal of the control device to a first control element output of the first control element. The first control element contains a first multistage converter that includes a first converter output, which is electrically connected to a terminal on the converter side of a first inductive component at whose terminal on the control device side the first control element output is implemented. A direction of flow of the first simulation current is reversible, and the simulation device also includes a computing unit for execution of model code.

Abstract: An input/output interface of a test device is configured, wherein the input/output interface is developed for connecting a hardware unit to a behavioral model present in the test device. The method includes the steps of: displaying a graphical representation of the input/output interface as a signal path between a hardware port for connection of the hardware and at least one model port for connecting the behavioral model via a selectable input/output function; receiving a first configuration for the signal path; receiving a test value that is predefinable at the hardware port or the model port of the signal path, but, for example, is also predefinable through the graphical representation of the hardware port or the model port; propagating a test signal associated with the test value along the signal path according to the first configuration for the signal path, and displaying the propagated test signal on the graphical representation of the model port or the hardware port.

Abstract: A transfer of payload data from a buffer to a destination data store is provided so that the data can be processed there by a computer-assisted development environment. To this end, a data management environment provides the buffer and the destination data store. A data record having the payload data and semantic data that are associated with the payload data is provided in the buffer, and a data object with processing-specific object semantics is provided in the destination data store. The data object is instantiated with the payload data by means of the semantic data in that the payload data are placed in the data object as a function of the object semantics of the data object in such a manner that the development environment can process the payload data on the basis of the object semantics.